/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product26.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:19:35,859 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:19:35,862 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:19:35,916 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:19:35,917 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:19:35,921 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:19:35,926 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:19:35,932 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:19:35,936 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:19:35,942 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:19:35,946 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:19:35,948 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:19:35,948 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:19:35,952 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:19:35,954 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:19:35,957 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:19:35,958 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:19:35,961 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:19:35,968 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:19:35,976 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:19:35,978 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:19:35,981 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:19:35,982 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:19:35,985 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:19:36,007 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:19:36,008 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:19:36,008 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:19:36,011 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:19:36,012 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:19:36,013 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:19:36,014 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:19:36,015 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:19:36,018 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:19:36,019 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:19:36,020 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:19:36,020 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:19:36,021 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:19:36,028 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:19:36,028 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:19:36,029 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:19:36,031 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:19:36,036 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:19:36,087 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:19:36,087 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:19:36,089 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:19:36,093 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:19:36,093 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:19:36,093 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:19:36,094 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:19:36,095 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:19:36,095 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:19:36,095 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:19:36,095 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:19:36,096 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:19:36,096 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:19:36,096 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:19:36,096 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:19:36,097 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:19:36,097 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:19:36,097 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:19:36,097 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:19:36,097 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:19:36,098 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:19:36,499 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:19:36,528 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:19:36,531 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:19:36,532 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:19:36,533 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:19:36,534 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product26.cil.c [2021-01-06 18:19:36,612 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8874727e4/76af9f06d2124e19a65d6d8cd098c364/FLAG33dc1925b [2021-01-06 18:19:37,479 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:19:37,480 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product26.cil.c [2021-01-06 18:19:37,505 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8874727e4/76af9f06d2124e19a65d6d8cd098c364/FLAG33dc1925b [2021-01-06 18:19:37,627 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8874727e4/76af9f06d2124e19a65d6d8cd098c364 [2021-01-06 18:19:37,630 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:19:37,633 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:19:37,638 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:19:37,638 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:19:37,642 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:19:37,643 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:19:37" (1/1) ... [2021-01-06 18:19:37,644 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5097d3d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:37, skipping insertion in model container [2021-01-06 18:19:37,644 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:19:37" (1/1) ... [2021-01-06 18:19:37,653 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:19:37,730 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] [2021-01-06 18:19:38,340 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product26.cil.c[55650,55663] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] [2021-01-06 18:19:38,415 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:19:38,440 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] [2021-01-06 18:19:38,664 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product26.cil.c[55650,55663] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] [2021-01-06 18:19:38,683 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:19:38,772 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:19:38,773 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38 WrapperNode [2021-01-06 18:19:38,773 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:19:38,776 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:19:38,776 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:19:38,777 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:19:38,787 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:38,861 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,218 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:19:39,219 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:19:39,220 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:19:39,220 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:19:39,232 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,233 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,268 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,269 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,469 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,576 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,605 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... [2021-01-06 18:19:39,654 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:19:39,655 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:19:39,655 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:19:39,655 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:19:39,656 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:19:39,873 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:19:39,874 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:19:39,875 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:19:39,875 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:19:49,720 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:19:49,721 INFO L299 CfgBuilder]: Removed 1089 assume(true) statements. [2021-01-06 18:19:49,727 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:19:49 BoogieIcfgContainer [2021-01-06 18:19:49,728 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:19:49,730 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:19:49,730 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:19:49,733 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:19:49,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:19:37" (1/3) ... [2021-01-06 18:19:49,735 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dda3874 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:19:49, skipping insertion in model container [2021-01-06 18:19:49,735 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:19:38" (2/3) ... [2021-01-06 18:19:49,735 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dda3874 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:19:49, skipping insertion in model container [2021-01-06 18:19:49,735 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:19:49" (3/3) ... [2021-01-06 18:19:49,737 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product26.cil.c [2021-01-06 18:19:49,744 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:19:49,751 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:19:49,770 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:19:49,817 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:19:49,817 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:19:49,818 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:19:49,818 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:19:49,818 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:19:49,818 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:19:49,818 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:19:49,818 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:19:49,902 INFO L276 IsEmpty]: Start isEmpty. Operand 4799 states. [2021-01-06 18:19:49,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-01-06 18:19:49,914 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:49,916 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:49,916 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:49,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:49,923 INFO L82 PathProgramCache]: Analyzing trace with hash -742014273, now seen corresponding path program 1 times [2021-01-06 18:19:49,933 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:49,933 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644698656] [2021-01-06 18:19:49,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:50,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:50,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:50,486 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644698656] [2021-01-06 18:19:50,487 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:50,488 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:50,489 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929204057] [2021-01-06 18:19:50,495 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:50,497 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:50,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:50,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:50,523 INFO L87 Difference]: Start difference. First operand 4799 states. Second operand 3 states. [2021-01-06 18:19:51,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:51,041 INFO L93 Difference]: Finished difference Result 14317 states and 27059 transitions. [2021-01-06 18:19:51,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:51,043 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-01-06 18:19:51,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:51,150 INFO L225 Difference]: With dead ends: 14317 [2021-01-06 18:19:51,150 INFO L226 Difference]: Without dead ends: 9523 [2021-01-06 18:19:51,173 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:51,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9523 states. [2021-01-06 18:19:51,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9523 to 4795. [2021-01-06 18:19:51,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4795 states. [2021-01-06 18:19:51,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4795 states to 4795 states and 9050 transitions. [2021-01-06 18:19:51,470 INFO L78 Accepts]: Start accepts. Automaton has 4795 states and 9050 transitions. Word has length 36 [2021-01-06 18:19:51,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:51,471 INFO L481 AbstractCegarLoop]: Abstraction has 4795 states and 9050 transitions. [2021-01-06 18:19:51,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:51,471 INFO L276 IsEmpty]: Start isEmpty. Operand 4795 states and 9050 transitions. [2021-01-06 18:19:51,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2021-01-06 18:19:51,481 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:51,482 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:51,483 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:19:51,484 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:51,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:51,485 INFO L82 PathProgramCache]: Analyzing trace with hash 1164498936, now seen corresponding path program 1 times [2021-01-06 18:19:51,485 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:51,486 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142767058] [2021-01-06 18:19:51,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:51,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:51,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:51,631 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142767058] [2021-01-06 18:19:51,631 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:51,631 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:51,632 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247128838] [2021-01-06 18:19:51,633 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:51,633 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:51,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:51,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:51,635 INFO L87 Difference]: Start difference. First operand 4795 states and 9050 transitions. Second operand 4 states. [2021-01-06 18:19:52,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:52,314 INFO L93 Difference]: Finished difference Result 18934 states and 35755 transitions. [2021-01-06 18:19:52,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:52,315 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2021-01-06 18:19:52,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:52,412 INFO L225 Difference]: With dead ends: 18934 [2021-01-06 18:19:52,412 INFO L226 Difference]: Without dead ends: 14161 [2021-01-06 18:19:52,427 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:52,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14161 states. [2021-01-06 18:19:52,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14161 to 4771. [2021-01-06 18:19:52,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:52,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8997 transitions. [2021-01-06 18:19:52,653 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8997 transitions. Word has length 43 [2021-01-06 18:19:52,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:52,654 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8997 transitions. [2021-01-06 18:19:52,654 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:52,654 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8997 transitions. [2021-01-06 18:19:52,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-01-06 18:19:52,657 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:52,658 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:52,658 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:19:52,658 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:52,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:52,662 INFO L82 PathProgramCache]: Analyzing trace with hash 1925359514, now seen corresponding path program 1 times [2021-01-06 18:19:52,663 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:52,663 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664172656] [2021-01-06 18:19:52,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:52,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:52,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:52,817 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664172656] [2021-01-06 18:19:52,817 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:52,817 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:52,818 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180350237] [2021-01-06 18:19:52,818 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:52,819 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:52,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:52,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:52,820 INFO L87 Difference]: Start difference. First operand 4771 states and 8997 transitions. Second operand 4 states. [2021-01-06 18:19:53,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:53,428 INFO L93 Difference]: Finished difference Result 14221 states and 26842 transitions. [2021-01-06 18:19:53,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:53,429 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2021-01-06 18:19:53,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:53,468 INFO L225 Difference]: With dead ends: 14221 [2021-01-06 18:19:53,468 INFO L226 Difference]: Without dead ends: 9472 [2021-01-06 18:19:53,479 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:53,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9472 states. [2021-01-06 18:19:53,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9472 to 4771. [2021-01-06 18:19:53,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:53,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8991 transitions. [2021-01-06 18:19:53,685 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8991 transitions. Word has length 44 [2021-01-06 18:19:53,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:53,691 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8991 transitions. [2021-01-06 18:19:53,692 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:53,692 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8991 transitions. [2021-01-06 18:19:53,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-01-06 18:19:53,695 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:53,696 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:53,696 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:19:53,696 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:53,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:53,697 INFO L82 PathProgramCache]: Analyzing trace with hash 41866987, now seen corresponding path program 1 times [2021-01-06 18:19:53,697 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:53,697 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576917356] [2021-01-06 18:19:53,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:53,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:53,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:53,815 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576917356] [2021-01-06 18:19:53,816 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:53,816 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:53,816 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890136699] [2021-01-06 18:19:53,817 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:53,817 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:53,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:53,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:53,819 INFO L87 Difference]: Start difference. First operand 4771 states and 8991 transitions. Second operand 4 states. [2021-01-06 18:19:54,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:54,303 INFO L93 Difference]: Finished difference Result 14221 states and 26830 transitions. [2021-01-06 18:19:54,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:54,304 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2021-01-06 18:19:54,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:54,330 INFO L225 Difference]: With dead ends: 14221 [2021-01-06 18:19:54,331 INFO L226 Difference]: Without dead ends: 9472 [2021-01-06 18:19:54,343 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:54,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9472 states. [2021-01-06 18:19:54,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9472 to 4771. [2021-01-06 18:19:54,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:54,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8985 transitions. [2021-01-06 18:19:54,577 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8985 transitions. Word has length 46 [2021-01-06 18:19:54,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:54,578 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8985 transitions. [2021-01-06 18:19:54,578 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:54,578 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8985 transitions. [2021-01-06 18:19:54,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-01-06 18:19:54,580 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:54,580 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:54,581 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:19:54,581 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:54,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:54,582 INFO L82 PathProgramCache]: Analyzing trace with hash -1498288528, now seen corresponding path program 1 times [2021-01-06 18:19:54,582 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:54,582 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101600651] [2021-01-06 18:19:54,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:54,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:54,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:54,709 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101600651] [2021-01-06 18:19:54,709 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:54,709 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:54,710 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117237017] [2021-01-06 18:19:54,710 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:54,710 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:54,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:54,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:54,713 INFO L87 Difference]: Start difference. First operand 4771 states and 8985 transitions. Second operand 4 states. [2021-01-06 18:19:55,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:55,769 INFO L93 Difference]: Finished difference Result 23605 states and 44540 transitions. [2021-01-06 18:19:55,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:55,772 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 48 [2021-01-06 18:19:55,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:55,835 INFO L225 Difference]: With dead ends: 23605 [2021-01-06 18:19:55,836 INFO L226 Difference]: Without dead ends: 18856 [2021-01-06 18:19:55,855 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:55,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18856 states. [2021-01-06 18:19:56,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18856 to 4771. [2021-01-06 18:19:56,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:56,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8984 transitions. [2021-01-06 18:19:56,173 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8984 transitions. Word has length 48 [2021-01-06 18:19:56,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:56,176 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8984 transitions. [2021-01-06 18:19:56,176 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:56,176 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8984 transitions. [2021-01-06 18:19:56,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 18:19:56,178 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:56,179 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:56,179 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:19:56,180 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:56,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:56,180 INFO L82 PathProgramCache]: Analyzing trace with hash 792136363, now seen corresponding path program 1 times [2021-01-06 18:19:56,181 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:56,181 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332125306] [2021-01-06 18:19:56,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:56,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:56,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:56,291 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332125306] [2021-01-06 18:19:56,291 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:56,291 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:56,291 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843862632] [2021-01-06 18:19:56,292 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:56,292 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:56,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:56,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:56,293 INFO L87 Difference]: Start difference. First operand 4771 states and 8984 transitions. Second operand 4 states. [2021-01-06 18:19:56,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:56,882 INFO L93 Difference]: Finished difference Result 14221 states and 26817 transitions. [2021-01-06 18:19:56,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:56,883 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 18:19:56,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:56,924 INFO L225 Difference]: With dead ends: 14221 [2021-01-06 18:19:56,924 INFO L226 Difference]: Without dead ends: 9472 [2021-01-06 18:19:56,939 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:56,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9472 states. [2021-01-06 18:19:57,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9472 to 4771. [2021-01-06 18:19:57,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:57,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8978 transitions. [2021-01-06 18:19:57,180 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8978 transitions. Word has length 49 [2021-01-06 18:19:57,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:57,180 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8978 transitions. [2021-01-06 18:19:57,180 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:57,181 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8978 transitions. [2021-01-06 18:19:57,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2021-01-06 18:19:57,182 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:57,182 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:57,182 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:19:57,183 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:57,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:57,183 INFO L82 PathProgramCache]: Analyzing trace with hash -1162555413, now seen corresponding path program 1 times [2021-01-06 18:19:57,183 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:57,184 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482752115] [2021-01-06 18:19:57,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:57,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:57,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:57,242 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482752115] [2021-01-06 18:19:57,242 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:57,242 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:57,243 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012523435] [2021-01-06 18:19:57,243 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:57,243 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:57,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:57,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:57,244 INFO L87 Difference]: Start difference. First operand 4771 states and 8978 transitions. Second operand 4 states. [2021-01-06 18:19:57,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:57,780 INFO L93 Difference]: Finished difference Result 14221 states and 26805 transitions. [2021-01-06 18:19:57,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:57,781 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2021-01-06 18:19:57,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:57,809 INFO L225 Difference]: With dead ends: 14221 [2021-01-06 18:19:57,809 INFO L226 Difference]: Without dead ends: 9472 [2021-01-06 18:19:57,821 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:57,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9472 states. [2021-01-06 18:19:58,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9472 to 4771. [2021-01-06 18:19:58,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4771 states. [2021-01-06 18:19:58,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4771 states to 4771 states and 8972 transitions. [2021-01-06 18:19:58,044 INFO L78 Accepts]: Start accepts. Automaton has 4771 states and 8972 transitions. Word has length 50 [2021-01-06 18:19:58,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:58,045 INFO L481 AbstractCegarLoop]: Abstraction has 4771 states and 8972 transitions. [2021-01-06 18:19:58,045 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:58,045 INFO L276 IsEmpty]: Start isEmpty. Operand 4771 states and 8972 transitions. [2021-01-06 18:19:58,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-01-06 18:19:58,046 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:58,046 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:58,046 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:19:58,047 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:58,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:58,047 INFO L82 PathProgramCache]: Analyzing trace with hash -1571877690, now seen corresponding path program 1 times [2021-01-06 18:19:58,047 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:58,048 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700090938] [2021-01-06 18:19:58,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:58,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:58,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:58,106 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700090938] [2021-01-06 18:19:58,106 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:58,106 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:58,107 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347866589] [2021-01-06 18:19:58,107 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:58,107 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:58,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:58,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:58,108 INFO L87 Difference]: Start difference. First operand 4771 states and 8972 transitions. Second operand 4 states. [2021-01-06 18:19:58,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:58,787 INFO L93 Difference]: Finished difference Result 18892 states and 35621 transitions. [2021-01-06 18:19:58,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:58,788 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2021-01-06 18:19:58,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:58,829 INFO L225 Difference]: With dead ends: 18892 [2021-01-06 18:19:58,829 INFO L226 Difference]: Without dead ends: 14149 [2021-01-06 18:19:58,841 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:58,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14149 states. [2021-01-06 18:19:59,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14149 to 4773. [2021-01-06 18:19:59,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4773 states. [2021-01-06 18:19:59,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4773 states to 4773 states and 8973 transitions. [2021-01-06 18:19:59,117 INFO L78 Accepts]: Start accepts. Automaton has 4773 states and 8973 transitions. Word has length 51 [2021-01-06 18:19:59,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:59,118 INFO L481 AbstractCegarLoop]: Abstraction has 4773 states and 8973 transitions. [2021-01-06 18:19:59,118 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:59,118 INFO L276 IsEmpty]: Start isEmpty. Operand 4773 states and 8973 transitions. [2021-01-06 18:19:59,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:19:59,119 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:59,119 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:59,120 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:19:59,120 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:59,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:59,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1415614102, now seen corresponding path program 1 times [2021-01-06 18:19:59,121 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:59,121 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211329491] [2021-01-06 18:19:59,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:59,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:59,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:59,208 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [211329491] [2021-01-06 18:19:59,209 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:59,209 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:59,209 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417873335] [2021-01-06 18:19:59,209 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:59,210 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:59,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:59,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:59,211 INFO L87 Difference]: Start difference. First operand 4773 states and 8973 transitions. Second operand 4 states. [2021-01-06 18:19:59,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:59,956 INFO L93 Difference]: Finished difference Result 18884 states and 35601 transitions. [2021-01-06 18:19:59,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:59,957 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2021-01-06 18:19:59,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:00,002 INFO L225 Difference]: With dead ends: 18884 [2021-01-06 18:20:00,003 INFO L226 Difference]: Without dead ends: 14144 [2021-01-06 18:20:00,014 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:00,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14144 states. [2021-01-06 18:20:00,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14144 to 4778. [2021-01-06 18:20:00,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4778 states. [2021-01-06 18:20:00,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4778 states to 4778 states and 8981 transitions. [2021-01-06 18:20:00,285 INFO L78 Accepts]: Start accepts. Automaton has 4778 states and 8981 transitions. Word has length 52 [2021-01-06 18:20:00,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:00,285 INFO L481 AbstractCegarLoop]: Abstraction has 4778 states and 8981 transitions. [2021-01-06 18:20:00,285 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:00,285 INFO L276 IsEmpty]: Start isEmpty. Operand 4778 states and 8981 transitions. [2021-01-06 18:20:00,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-01-06 18:20:00,287 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:00,287 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:00,287 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:20:00,287 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:00,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:00,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1141736049, now seen corresponding path program 1 times [2021-01-06 18:20:00,288 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:00,288 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947866194] [2021-01-06 18:20:00,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:00,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:00,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:00,344 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [947866194] [2021-01-06 18:20:00,344 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:00,344 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:00,344 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [652661480] [2021-01-06 18:20:00,345 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:00,345 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:00,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:00,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:00,346 INFO L87 Difference]: Start difference. First operand 4778 states and 8981 transitions. Second operand 3 states. [2021-01-06 18:20:00,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:00,522 INFO L93 Difference]: Finished difference Result 9513 states and 17904 transitions. [2021-01-06 18:20:00,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:00,523 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2021-01-06 18:20:00,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:00,533 INFO L225 Difference]: With dead ends: 9513 [2021-01-06 18:20:00,534 INFO L226 Difference]: Without dead ends: 4772 [2021-01-06 18:20:00,542 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:00,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4772 states. [2021-01-06 18:20:00,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4772 to 4772. [2021-01-06 18:20:00,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4772 states. [2021-01-06 18:20:00,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4772 states to 4772 states and 8969 transitions. [2021-01-06 18:20:00,724 INFO L78 Accepts]: Start accepts. Automaton has 4772 states and 8969 transitions. Word has length 53 [2021-01-06 18:20:00,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:00,725 INFO L481 AbstractCegarLoop]: Abstraction has 4772 states and 8969 transitions. [2021-01-06 18:20:00,725 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:00,725 INFO L276 IsEmpty]: Start isEmpty. Operand 4772 states and 8969 transitions. [2021-01-06 18:20:00,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-01-06 18:20:00,726 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:00,726 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:00,726 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:20:00,726 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:00,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:00,727 INFO L82 PathProgramCache]: Analyzing trace with hash -941604074, now seen corresponding path program 1 times [2021-01-06 18:20:00,727 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:00,728 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173979511] [2021-01-06 18:20:00,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:00,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:00,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:00,794 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173979511] [2021-01-06 18:20:00,794 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:00,794 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:00,795 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88668027] [2021-01-06 18:20:00,795 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:00,795 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:00,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:00,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:00,796 INFO L87 Difference]: Start difference. First operand 4772 states and 8969 transitions. Second operand 5 states. [2021-01-06 18:20:01,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:01,061 INFO L93 Difference]: Finished difference Result 9457 states and 17817 transitions. [2021-01-06 18:20:01,061 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:01,062 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2021-01-06 18:20:01,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:01,072 INFO L225 Difference]: With dead ends: 9457 [2021-01-06 18:20:01,072 INFO L226 Difference]: Without dead ends: 4759 [2021-01-06 18:20:01,082 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:20:01,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4759 states. [2021-01-06 18:20:01,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4759 to 4759. [2021-01-06 18:20:01,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-01-06 18:20:01,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 8947 transitions. [2021-01-06 18:20:01,278 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 8947 transitions. Word has length 55 [2021-01-06 18:20:01,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:01,278 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 8947 transitions. [2021-01-06 18:20:01,278 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:01,278 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 8947 transitions. [2021-01-06 18:20:01,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:20:01,280 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:01,280 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:01,280 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:20:01,280 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:01,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:01,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1563040938, now seen corresponding path program 1 times [2021-01-06 18:20:01,286 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:01,286 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67314410] [2021-01-06 18:20:01,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:01,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:01,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:01,376 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [67314410] [2021-01-06 18:20:01,377 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:01,377 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:01,377 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89764406] [2021-01-06 18:20:01,377 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:01,377 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:01,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:01,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:01,378 INFO L87 Difference]: Start difference. First operand 4759 states and 8947 transitions. Second operand 5 states. [2021-01-06 18:20:01,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:01,619 INFO L93 Difference]: Finished difference Result 9451 states and 17806 transitions. [2021-01-06 18:20:01,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:01,620 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2021-01-06 18:20:01,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:01,629 INFO L225 Difference]: With dead ends: 9451 [2021-01-06 18:20:01,630 INFO L226 Difference]: Without dead ends: 4753 [2021-01-06 18:20:01,639 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:01,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4753 states. [2021-01-06 18:20:01,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4753 to 4753. [2021-01-06 18:20:01,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4753 states. [2021-01-06 18:20:01,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4753 states to 4753 states and 8938 transitions. [2021-01-06 18:20:01,904 INFO L78 Accepts]: Start accepts. Automaton has 4753 states and 8938 transitions. Word has length 58 [2021-01-06 18:20:01,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:01,906 INFO L481 AbstractCegarLoop]: Abstraction has 4753 states and 8938 transitions. [2021-01-06 18:20:01,906 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:01,906 INFO L276 IsEmpty]: Start isEmpty. Operand 4753 states and 8938 transitions. [2021-01-06 18:20:01,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:20:01,907 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:01,907 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:01,908 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:20:01,908 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:01,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:01,908 INFO L82 PathProgramCache]: Analyzing trace with hash 856485930, now seen corresponding path program 1 times [2021-01-06 18:20:01,909 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:01,909 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276543642] [2021-01-06 18:20:01,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:01,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:01,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:01,990 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276543642] [2021-01-06 18:20:01,990 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:01,990 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:01,991 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835280294] [2021-01-06 18:20:01,991 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:01,991 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:01,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:01,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:01,992 INFO L87 Difference]: Start difference. First operand 4753 states and 8938 transitions. Second operand 4 states. [2021-01-06 18:20:02,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:02,312 INFO L93 Difference]: Finished difference Result 9445 states and 17797 transitions. [2021-01-06 18:20:02,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:20:02,313 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2021-01-06 18:20:02,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:02,323 INFO L225 Difference]: With dead ends: 9445 [2021-01-06 18:20:02,324 INFO L226 Difference]: Without dead ends: 4739 [2021-01-06 18:20:02,345 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:02,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4739 states. [2021-01-06 18:20:02,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4739 to 4739. [2021-01-06 18:20:02,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4739 states. [2021-01-06 18:20:02,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4739 states to 4739 states and 8917 transitions. [2021-01-06 18:20:02,573 INFO L78 Accepts]: Start accepts. Automaton has 4739 states and 8917 transitions. Word has length 58 [2021-01-06 18:20:02,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:02,573 INFO L481 AbstractCegarLoop]: Abstraction has 4739 states and 8917 transitions. [2021-01-06 18:20:02,573 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:02,573 INFO L276 IsEmpty]: Start isEmpty. Operand 4739 states and 8917 transitions. [2021-01-06 18:20:02,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2021-01-06 18:20:02,581 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:02,581 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:02,582 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:20:02,582 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:02,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:02,583 INFO L82 PathProgramCache]: Analyzing trace with hash -643906339, now seen corresponding path program 1 times [2021-01-06 18:20:02,583 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:02,583 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926178147] [2021-01-06 18:20:02,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:02,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:02,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:02,677 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926178147] [2021-01-06 18:20:02,677 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:02,677 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:02,677 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [497766237] [2021-01-06 18:20:02,677 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:02,678 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:02,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:02,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:02,678 INFO L87 Difference]: Start difference. First operand 4739 states and 8917 transitions. Second operand 6 states. [2021-01-06 18:20:03,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:03,026 INFO L93 Difference]: Finished difference Result 9445 states and 17792 transitions. [2021-01-06 18:20:03,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:03,027 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2021-01-06 18:20:03,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:03,034 INFO L225 Difference]: With dead ends: 9445 [2021-01-06 18:20:03,034 INFO L226 Difference]: Without dead ends: 4759 [2021-01-06 18:20:03,041 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:03,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4759 states. [2021-01-06 18:20:03,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4759 to 4739. [2021-01-06 18:20:03,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4739 states. [2021-01-06 18:20:03,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4739 states to 4739 states and 8916 transitions. [2021-01-06 18:20:03,240 INFO L78 Accepts]: Start accepts. Automaton has 4739 states and 8916 transitions. Word has length 59 [2021-01-06 18:20:03,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:03,240 INFO L481 AbstractCegarLoop]: Abstraction has 4739 states and 8916 transitions. [2021-01-06 18:20:03,240 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:03,240 INFO L276 IsEmpty]: Start isEmpty. Operand 4739 states and 8916 transitions. [2021-01-06 18:20:03,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:20:03,241 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:03,241 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:03,242 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:20:03,242 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:03,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:03,242 INFO L82 PathProgramCache]: Analyzing trace with hash -958302959, now seen corresponding path program 1 times [2021-01-06 18:20:03,243 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:03,243 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714930779] [2021-01-06 18:20:03,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:03,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:03,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:03,326 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714930779] [2021-01-06 18:20:03,326 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:03,326 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:03,327 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629065788] [2021-01-06 18:20:03,327 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:03,327 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:03,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:03,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:03,328 INFO L87 Difference]: Start difference. First operand 4739 states and 8916 transitions. Second operand 6 states. [2021-01-06 18:20:03,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:03,647 INFO L93 Difference]: Finished difference Result 9435 states and 17773 transitions. [2021-01-06 18:20:03,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:03,647 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2021-01-06 18:20:03,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:03,654 INFO L225 Difference]: With dead ends: 9435 [2021-01-06 18:20:03,654 INFO L226 Difference]: Without dead ends: 4754 [2021-01-06 18:20:03,659 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:03,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4754 states. [2021-01-06 18:20:03,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4754 to 4739. [2021-01-06 18:20:03,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4739 states. [2021-01-06 18:20:03,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4739 states to 4739 states and 8915 transitions. [2021-01-06 18:20:03,920 INFO L78 Accepts]: Start accepts. Automaton has 4739 states and 8915 transitions. Word has length 60 [2021-01-06 18:20:03,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:03,920 INFO L481 AbstractCegarLoop]: Abstraction has 4739 states and 8915 transitions. [2021-01-06 18:20:03,921 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:03,921 INFO L276 IsEmpty]: Start isEmpty. Operand 4739 states and 8915 transitions. [2021-01-06 18:20:03,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:20:03,922 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:03,922 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:03,922 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:20:03,922 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:03,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:03,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1619075218, now seen corresponding path program 1 times [2021-01-06 18:20:03,924 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:03,924 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079192102] [2021-01-06 18:20:03,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:03,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:04,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:04,048 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079192102] [2021-01-06 18:20:04,052 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:04,052 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:04,053 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960367026] [2021-01-06 18:20:04,053 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:04,053 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:04,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:04,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:04,054 INFO L87 Difference]: Start difference. First operand 4739 states and 8915 transitions. Second operand 3 states. [2021-01-06 18:20:04,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:04,660 INFO L93 Difference]: Finished difference Result 10971 states and 20697 transitions. [2021-01-06 18:20:04,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:04,660 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 18:20:04,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:04,678 INFO L225 Difference]: With dead ends: 10971 [2021-01-06 18:20:04,679 INFO L226 Difference]: Without dead ends: 8576 [2021-01-06 18:20:04,686 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:04,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8576 states. [2021-01-06 18:20:05,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8576 to 6597. [2021-01-06 18:20:05,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6597 states. [2021-01-06 18:20:05,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6597 states to 6597 states and 12433 transitions. [2021-01-06 18:20:05,044 INFO L78 Accepts]: Start accepts. Automaton has 6597 states and 12433 transitions. Word has length 61 [2021-01-06 18:20:05,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:05,044 INFO L481 AbstractCegarLoop]: Abstraction has 6597 states and 12433 transitions. [2021-01-06 18:20:05,044 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:05,044 INFO L276 IsEmpty]: Start isEmpty. Operand 6597 states and 12433 transitions. [2021-01-06 18:20:05,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-01-06 18:20:05,048 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:05,048 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:05,049 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:20:05,049 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:05,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:05,049 INFO L82 PathProgramCache]: Analyzing trace with hash -86892149, now seen corresponding path program 1 times [2021-01-06 18:20:05,049 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:05,050 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220495764] [2021-01-06 18:20:05,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:05,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:05,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:05,154 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220495764] [2021-01-06 18:20:05,155 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:05,155 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:20:05,155 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1191819736] [2021-01-06 18:20:05,156 INFO L461 AbstractCegarLoop]: Interpolant automaton has 8 states [2021-01-06 18:20:05,156 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:05,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-01-06 18:20:05,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:20:05,157 INFO L87 Difference]: Start difference. First operand 6597 states and 12433 transitions. Second operand 8 states. [2021-01-06 18:20:06,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:06,122 INFO L93 Difference]: Finished difference Result 13194 states and 24688 transitions. [2021-01-06 18:20:06,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-01-06 18:20:06,122 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 74 [2021-01-06 18:20:06,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:06,135 INFO L225 Difference]: With dead ends: 13194 [2021-01-06 18:20:06,135 INFO L226 Difference]: Without dead ends: 7819 [2021-01-06 18:20:06,141 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2021-01-06 18:20:06,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7819 states. [2021-01-06 18:20:06,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7819 to 5372. [2021-01-06 18:20:06,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5372 states. [2021-01-06 18:20:06,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5372 states to 5372 states and 10066 transitions. [2021-01-06 18:20:06,503 INFO L78 Accepts]: Start accepts. Automaton has 5372 states and 10066 transitions. Word has length 74 [2021-01-06 18:20:06,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:06,503 INFO L481 AbstractCegarLoop]: Abstraction has 5372 states and 10066 transitions. [2021-01-06 18:20:06,504 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2021-01-06 18:20:06,504 INFO L276 IsEmpty]: Start isEmpty. Operand 5372 states and 10066 transitions. [2021-01-06 18:20:06,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:20:06,506 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:06,507 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:06,507 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:20:06,507 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:06,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:06,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1319552578, now seen corresponding path program 1 times [2021-01-06 18:20:06,508 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:06,508 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313021411] [2021-01-06 18:20:06,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:06,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:06,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:06,599 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313021411] [2021-01-06 18:20:06,599 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:06,599 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:06,599 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735123659] [2021-01-06 18:20:06,600 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:06,600 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:06,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:06,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:06,601 INFO L87 Difference]: Start difference. First operand 5372 states and 10066 transitions. Second operand 5 states. [2021-01-06 18:20:09,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:09,397 INFO L93 Difference]: Finished difference Result 21579 states and 40361 transitions. [2021-01-06 18:20:09,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:09,398 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 75 [2021-01-06 18:20:09,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:09,421 INFO L225 Difference]: With dead ends: 21579 [2021-01-06 18:20:09,421 INFO L226 Difference]: Without dead ends: 16283 [2021-01-06 18:20:09,428 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:20:09,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16283 states. [2021-01-06 18:20:09,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16283 to 5386. [2021-01-06 18:20:09,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5386 states. [2021-01-06 18:20:09,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5386 states to 5386 states and 10080 transitions. [2021-01-06 18:20:09,700 INFO L78 Accepts]: Start accepts. Automaton has 5386 states and 10080 transitions. Word has length 75 [2021-01-06 18:20:09,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:09,701 INFO L481 AbstractCegarLoop]: Abstraction has 5386 states and 10080 transitions. [2021-01-06 18:20:09,701 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:09,701 INFO L276 IsEmpty]: Start isEmpty. Operand 5386 states and 10080 transitions. [2021-01-06 18:20:09,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-01-06 18:20:09,703 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:09,704 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:09,704 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:20:09,704 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:09,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:09,704 INFO L82 PathProgramCache]: Analyzing trace with hash 690188848, now seen corresponding path program 1 times [2021-01-06 18:20:09,705 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:09,705 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863248458] [2021-01-06 18:20:09,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:09,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:09,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:09,772 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863248458] [2021-01-06 18:20:09,772 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:09,772 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:09,773 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588782983] [2021-01-06 18:20:09,773 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:09,773 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:09,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:09,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:09,774 INFO L87 Difference]: Start difference. First operand 5386 states and 10080 transitions. Second operand 4 states. [2021-01-06 18:20:12,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:12,374 INFO L93 Difference]: Finished difference Result 15937 states and 29732 transitions. [2021-01-06 18:20:12,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:12,375 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2021-01-06 18:20:12,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:12,392 INFO L225 Difference]: With dead ends: 15937 [2021-01-06 18:20:12,392 INFO L226 Difference]: Without dead ends: 10614 [2021-01-06 18:20:12,401 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:12,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10614 states. [2021-01-06 18:20:12,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10614 to 6862. [2021-01-06 18:20:12,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6862 states. [2021-01-06 18:20:12,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6862 states to 6862 states and 12704 transitions. [2021-01-06 18:20:12,868 INFO L78 Accepts]: Start accepts. Automaton has 6862 states and 12704 transitions. Word has length 76 [2021-01-06 18:20:12,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:12,868 INFO L481 AbstractCegarLoop]: Abstraction has 6862 states and 12704 transitions. [2021-01-06 18:20:12,868 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:12,869 INFO L276 IsEmpty]: Start isEmpty. Operand 6862 states and 12704 transitions. [2021-01-06 18:20:12,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:20:12,871 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:12,871 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:12,871 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:20:12,871 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:12,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:12,872 INFO L82 PathProgramCache]: Analyzing trace with hash -1667362408, now seen corresponding path program 1 times [2021-01-06 18:20:12,872 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:12,872 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700441875] [2021-01-06 18:20:12,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:12,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:12,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:12,956 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700441875] [2021-01-06 18:20:12,957 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:12,957 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:12,957 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952310965] [2021-01-06 18:20:12,957 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:12,957 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:12,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:12,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:12,958 INFO L87 Difference]: Start difference. First operand 6862 states and 12704 transitions. Second operand 5 states. [2021-01-06 18:20:15,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:15,068 INFO L93 Difference]: Finished difference Result 45524 states and 84643 transitions. [2021-01-06 18:20:15,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:15,068 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 78 [2021-01-06 18:20:15,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:15,123 INFO L225 Difference]: With dead ends: 45524 [2021-01-06 18:20:15,123 INFO L226 Difference]: Without dead ends: 38734 [2021-01-06 18:20:15,136 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:20:15,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38734 states. [2021-01-06 18:20:15,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38734 to 10924. [2021-01-06 18:20:15,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10924 states. [2021-01-06 18:20:15,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10924 states to 10924 states and 20258 transitions. [2021-01-06 18:20:15,845 INFO L78 Accepts]: Start accepts. Automaton has 10924 states and 20258 transitions. Word has length 78 [2021-01-06 18:20:15,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:15,845 INFO L481 AbstractCegarLoop]: Abstraction has 10924 states and 20258 transitions. [2021-01-06 18:20:15,846 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:15,846 INFO L276 IsEmpty]: Start isEmpty. Operand 10924 states and 20258 transitions. [2021-01-06 18:20:15,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:20:15,848 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:15,848 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:15,848 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:20:15,848 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:15,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:15,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1801375914, now seen corresponding path program 1 times [2021-01-06 18:20:15,849 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:15,849 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602736394] [2021-01-06 18:20:15,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:15,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:16,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:16,018 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602736394] [2021-01-06 18:20:16,020 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:16,020 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:16,020 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024378894] [2021-01-06 18:20:16,021 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:16,021 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:16,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:16,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:16,022 INFO L87 Difference]: Start difference. First operand 10924 states and 20258 transitions. Second operand 4 states. [2021-01-06 18:20:17,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:17,354 INFO L93 Difference]: Finished difference Result 22487 states and 41619 transitions. [2021-01-06 18:20:17,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:17,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2021-01-06 18:20:17,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:17,377 INFO L225 Difference]: With dead ends: 22487 [2021-01-06 18:20:17,378 INFO L226 Difference]: Without dead ends: 15941 [2021-01-06 18:20:17,393 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:17,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15941 states. [2021-01-06 18:20:17,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15941 to 10938. [2021-01-06 18:20:17,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10938 states. [2021-01-06 18:20:17,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10938 states to 10938 states and 20266 transitions. [2021-01-06 18:20:17,918 INFO L78 Accepts]: Start accepts. Automaton has 10938 states and 20266 transitions. Word has length 78 [2021-01-06 18:20:17,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:17,919 INFO L481 AbstractCegarLoop]: Abstraction has 10938 states and 20266 transitions. [2021-01-06 18:20:17,919 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:17,919 INFO L276 IsEmpty]: Start isEmpty. Operand 10938 states and 20266 transitions. [2021-01-06 18:20:17,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2021-01-06 18:20:17,921 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:17,921 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:17,922 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:20:17,922 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:17,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:17,922 INFO L82 PathProgramCache]: Analyzing trace with hash -817034699, now seen corresponding path program 1 times [2021-01-06 18:20:17,922 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:17,922 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040369713] [2021-01-06 18:20:17,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:17,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:18,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:18,028 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040369713] [2021-01-06 18:20:18,028 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:18,028 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:18,028 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041756617] [2021-01-06 18:20:18,029 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:18,029 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:18,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:18,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:18,030 INFO L87 Difference]: Start difference. First operand 10938 states and 20266 transitions. Second operand 4 states. [2021-01-06 18:20:20,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:20,119 INFO L93 Difference]: Finished difference Result 29416 states and 54510 transitions. [2021-01-06 18:20:20,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:20:20,120 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2021-01-06 18:20:20,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:20,153 INFO L225 Difference]: With dead ends: 29416 [2021-01-06 18:20:20,153 INFO L226 Difference]: Without dead ends: 22806 [2021-01-06 18:20:20,164 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:20,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22806 states. [2021-01-06 18:20:21,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22806 to 17383. [2021-01-06 18:20:21,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17383 states. [2021-01-06 18:20:21,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17383 states to 17383 states and 32205 transitions. [2021-01-06 18:20:21,060 INFO L78 Accepts]: Start accepts. Automaton has 17383 states and 32205 transitions. Word has length 84 [2021-01-06 18:20:21,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:21,060 INFO L481 AbstractCegarLoop]: Abstraction has 17383 states and 32205 transitions. [2021-01-06 18:20:21,060 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:21,060 INFO L276 IsEmpty]: Start isEmpty. Operand 17383 states and 32205 transitions. [2021-01-06 18:20:21,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2021-01-06 18:20:21,063 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:21,063 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:21,064 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:20:21,064 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:21,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:21,064 INFO L82 PathProgramCache]: Analyzing trace with hash -394332873, now seen corresponding path program 1 times [2021-01-06 18:20:21,065 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:21,065 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661904642] [2021-01-06 18:20:21,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:21,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:21,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:21,133 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661904642] [2021-01-06 18:20:21,133 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:21,133 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:21,133 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679214993] [2021-01-06 18:20:21,134 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:21,134 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:21,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:21,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:21,134 INFO L87 Difference]: Start difference. First operand 17383 states and 32205 transitions. Second operand 3 states. [2021-01-06 18:20:22,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:22,046 INFO L93 Difference]: Finished difference Result 32780 states and 60732 transitions. [2021-01-06 18:20:22,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:22,047 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 84 [2021-01-06 18:20:22,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:22,071 INFO L225 Difference]: With dead ends: 32780 [2021-01-06 18:20:22,071 INFO L226 Difference]: Without dead ends: 17341 [2021-01-06 18:20:22,094 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:22,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17341 states. [2021-01-06 18:20:22,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17341 to 17341. [2021-01-06 18:20:22,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17341 states. [2021-01-06 18:20:23,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17341 states to 17341 states and 32123 transitions. [2021-01-06 18:20:23,017 INFO L78 Accepts]: Start accepts. Automaton has 17341 states and 32123 transitions. Word has length 84 [2021-01-06 18:20:23,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:23,018 INFO L481 AbstractCegarLoop]: Abstraction has 17341 states and 32123 transitions. [2021-01-06 18:20:23,018 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:23,018 INFO L276 IsEmpty]: Start isEmpty. Operand 17341 states and 32123 transitions. [2021-01-06 18:20:23,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:20:23,021 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:23,021 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:23,021 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:20:23,021 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:23,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:23,022 INFO L82 PathProgramCache]: Analyzing trace with hash -50310469, now seen corresponding path program 1 times [2021-01-06 18:20:23,022 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:23,022 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725518938] [2021-01-06 18:20:23,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:23,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:23,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:23,102 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725518938] [2021-01-06 18:20:23,103 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:23,103 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:23,103 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230005134] [2021-01-06 18:20:23,103 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:23,103 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:23,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:23,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:23,107 INFO L87 Difference]: Start difference. First operand 17341 states and 32123 transitions. Second operand 5 states. [2021-01-06 18:20:25,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:25,290 INFO L93 Difference]: Finished difference Result 57988 states and 107500 transitions. [2021-01-06 18:20:25,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:25,290 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 86 [2021-01-06 18:20:25,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:25,361 INFO L225 Difference]: With dead ends: 57988 [2021-01-06 18:20:25,361 INFO L226 Difference]: Without dead ends: 45075 [2021-01-06 18:20:25,383 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:20:25,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45075 states. [2021-01-06 18:20:26,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45075 to 17341. [2021-01-06 18:20:26,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17341 states. [2021-01-06 18:20:26,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17341 states to 17341 states and 32103 transitions. [2021-01-06 18:20:26,466 INFO L78 Accepts]: Start accepts. Automaton has 17341 states and 32103 transitions. Word has length 86 [2021-01-06 18:20:26,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:26,467 INFO L481 AbstractCegarLoop]: Abstraction has 17341 states and 32103 transitions. [2021-01-06 18:20:26,467 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:26,467 INFO L276 IsEmpty]: Start isEmpty. Operand 17341 states and 32103 transitions. [2021-01-06 18:20:26,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:20:26,470 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:26,470 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:26,470 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:20:26,470 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:26,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:26,471 INFO L82 PathProgramCache]: Analyzing trace with hash -365618119, now seen corresponding path program 1 times [2021-01-06 18:20:26,471 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:26,471 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506382476] [2021-01-06 18:20:26,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:26,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:26,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:26,572 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506382476] [2021-01-06 18:20:26,572 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:26,573 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:26,573 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810173136] [2021-01-06 18:20:26,573 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:26,573 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:26,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:26,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:26,574 INFO L87 Difference]: Start difference. First operand 17341 states and 32103 transitions. Second operand 5 states. [2021-01-06 18:20:28,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:28,446 INFO L93 Difference]: Finished difference Result 28464 states and 52867 transitions. [2021-01-06 18:20:28,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:28,447 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 86 [2021-01-06 18:20:28,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:28,485 INFO L225 Difference]: With dead ends: 28464 [2021-01-06 18:20:28,485 INFO L226 Difference]: Without dead ends: 28451 [2021-01-06 18:20:28,492 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:28,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28451 states. [2021-01-06 18:20:29,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28451 to 17356. [2021-01-06 18:20:29,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17356 states. [2021-01-06 18:20:29,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17356 states to 17356 states and 32118 transitions. [2021-01-06 18:20:29,447 INFO L78 Accepts]: Start accepts. Automaton has 17356 states and 32118 transitions. Word has length 86 [2021-01-06 18:20:29,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:29,448 INFO L481 AbstractCegarLoop]: Abstraction has 17356 states and 32118 transitions. [2021-01-06 18:20:29,448 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:29,448 INFO L276 IsEmpty]: Start isEmpty. Operand 17356 states and 32118 transitions. [2021-01-06 18:20:29,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:20:29,451 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:29,451 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:29,451 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:20:29,451 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:29,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:29,452 INFO L82 PathProgramCache]: Analyzing trace with hash -1658752162, now seen corresponding path program 1 times [2021-01-06 18:20:29,452 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:29,452 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849033179] [2021-01-06 18:20:29,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:29,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:29,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:29,524 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849033179] [2021-01-06 18:20:29,524 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:29,524 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:29,524 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135152758] [2021-01-06 18:20:29,525 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:29,525 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:29,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:29,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:29,526 INFO L87 Difference]: Start difference. First operand 17356 states and 32118 transitions. Second operand 5 states. [2021-01-06 18:20:31,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:31,058 INFO L93 Difference]: Finished difference Result 29897 states and 55222 transitions. [2021-01-06 18:20:31,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:20:31,059 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:20:31,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:31,098 INFO L225 Difference]: With dead ends: 29897 [2021-01-06 18:20:31,099 INFO L226 Difference]: Without dead ends: 29884 [2021-01-06 18:20:31,107 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:20:31,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29884 states. [2021-01-06 18:20:32,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29884 to 17616. [2021-01-06 18:20:32,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17616 states. [2021-01-06 18:20:32,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17616 states to 17616 states and 32509 transitions. [2021-01-06 18:20:32,242 INFO L78 Accepts]: Start accepts. Automaton has 17616 states and 32509 transitions. Word has length 88 [2021-01-06 18:20:32,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:32,242 INFO L481 AbstractCegarLoop]: Abstraction has 17616 states and 32509 transitions. [2021-01-06 18:20:32,242 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:32,242 INFO L276 IsEmpty]: Start isEmpty. Operand 17616 states and 32509 transitions. [2021-01-06 18:20:32,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-01-06 18:20:32,246 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:32,246 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:32,247 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:20:32,247 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:32,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:32,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1528479508, now seen corresponding path program 1 times [2021-01-06 18:20:32,247 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:32,248 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340419598] [2021-01-06 18:20:32,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:32,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:32,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:32,335 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340419598] [2021-01-06 18:20:32,335 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:32,336 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:32,336 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [117534860] [2021-01-06 18:20:32,336 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:32,336 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:32,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:32,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:32,337 INFO L87 Difference]: Start difference. First operand 17616 states and 32509 transitions. Second operand 5 states. [2021-01-06 18:20:35,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:35,317 INFO L93 Difference]: Finished difference Result 44775 states and 82474 transitions. [2021-01-06 18:20:35,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:35,318 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2021-01-06 18:20:35,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:35,360 INFO L225 Difference]: With dead ends: 44775 [2021-01-06 18:20:35,360 INFO L226 Difference]: Without dead ends: 29203 [2021-01-06 18:20:35,375 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:20:35,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29203 states. [2021-01-06 18:20:36,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29203 to 17616. [2021-01-06 18:20:36,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17616 states. [2021-01-06 18:20:36,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17616 states to 17616 states and 32494 transitions. [2021-01-06 18:20:36,381 INFO L78 Accepts]: Start accepts. Automaton has 17616 states and 32494 transitions. Word has length 95 [2021-01-06 18:20:36,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:36,381 INFO L481 AbstractCegarLoop]: Abstraction has 17616 states and 32494 transitions. [2021-01-06 18:20:36,381 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:36,381 INFO L276 IsEmpty]: Start isEmpty. Operand 17616 states and 32494 transitions. [2021-01-06 18:20:36,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-01-06 18:20:36,385 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:36,385 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:36,385 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:20:36,386 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:36,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:36,386 INFO L82 PathProgramCache]: Analyzing trace with hash 1418694100, now seen corresponding path program 1 times [2021-01-06 18:20:36,386 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:36,386 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458877029] [2021-01-06 18:20:36,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:36,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:36,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:36,458 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458877029] [2021-01-06 18:20:36,458 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:36,458 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:36,458 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19496170] [2021-01-06 18:20:36,459 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:36,459 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:36,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:36,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:36,534 INFO L87 Difference]: Start difference. First operand 17616 states and 32494 transitions. Second operand 5 states. [2021-01-06 18:20:39,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:39,688 INFO L93 Difference]: Finished difference Result 44131 states and 81474 transitions. [2021-01-06 18:20:39,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:39,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2021-01-06 18:20:39,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:39,736 INFO L225 Difference]: With dead ends: 44131 [2021-01-06 18:20:39,737 INFO L226 Difference]: Without dead ends: 28388 [2021-01-06 18:20:39,754 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:39,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28388 states. [2021-01-06 18:20:40,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28388 to 17616. [2021-01-06 18:20:40,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17616 states. [2021-01-06 18:20:40,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17616 states to 17616 states and 32194 transitions. [2021-01-06 18:20:40,751 INFO L78 Accepts]: Start accepts. Automaton has 17616 states and 32194 transitions. Word has length 99 [2021-01-06 18:20:40,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:40,751 INFO L481 AbstractCegarLoop]: Abstraction has 17616 states and 32194 transitions. [2021-01-06 18:20:40,751 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:40,751 INFO L276 IsEmpty]: Start isEmpty. Operand 17616 states and 32194 transitions. [2021-01-06 18:20:40,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2021-01-06 18:20:40,761 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:40,761 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:40,761 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:20:40,762 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:40,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:40,762 INFO L82 PathProgramCache]: Analyzing trace with hash 167765381, now seen corresponding path program 1 times [2021-01-06 18:20:40,762 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:40,762 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864155187] [2021-01-06 18:20:40,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:40,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:40,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:40,929 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864155187] [2021-01-06 18:20:40,929 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:40,929 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:20:40,929 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [887447664] [2021-01-06 18:20:40,929 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:20:40,930 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:40,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:20:40,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:40,930 INFO L87 Difference]: Start difference. First operand 17616 states and 32194 transitions. Second operand 7 states. [2021-01-06 18:20:42,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:42,800 INFO L93 Difference]: Finished difference Result 29908 states and 54761 transitions. [2021-01-06 18:20:42,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:20:42,800 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2021-01-06 18:20:42,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:42,845 INFO L225 Difference]: With dead ends: 29908 [2021-01-06 18:20:42,845 INFO L226 Difference]: Without dead ends: 29895 [2021-01-06 18:20:42,854 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:42,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29895 states. [2021-01-06 18:20:44,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29895 to 17646. [2021-01-06 18:20:44,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17646 states. [2021-01-06 18:20:44,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17646 states to 17646 states and 32219 transitions. [2021-01-06 18:20:44,169 INFO L78 Accepts]: Start accepts. Automaton has 17646 states and 32219 transitions. Word has length 100 [2021-01-06 18:20:44,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:44,170 INFO L481 AbstractCegarLoop]: Abstraction has 17646 states and 32219 transitions. [2021-01-06 18:20:44,170 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:20:44,170 INFO L276 IsEmpty]: Start isEmpty. Operand 17646 states and 32219 transitions. [2021-01-06 18:20:44,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-01-06 18:20:44,176 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:44,177 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:44,177 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:20:44,177 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:44,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:44,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1326290871, now seen corresponding path program 1 times [2021-01-06 18:20:44,178 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:44,178 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194420238] [2021-01-06 18:20:44,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:44,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:44,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:44,284 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194420238] [2021-01-06 18:20:44,286 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:44,287 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:20:44,287 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704898584] [2021-01-06 18:20:44,287 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:20:44,287 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:44,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:20:44,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:44,288 INFO L87 Difference]: Start difference. First operand 17646 states and 32219 transitions. Second operand 7 states. [2021-01-06 18:20:50,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:50,590 INFO L93 Difference]: Finished difference Result 105497 states and 193873 transitions. [2021-01-06 18:20:50,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-01-06 18:20:50,591 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 116 [2021-01-06 18:20:50,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:50,726 INFO L225 Difference]: With dead ends: 105497 [2021-01-06 18:20:50,726 INFO L226 Difference]: Without dead ends: 89895 [2021-01-06 18:20:50,751 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:20:51,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89895 states. [2021-01-06 18:20:53,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89895 to 35266. [2021-01-06 18:20:53,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35266 states. [2021-01-06 18:20:53,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35266 states to 35266 states and 64404 transitions. [2021-01-06 18:20:53,724 INFO L78 Accepts]: Start accepts. Automaton has 35266 states and 64404 transitions. Word has length 116 [2021-01-06 18:20:53,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:53,724 INFO L481 AbstractCegarLoop]: Abstraction has 35266 states and 64404 transitions. [2021-01-06 18:20:53,724 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:20:53,724 INFO L276 IsEmpty]: Start isEmpty. Operand 35266 states and 64404 transitions. [2021-01-06 18:20:53,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-01-06 18:20:53,733 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:53,733 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:53,733 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:20:53,734 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:53,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:53,734 INFO L82 PathProgramCache]: Analyzing trace with hash -1691760195, now seen corresponding path program 1 times [2021-01-06 18:20:53,734 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:53,734 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239935704] [2021-01-06 18:20:53,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:53,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:53,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:53,809 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239935704] [2021-01-06 18:20:53,810 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:53,810 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:53,810 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059866919] [2021-01-06 18:20:53,810 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:53,811 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:53,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:53,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:53,811 INFO L87 Difference]: Start difference. First operand 35266 states and 64404 transitions. Second operand 3 states. [2021-01-06 18:20:58,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:58,518 INFO L93 Difference]: Finished difference Result 88696 states and 162082 transitions. [2021-01-06 18:20:58,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:58,519 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2021-01-06 18:20:58,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:58,611 INFO L225 Difference]: With dead ends: 88696 [2021-01-06 18:20:58,611 INFO L226 Difference]: Without dead ends: 57137 [2021-01-06 18:20:58,641 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:58,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57137 states. [2021-01-06 18:21:01,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57137 to 34516. [2021-01-06 18:21:01,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34516 states. [2021-01-06 18:21:01,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34516 states to 34516 states and 62844 transitions. [2021-01-06 18:21:01,449 INFO L78 Accepts]: Start accepts. Automaton has 34516 states and 62844 transitions. Word has length 117 [2021-01-06 18:21:01,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:01,450 INFO L481 AbstractCegarLoop]: Abstraction has 34516 states and 62844 transitions. [2021-01-06 18:21:01,450 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:01,450 INFO L276 IsEmpty]: Start isEmpty. Operand 34516 states and 62844 transitions. [2021-01-06 18:21:01,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-01-06 18:21:01,458 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:01,459 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:01,459 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:21:01,460 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:01,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:01,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1710797889, now seen corresponding path program 1 times [2021-01-06 18:21:01,460 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:01,461 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243584497] [2021-01-06 18:21:01,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:01,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:01,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:01,540 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243584497] [2021-01-06 18:21:01,541 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:01,541 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:01,541 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088731070] [2021-01-06 18:21:01,543 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:01,543 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:01,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:01,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:01,549 INFO L87 Difference]: Start difference. First operand 34516 states and 62844 transitions. Second operand 5 states. [2021-01-06 18:21:03,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:03,802 INFO L93 Difference]: Finished difference Result 51124 states and 93104 transitions. [2021-01-06 18:21:03,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:21:03,802 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2021-01-06 18:21:03,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:03,849 INFO L225 Difference]: With dead ends: 51124 [2021-01-06 18:21:03,849 INFO L226 Difference]: Without dead ends: 33733 [2021-01-06 18:21:03,862 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:21:03,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33733 states. [2021-01-06 18:21:06,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33733 to 33733. [2021-01-06 18:21:06,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33733 states. [2021-01-06 18:21:06,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33733 states to 33733 states and 61445 transitions. [2021-01-06 18:21:06,251 INFO L78 Accepts]: Start accepts. Automaton has 33733 states and 61445 transitions. Word has length 117 [2021-01-06 18:21:06,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:06,251 INFO L481 AbstractCegarLoop]: Abstraction has 33733 states and 61445 transitions. [2021-01-06 18:21:06,252 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:06,252 INFO L276 IsEmpty]: Start isEmpty. Operand 33733 states and 61445 transitions. [2021-01-06 18:21:06,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-01-06 18:21:06,265 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:06,265 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:06,266 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-01-06 18:21:06,266 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:06,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:06,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1873540204, now seen corresponding path program 1 times [2021-01-06 18:21:06,266 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:06,267 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592832099] [2021-01-06 18:21:06,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:06,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:06,385 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:06,386 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592832099] [2021-01-06 18:21:06,386 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:06,386 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:21:06,386 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307605461] [2021-01-06 18:21:06,387 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:06,387 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:06,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:06,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:06,388 INFO L87 Difference]: Start difference. First operand 33733 states and 61445 transitions. Second operand 6 states. [2021-01-06 18:21:15,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:15,510 INFO L93 Difference]: Finished difference Result 109720 states and 200992 transitions. [2021-01-06 18:21:15,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-01-06 18:21:15,510 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 133 [2021-01-06 18:21:15,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:15,643 INFO L225 Difference]: With dead ends: 109720 [2021-01-06 18:21:15,644 INFO L226 Difference]: Without dead ends: 78977 [2021-01-06 18:21:15,673 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:21:15,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78977 states. [2021-01-06 18:21:19,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78977 to 51489. [2021-01-06 18:21:19,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51489 states. [2021-01-06 18:21:19,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51489 states to 51489 states and 94009 transitions. [2021-01-06 18:21:19,438 INFO L78 Accepts]: Start accepts. Automaton has 51489 states and 94009 transitions. Word has length 133 [2021-01-06 18:21:19,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:19,439 INFO L481 AbstractCegarLoop]: Abstraction has 51489 states and 94009 transitions. [2021-01-06 18:21:19,439 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:19,439 INFO L276 IsEmpty]: Start isEmpty. Operand 51489 states and 94009 transitions. [2021-01-06 18:21:19,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-01-06 18:21:19,454 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:19,454 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:19,454 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-01-06 18:21:19,455 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:19,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:19,455 INFO L82 PathProgramCache]: Analyzing trace with hash -956201449, now seen corresponding path program 1 times [2021-01-06 18:21:19,455 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:19,455 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300521500] [2021-01-06 18:21:19,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:19,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:19,550 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 18:21:19,551 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300521500] [2021-01-06 18:21:19,551 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:19,551 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:19,551 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284353385] [2021-01-06 18:21:19,552 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:19,552 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:19,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:19,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:19,552 INFO L87 Difference]: Start difference. First operand 51489 states and 94009 transitions. Second operand 5 states. [2021-01-06 18:21:26,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:26,323 INFO L93 Difference]: Finished difference Result 146328 states and 267126 transitions. [2021-01-06 18:21:26,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-01-06 18:21:26,323 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 134 [2021-01-06 18:21:26,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:26,508 INFO L225 Difference]: With dead ends: 146328 [2021-01-06 18:21:26,508 INFO L226 Difference]: Without dead ends: 102855 [2021-01-06 18:21:26,556 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:21:26,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102855 states. [2021-01-06 18:21:33,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102855 to 102855. [2021-01-06 18:21:33,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102855 states. [2021-01-06 18:21:33,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102855 states to 102855 states and 187829 transitions. [2021-01-06 18:21:33,857 INFO L78 Accepts]: Start accepts. Automaton has 102855 states and 187829 transitions. Word has length 134 [2021-01-06 18:21:33,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:33,857 INFO L481 AbstractCegarLoop]: Abstraction has 102855 states and 187829 transitions. [2021-01-06 18:21:33,857 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:33,857 INFO L276 IsEmpty]: Start isEmpty. Operand 102855 states and 187829 transitions. [2021-01-06 18:21:33,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-01-06 18:21:33,888 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:33,899 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:33,899 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2021-01-06 18:21:33,899 INFO L429 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:33,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:33,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1670241759, now seen corresponding path program 1 times [2021-01-06 18:21:33,900 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:33,900 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810801278] [2021-01-06 18:21:33,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:33,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:33,993 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:33,993 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810801278] [2021-01-06 18:21:33,994 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:33,994 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:21:33,994 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900057394] [2021-01-06 18:21:33,994 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:33,995 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:33,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:33,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:33,995 INFO L87 Difference]: Start difference. First operand 102855 states and 187829 transitions. Second operand 6 states. [2021-01-06 18:21:51,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:51,093 INFO L93 Difference]: Finished difference Result 290815 states and 532007 transitions. [2021-01-06 18:21:51,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-01-06 18:21:51,093 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 134 [2021-01-06 18:21:51,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:51,658 INFO L225 Difference]: With dead ends: 290815 [2021-01-06 18:21:51,659 INFO L226 Difference]: Without dead ends: 193948 [2021-01-06 18:21:51,733 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:21:51,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193948 states. [2021-01-06 18:22:01,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193948 to 138339. [2021-01-06 18:22:01,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138339 states. [2021-01-06 18:22:01,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138339 states to 138339 states and 252829 transitions. [2021-01-06 18:22:01,979 INFO L78 Accepts]: Start accepts. Automaton has 138339 states and 252829 transitions. Word has length 134 [2021-01-06 18:22:01,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:01,991 INFO L481 AbstractCegarLoop]: Abstraction has 138339 states and 252829 transitions. [2021-01-06 18:22:01,991 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:01,991 INFO L276 IsEmpty]: Start isEmpty. Operand 138339 states and 252829 transitions. [2021-01-06 18:22:02,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-01-06 18:22:02,021 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:02,022 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:02,022 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-01-06 18:22:02,022 INFO L429 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:02,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:02,022 INFO L82 PathProgramCache]: Analyzing trace with hash 562198963, now seen corresponding path program 1 times [2021-01-06 18:22:02,022 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:02,022 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935962162] [2021-01-06 18:22:02,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:02,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:02,136 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 18:22:02,137 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935962162] [2021-01-06 18:22:02,137 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:02,137 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:02,137 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405766168] [2021-01-06 18:22:02,138 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:22:02,138 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:02,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:22:02,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:22:02,138 INFO L87 Difference]: Start difference. First operand 138339 states and 252829 transitions. Second operand 6 states.