/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product29.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:20:06,642 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:20:06,645 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:20:06,696 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:20:06,697 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:20:06,702 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:20:06,705 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:20:06,711 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:20:06,714 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:20:06,721 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:20:06,725 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:20:06,726 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:20:06,727 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:20:06,730 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:20:06,732 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:20:06,736 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:20:06,737 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:20:06,737 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:20:06,747 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:20:06,752 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:20:06,755 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:20:06,758 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:20:06,759 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:20:06,762 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:20:06,772 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:20:06,773 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:20:06,773 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:20:06,776 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:20:06,777 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:20:06,778 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:20:06,779 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:20:06,780 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:20:06,782 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:20:06,783 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:20:06,784 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:20:06,784 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:20:06,785 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:20:06,792 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:20:06,792 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:20:06,793 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:20:06,794 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:20:06,795 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:20:06,863 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:20:06,864 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:20:06,868 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:20:06,868 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:20:06,869 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:20:06,869 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:20:06,869 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:20:06,869 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:20:06,870 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:20:06,870 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:20:06,871 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:20:06,872 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:20:06,872 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:20:06,872 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:20:06,872 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:20:06,872 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:20:06,873 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:20:06,873 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:20:06,873 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:20:06,873 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:20:06,873 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:20:06,874 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:20:06,874 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:20:06,874 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:20:06,874 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:20:06,874 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:20:07,272 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:20:07,300 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:20:07,303 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:20:07,305 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:20:07,305 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:20:07,307 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product29.cil.c [2021-01-06 18:20:07,392 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/93736d0a7/c4a1e8dd04b743e59f70781633ef7ea2/FLAG33d79b15e [2021-01-06 18:20:08,216 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:20:08,217 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product29.cil.c [2021-01-06 18:20:08,242 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/93736d0a7/c4a1e8dd04b743e59f70781633ef7ea2/FLAG33d79b15e [2021-01-06 18:20:08,373 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/93736d0a7/c4a1e8dd04b743e59f70781633ef7ea2 [2021-01-06 18:20:08,376 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:20:08,379 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:20:08,381 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:20:08,381 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:20:08,385 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:20:08,386 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:20:08" (1/1) ... [2021-01-06 18:20:08,387 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cfb5989 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:08, skipping insertion in model container [2021-01-06 18:20:08,387 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:20:08" (1/1) ... [2021-01-06 18:20:08,396 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:20:08,469 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] [2021-01-06 18:20:08,704 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product29.cil.c[3793,3806] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] [2021-01-06 18:20:09,176 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:20:09,190 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] [2021-01-06 18:20:09,211 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product29.cil.c[3793,3806] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] [2021-01-06 18:20:09,381 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:20:09,492 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:20:09,492 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09 WrapperNode [2021-01-06 18:20:09,492 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:20:09,494 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:20:09,494 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:20:09,494 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:20:09,501 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:09,535 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:09,807 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:20:09,809 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:20:09,810 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:20:09,810 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:20:09,821 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:09,821 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:09,879 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:09,879 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:10,009 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:10,111 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:10,141 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... [2021-01-06 18:20:10,307 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:20:10,313 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:20:10,313 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:20:10,313 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:20:10,314 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:20:10,489 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:20:10,489 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:20:10,489 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:20:10,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:20:18,137 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:20:18,138 INFO L299 CfgBuilder]: Removed 809 assume(true) statements. [2021-01-06 18:20:18,148 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:20:18 BoogieIcfgContainer [2021-01-06 18:20:18,148 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:20:18,151 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:20:18,152 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:20:18,155 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:20:18,157 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:20:08" (1/3) ... [2021-01-06 18:20:18,158 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3975beaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:20:18, skipping insertion in model container [2021-01-06 18:20:18,158 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:09" (2/3) ... [2021-01-06 18:20:18,159 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3975beaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:20:18, skipping insertion in model container [2021-01-06 18:20:18,159 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:20:18" (3/3) ... [2021-01-06 18:20:18,161 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product29.cil.c [2021-01-06 18:20:18,172 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:20:18,180 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:20:18,202 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:20:18,264 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:20:18,265 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:20:18,265 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:20:18,265 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:20:18,268 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:20:18,268 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:20:18,268 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:20:18,269 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:20:18,349 INFO L276 IsEmpty]: Start isEmpty. Operand 3565 states. [2021-01-06 18:20:18,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:20:18,375 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:18,376 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:18,376 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:18,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:18,383 INFO L82 PathProgramCache]: Analyzing trace with hash -347031252, now seen corresponding path program 1 times [2021-01-06 18:20:18,393 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:18,394 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478316506] [2021-01-06 18:20:18,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:18,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:18,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:18,953 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478316506] [2021-01-06 18:20:18,954 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:18,954 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:18,956 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065037251] [2021-01-06 18:20:18,966 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:18,967 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:18,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:18,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:18,984 INFO L87 Difference]: Start difference. First operand 3565 states. Second operand 3 states. [2021-01-06 18:20:19,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:19,385 INFO L93 Difference]: Finished difference Result 7121 states and 13443 transitions. [2021-01-06 18:20:19,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:19,387 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2021-01-06 18:20:19,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:19,462 INFO L225 Difference]: With dead ends: 7121 [2021-01-06 18:20:19,462 INFO L226 Difference]: Without dead ends: 3561 [2021-01-06 18:20:19,478 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:19,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3561 states. [2021-01-06 18:20:19,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3561 to 3561. [2021-01-06 18:20:19,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3561 states. [2021-01-06 18:20:19,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3561 states to 3561 states and 6716 transitions. [2021-01-06 18:20:19,728 INFO L78 Accepts]: Start accepts. Automaton has 3561 states and 6716 transitions. Word has length 52 [2021-01-06 18:20:19,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:19,729 INFO L481 AbstractCegarLoop]: Abstraction has 3561 states and 6716 transitions. [2021-01-06 18:20:19,729 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:19,729 INFO L276 IsEmpty]: Start isEmpty. Operand 3561 states and 6716 transitions. [2021-01-06 18:20:19,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-01-06 18:20:19,735 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:19,736 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:19,737 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:20:19,737 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:19,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:19,741 INFO L82 PathProgramCache]: Analyzing trace with hash -507788568, now seen corresponding path program 1 times [2021-01-06 18:20:19,741 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:19,742 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54312433] [2021-01-06 18:20:19,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:19,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:19,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:19,898 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54312433] [2021-01-06 18:20:19,898 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:19,899 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:19,899 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814433594] [2021-01-06 18:20:19,900 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:19,901 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:19,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:19,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:19,902 INFO L87 Difference]: Start difference. First operand 3561 states and 6716 transitions. Second operand 3 states. [2021-01-06 18:20:20,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:20,214 INFO L93 Difference]: Finished difference Result 10603 states and 20008 transitions. [2021-01-06 18:20:20,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:20,215 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2021-01-06 18:20:20,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:20,260 INFO L225 Difference]: With dead ends: 10603 [2021-01-06 18:20:20,260 INFO L226 Difference]: Without dead ends: 7055 [2021-01-06 18:20:20,273 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:20,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7055 states. [2021-01-06 18:20:20,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7055 to 3561. [2021-01-06 18:20:20,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3561 states. [2021-01-06 18:20:20,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3561 states to 3561 states and 6711 transitions. [2021-01-06 18:20:20,457 INFO L78 Accepts]: Start accepts. Automaton has 3561 states and 6711 transitions. Word has length 56 [2021-01-06 18:20:20,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:20,458 INFO L481 AbstractCegarLoop]: Abstraction has 3561 states and 6711 transitions. [2021-01-06 18:20:20,458 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:20,458 INFO L276 IsEmpty]: Start isEmpty. Operand 3561 states and 6711 transitions. [2021-01-06 18:20:20,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:20:20,466 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:20,466 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:20,466 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:20:20,467 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:20,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:20,469 INFO L82 PathProgramCache]: Analyzing trace with hash -322695074, now seen corresponding path program 1 times [2021-01-06 18:20:20,469 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:20,470 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502356810] [2021-01-06 18:20:20,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:20,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:20,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:20,662 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502356810] [2021-01-06 18:20:20,662 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:20,662 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:20,663 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954895160] [2021-01-06 18:20:20,664 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:20,664 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:20,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:20,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:20,666 INFO L87 Difference]: Start difference. First operand 3561 states and 6711 transitions. Second operand 6 states. [2021-01-06 18:20:21,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:21,600 INFO L93 Difference]: Finished difference Result 14019 states and 26443 transitions. [2021-01-06 18:20:21,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:20:21,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2021-01-06 18:20:21,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:21,693 INFO L225 Difference]: With dead ends: 14019 [2021-01-06 18:20:21,693 INFO L226 Difference]: Without dead ends: 10501 [2021-01-06 18:20:21,706 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2021-01-06 18:20:21,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10501 states. [2021-01-06 18:20:21,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10501 to 3557. [2021-01-06 18:20:21,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3557 states. [2021-01-06 18:20:21,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3557 states to 3557 states and 6700 transitions. [2021-01-06 18:20:21,960 INFO L78 Accepts]: Start accepts. Automaton has 3557 states and 6700 transitions. Word has length 60 [2021-01-06 18:20:21,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:21,961 INFO L481 AbstractCegarLoop]: Abstraction has 3557 states and 6700 transitions. [2021-01-06 18:20:21,961 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:21,961 INFO L276 IsEmpty]: Start isEmpty. Operand 3557 states and 6700 transitions. [2021-01-06 18:20:21,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-01-06 18:20:21,966 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:21,966 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:21,966 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:20:21,966 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:21,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:21,967 INFO L82 PathProgramCache]: Analyzing trace with hash 1416716573, now seen corresponding path program 1 times [2021-01-06 18:20:21,968 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:21,968 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026406236] [2021-01-06 18:20:21,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:22,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:22,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:22,098 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026406236] [2021-01-06 18:20:22,100 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:22,100 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:22,101 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489290249] [2021-01-06 18:20:22,101 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:22,101 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:22,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:22,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:22,103 INFO L87 Difference]: Start difference. First operand 3557 states and 6700 transitions. Second operand 4 states. [2021-01-06 18:20:22,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:22,879 INFO L93 Difference]: Finished difference Result 10559 states and 19910 transitions. [2021-01-06 18:20:22,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:22,880 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 62 [2021-01-06 18:20:22,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:22,903 INFO L225 Difference]: With dead ends: 10559 [2021-01-06 18:20:22,903 INFO L226 Difference]: Without dead ends: 7045 [2021-01-06 18:20:22,912 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:22,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7045 states. [2021-01-06 18:20:23,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7045 to 3557. [2021-01-06 18:20:23,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3557 states. [2021-01-06 18:20:23,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3557 states to 3557 states and 6691 transitions. [2021-01-06 18:20:23,135 INFO L78 Accepts]: Start accepts. Automaton has 3557 states and 6691 transitions. Word has length 62 [2021-01-06 18:20:23,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:23,138 INFO L481 AbstractCegarLoop]: Abstraction has 3557 states and 6691 transitions. [2021-01-06 18:20:23,138 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:23,138 INFO L276 IsEmpty]: Start isEmpty. Operand 3557 states and 6691 transitions. [2021-01-06 18:20:23,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-01-06 18:20:23,145 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:23,145 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:23,146 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:20:23,146 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:23,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:23,147 INFO L82 PathProgramCache]: Analyzing trace with hash 1879015326, now seen corresponding path program 1 times [2021-01-06 18:20:23,147 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:23,147 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277982307] [2021-01-06 18:20:23,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:23,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:23,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:23,260 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277982307] [2021-01-06 18:20:23,260 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:23,260 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:23,260 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762027510] [2021-01-06 18:20:23,262 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:23,262 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:23,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:23,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:23,264 INFO L87 Difference]: Start difference. First operand 3557 states and 6691 transitions. Second operand 4 states. [2021-01-06 18:20:23,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:23,916 INFO L93 Difference]: Finished difference Result 10559 states and 19892 transitions. [2021-01-06 18:20:23,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:23,917 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2021-01-06 18:20:23,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:23,938 INFO L225 Difference]: With dead ends: 10559 [2021-01-06 18:20:23,939 INFO L226 Difference]: Without dead ends: 7045 [2021-01-06 18:20:23,947 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:23,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7045 states. [2021-01-06 18:20:24,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7045 to 3557. [2021-01-06 18:20:24,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3557 states. [2021-01-06 18:20:24,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3557 states to 3557 states and 6682 transitions. [2021-01-06 18:20:24,149 INFO L78 Accepts]: Start accepts. Automaton has 3557 states and 6682 transitions. Word has length 64 [2021-01-06 18:20:24,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:24,150 INFO L481 AbstractCegarLoop]: Abstraction has 3557 states and 6682 transitions. [2021-01-06 18:20:24,150 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:24,150 INFO L276 IsEmpty]: Start isEmpty. Operand 3557 states and 6682 transitions. [2021-01-06 18:20:24,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:20:24,154 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:24,154 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:24,154 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:20:24,154 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:24,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:24,155 INFO L82 PathProgramCache]: Analyzing trace with hash -348121293, now seen corresponding path program 1 times [2021-01-06 18:20:24,155 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:24,155 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626953463] [2021-01-06 18:20:24,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:24,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:24,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:24,283 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626953463] [2021-01-06 18:20:24,283 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:24,283 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:24,284 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649899988] [2021-01-06 18:20:24,284 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:24,284 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:24,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:24,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:24,285 INFO L87 Difference]: Start difference. First operand 3557 states and 6682 transitions. Second operand 4 states. [2021-01-06 18:20:25,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:25,226 INFO L93 Difference]: Finished difference Result 17475 states and 32920 transitions. [2021-01-06 18:20:25,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:25,227 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2021-01-06 18:20:25,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:25,268 INFO L225 Difference]: With dead ends: 17475 [2021-01-06 18:20:25,269 INFO L226 Difference]: Without dead ends: 13961 [2021-01-06 18:20:25,280 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:25,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13961 states. [2021-01-06 18:20:25,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13961 to 3557. [2021-01-06 18:20:25,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3557 states. [2021-01-06 18:20:25,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3557 states to 3557 states and 6678 transitions. [2021-01-06 18:20:25,534 INFO L78 Accepts]: Start accepts. Automaton has 3557 states and 6678 transitions. Word has length 66 [2021-01-06 18:20:25,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:25,535 INFO L481 AbstractCegarLoop]: Abstraction has 3557 states and 6678 transitions. [2021-01-06 18:20:25,535 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:25,535 INFO L276 IsEmpty]: Start isEmpty. Operand 3557 states and 6678 transitions. [2021-01-06 18:20:25,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:20:25,539 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:25,540 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:25,540 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:20:25,540 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:25,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:25,541 INFO L82 PathProgramCache]: Analyzing trace with hash -1007056205, now seen corresponding path program 1 times [2021-01-06 18:20:25,545 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:25,546 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689160332] [2021-01-06 18:20:25,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:25,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:25,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:25,645 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689160332] [2021-01-06 18:20:25,646 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:25,646 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:25,646 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1984034810] [2021-01-06 18:20:25,647 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:25,648 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:25,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:25,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:25,648 INFO L87 Difference]: Start difference. First operand 3557 states and 6678 transitions. Second operand 4 states. [2021-01-06 18:20:26,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:26,301 INFO L93 Difference]: Finished difference Result 13996 states and 26357 transitions. [2021-01-06 18:20:26,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:26,302 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2021-01-06 18:20:26,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:26,333 INFO L225 Difference]: With dead ends: 13996 [2021-01-06 18:20:26,333 INFO L226 Difference]: Without dead ends: 10461 [2021-01-06 18:20:26,344 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:26,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10461 states. [2021-01-06 18:20:26,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10461 to 3539. [2021-01-06 18:20:26,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:20:26,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6647 transitions. [2021-01-06 18:20:26,568 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6647 transitions. Word has length 66 [2021-01-06 18:20:26,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:26,568 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6647 transitions. [2021-01-06 18:20:26,568 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:26,568 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6647 transitions. [2021-01-06 18:20:26,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-01-06 18:20:26,573 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:26,573 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:26,573 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:20:26,573 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:26,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:26,574 INFO L82 PathProgramCache]: Analyzing trace with hash 1165671086, now seen corresponding path program 1 times [2021-01-06 18:20:26,574 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:26,574 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297077062] [2021-01-06 18:20:26,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:26,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:26,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:26,671 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297077062] [2021-01-06 18:20:26,671 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:26,671 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:26,671 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005855176] [2021-01-06 18:20:26,672 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:26,672 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:26,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:26,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:26,673 INFO L87 Difference]: Start difference. First operand 3539 states and 6647 transitions. Second operand 4 states. [2021-01-06 18:20:27,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:27,270 INFO L93 Difference]: Finished difference Result 10523 states and 19805 transitions. [2021-01-06 18:20:27,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:27,271 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2021-01-06 18:20:27,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:27,293 INFO L225 Difference]: With dead ends: 10523 [2021-01-06 18:20:27,293 INFO L226 Difference]: Without dead ends: 7006 [2021-01-06 18:20:27,302 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:27,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7006 states. [2021-01-06 18:20:27,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7006 to 3539. [2021-01-06 18:20:27,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:20:27,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6641 transitions. [2021-01-06 18:20:27,500 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6641 transitions. Word has length 67 [2021-01-06 18:20:27,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:27,502 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6641 transitions. [2021-01-06 18:20:27,502 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:27,502 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6641 transitions. [2021-01-06 18:20:27,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:20:27,513 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:27,513 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:27,513 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:20:27,513 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:27,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:27,514 INFO L82 PathProgramCache]: Analyzing trace with hash 1401532398, now seen corresponding path program 1 times [2021-01-06 18:20:27,514 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:27,515 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463677886] [2021-01-06 18:20:27,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:27,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:27,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:27,601 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463677886] [2021-01-06 18:20:27,601 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:27,601 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:27,601 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454477738] [2021-01-06 18:20:27,602 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:27,603 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:27,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:27,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:27,604 INFO L87 Difference]: Start difference. First operand 3539 states and 6641 transitions. Second operand 4 states. [2021-01-06 18:20:28,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:28,086 INFO L93 Difference]: Finished difference Result 10523 states and 19793 transitions. [2021-01-06 18:20:28,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:28,087 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2021-01-06 18:20:28,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:28,109 INFO L225 Difference]: With dead ends: 10523 [2021-01-06 18:20:28,109 INFO L226 Difference]: Without dead ends: 7006 [2021-01-06 18:20:28,117 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:28,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7006 states. [2021-01-06 18:20:28,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7006 to 3539. [2021-01-06 18:20:28,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:20:28,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6635 transitions. [2021-01-06 18:20:28,330 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6635 transitions. Word has length 68 [2021-01-06 18:20:28,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:28,331 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6635 transitions. [2021-01-06 18:20:28,331 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:28,331 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6635 transitions. [2021-01-06 18:20:28,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:20:28,335 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:28,336 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:28,336 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:20:28,336 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:28,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:28,337 INFO L82 PathProgramCache]: Analyzing trace with hash 676236297, now seen corresponding path program 1 times [2021-01-06 18:20:28,337 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:28,337 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603275126] [2021-01-06 18:20:28,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:28,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:28,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:28,434 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [603275126] [2021-01-06 18:20:28,435 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:28,435 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:20:28,435 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582498440] [2021-01-06 18:20:28,435 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:20:28,435 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:28,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:20:28,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:28,441 INFO L87 Difference]: Start difference. First operand 3539 states and 6635 transitions. Second operand 7 states. [2021-01-06 18:20:29,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:29,755 INFO L93 Difference]: Finished difference Result 17446 states and 32834 transitions. [2021-01-06 18:20:29,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:29,756 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2021-01-06 18:20:29,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:29,812 INFO L225 Difference]: With dead ends: 17446 [2021-01-06 18:20:29,812 INFO L226 Difference]: Without dead ends: 13935 [2021-01-06 18:20:29,822 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:20:29,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13935 states. [2021-01-06 18:20:30,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13935 to 3541. [2021-01-06 18:20:30,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3541 states. [2021-01-06 18:20:30,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3541 states to 3541 states and 6636 transitions. [2021-01-06 18:20:30,088 INFO L78 Accepts]: Start accepts. Automaton has 3541 states and 6636 transitions. Word has length 69 [2021-01-06 18:20:30,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:30,088 INFO L481 AbstractCegarLoop]: Abstraction has 3541 states and 6636 transitions. [2021-01-06 18:20:30,089 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:20:30,089 INFO L276 IsEmpty]: Start isEmpty. Operand 3541 states and 6636 transitions. [2021-01-06 18:20:30,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-01-06 18:20:30,093 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:30,093 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:30,093 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:20:30,094 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:30,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:30,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1933078292, now seen corresponding path program 1 times [2021-01-06 18:20:30,094 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:30,095 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929486971] [2021-01-06 18:20:30,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:30,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:30,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:30,184 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929486971] [2021-01-06 18:20:30,185 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:30,185 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:20:30,185 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73713668] [2021-01-06 18:20:30,186 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:20:30,186 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:30,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:20:30,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:30,187 INFO L87 Difference]: Start difference. First operand 3541 states and 6636 transitions. Second operand 7 states. [2021-01-06 18:20:31,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:31,182 INFO L93 Difference]: Finished difference Result 17438 states and 32813 transitions. [2021-01-06 18:20:31,182 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:31,182 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 71 [2021-01-06 18:20:31,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:31,225 INFO L225 Difference]: With dead ends: 17438 [2021-01-06 18:20:31,226 INFO L226 Difference]: Without dead ends: 13930 [2021-01-06 18:20:31,234 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:20:31,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13930 states. [2021-01-06 18:20:31,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13930 to 3546. [2021-01-06 18:20:31,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3546 states. [2021-01-06 18:20:31,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3546 states to 3546 states and 6644 transitions. [2021-01-06 18:20:31,534 INFO L78 Accepts]: Start accepts. Automaton has 3546 states and 6644 transitions. Word has length 71 [2021-01-06 18:20:31,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:31,535 INFO L481 AbstractCegarLoop]: Abstraction has 3546 states and 6644 transitions. [2021-01-06 18:20:31,535 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:20:31,535 INFO L276 IsEmpty]: Start isEmpty. Operand 3546 states and 6644 transitions. [2021-01-06 18:20:31,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-01-06 18:20:31,539 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:31,539 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:31,539 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:20:31,540 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:31,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:31,540 INFO L82 PathProgramCache]: Analyzing trace with hash 919005439, now seen corresponding path program 1 times [2021-01-06 18:20:31,541 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:31,541 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610901370] [2021-01-06 18:20:31,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:31,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:31,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:31,604 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610901370] [2021-01-06 18:20:31,604 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:31,604 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:31,605 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949491146] [2021-01-06 18:20:31,605 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:31,605 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:31,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:31,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:31,606 INFO L87 Difference]: Start difference. First operand 3546 states and 6644 transitions. Second operand 3 states. [2021-01-06 18:20:31,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:31,825 INFO L93 Difference]: Finished difference Result 7034 states and 13207 transitions. [2021-01-06 18:20:31,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:31,825 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2021-01-06 18:20:31,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:31,841 INFO L225 Difference]: With dead ends: 7034 [2021-01-06 18:20:31,842 INFO L226 Difference]: Without dead ends: 3525 [2021-01-06 18:20:31,848 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:31,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3525 states. [2021-01-06 18:20:32,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3525 to 3525. [2021-01-06 18:20:32,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3525 states. [2021-01-06 18:20:32,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3525 states to 3525 states and 6609 transitions. [2021-01-06 18:20:32,075 INFO L78 Accepts]: Start accepts. Automaton has 3525 states and 6609 transitions. Word has length 73 [2021-01-06 18:20:32,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:32,075 INFO L481 AbstractCegarLoop]: Abstraction has 3525 states and 6609 transitions. [2021-01-06 18:20:32,075 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:32,075 INFO L276 IsEmpty]: Start isEmpty. Operand 3525 states and 6609 transitions. [2021-01-06 18:20:32,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-01-06 18:20:32,079 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:32,079 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:32,079 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:20:32,080 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:32,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:32,080 INFO L82 PathProgramCache]: Analyzing trace with hash 656941399, now seen corresponding path program 1 times [2021-01-06 18:20:32,080 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:32,081 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563529123] [2021-01-06 18:20:32,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:32,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:32,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:32,185 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563529123] [2021-01-06 18:20:32,185 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:32,185 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:32,186 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034986872] [2021-01-06 18:20:32,186 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:32,186 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:32,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:32,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:32,188 INFO L87 Difference]: Start difference. First operand 3525 states and 6609 transitions. Second operand 5 states. [2021-01-06 18:20:32,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:32,514 INFO L93 Difference]: Finished difference Result 6983 states and 13130 transitions. [2021-01-06 18:20:32,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:32,515 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2021-01-06 18:20:32,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:32,524 INFO L225 Difference]: With dead ends: 6983 [2021-01-06 18:20:32,524 INFO L226 Difference]: Without dead ends: 3519 [2021-01-06 18:20:32,530 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:32,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3519 states. [2021-01-06 18:20:32,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3519 to 3519. [2021-01-06 18:20:32,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3519 states. [2021-01-06 18:20:32,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3519 states to 3519 states and 6600 transitions. [2021-01-06 18:20:32,777 INFO L78 Accepts]: Start accepts. Automaton has 3519 states and 6600 transitions. Word has length 74 [2021-01-06 18:20:32,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:32,779 INFO L481 AbstractCegarLoop]: Abstraction has 3519 states and 6600 transitions. [2021-01-06 18:20:32,780 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:32,780 INFO L276 IsEmpty]: Start isEmpty. Operand 3519 states and 6600 transitions. [2021-01-06 18:20:32,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-01-06 18:20:32,785 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:32,786 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:32,786 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:20:32,786 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:32,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:32,787 INFO L82 PathProgramCache]: Analyzing trace with hash 1341387991, now seen corresponding path program 1 times [2021-01-06 18:20:32,787 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:32,788 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065016920] [2021-01-06 18:20:32,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:32,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:32,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:32,876 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065016920] [2021-01-06 18:20:32,876 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:32,876 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:32,876 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [467449178] [2021-01-06 18:20:32,877 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:32,877 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:32,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:32,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:32,878 INFO L87 Difference]: Start difference. First operand 3519 states and 6600 transitions. Second operand 4 states. [2021-01-06 18:20:33,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:33,141 INFO L93 Difference]: Finished difference Result 6977 states and 13121 transitions. [2021-01-06 18:20:33,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:20:33,142 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2021-01-06 18:20:33,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:33,153 INFO L225 Difference]: With dead ends: 6977 [2021-01-06 18:20:33,153 INFO L226 Difference]: Without dead ends: 3505 [2021-01-06 18:20:33,162 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:33,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3505 states. [2021-01-06 18:20:33,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3505 to 3505. [2021-01-06 18:20:33,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3505 states. [2021-01-06 18:20:33,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3505 states to 3505 states and 6579 transitions. [2021-01-06 18:20:33,488 INFO L78 Accepts]: Start accepts. Automaton has 3505 states and 6579 transitions. Word has length 74 [2021-01-06 18:20:33,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:33,488 INFO L481 AbstractCegarLoop]: Abstraction has 3505 states and 6579 transitions. [2021-01-06 18:20:33,488 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:33,488 INFO L276 IsEmpty]: Start isEmpty. Operand 3505 states and 6579 transitions. [2021-01-06 18:20:33,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:20:33,493 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:33,493 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:33,493 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:20:33,493 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:33,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:33,494 INFO L82 PathProgramCache]: Analyzing trace with hash -953941110, now seen corresponding path program 1 times [2021-01-06 18:20:33,494 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:33,495 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654950991] [2021-01-06 18:20:33,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:33,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:33,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:33,625 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654950991] [2021-01-06 18:20:33,625 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:33,625 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:33,626 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646030695] [2021-01-06 18:20:33,626 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:33,626 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:33,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:33,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:33,627 INFO L87 Difference]: Start difference. First operand 3505 states and 6579 transitions. Second operand 6 states. [2021-01-06 18:20:34,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:34,057 INFO L93 Difference]: Finished difference Result 6977 states and 13116 transitions. [2021-01-06 18:20:34,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:34,058 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2021-01-06 18:20:34,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:34,068 INFO L225 Difference]: With dead ends: 6977 [2021-01-06 18:20:34,068 INFO L226 Difference]: Without dead ends: 3525 [2021-01-06 18:20:34,076 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:34,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3525 states. [2021-01-06 18:20:34,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3525 to 3505. [2021-01-06 18:20:34,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3505 states. [2021-01-06 18:20:34,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3505 states to 3505 states and 6578 transitions. [2021-01-06 18:20:34,375 INFO L78 Accepts]: Start accepts. Automaton has 3505 states and 6578 transitions. Word has length 75 [2021-01-06 18:20:34,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:34,376 INFO L481 AbstractCegarLoop]: Abstraction has 3505 states and 6578 transitions. [2021-01-06 18:20:34,376 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:34,376 INFO L276 IsEmpty]: Start isEmpty. Operand 3505 states and 6578 transitions. [2021-01-06 18:20:34,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-01-06 18:20:34,380 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:34,380 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:34,380 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:20:34,381 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:34,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:34,381 INFO L82 PathProgramCache]: Analyzing trace with hash 461884350, now seen corresponding path program 1 times [2021-01-06 18:20:34,381 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:34,382 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5085539] [2021-01-06 18:20:34,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:34,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:34,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:34,485 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5085539] [2021-01-06 18:20:34,487 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:34,488 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:34,488 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082034856] [2021-01-06 18:20:34,488 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:34,488 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:34,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:34,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:34,489 INFO L87 Difference]: Start difference. First operand 3505 states and 6578 transitions. Second operand 6 states. [2021-01-06 18:20:34,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:34,901 INFO L93 Difference]: Finished difference Result 6967 states and 13097 transitions. [2021-01-06 18:20:34,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:34,901 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 76 [2021-01-06 18:20:34,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:34,910 INFO L225 Difference]: With dead ends: 6967 [2021-01-06 18:20:34,910 INFO L226 Difference]: Without dead ends: 3520 [2021-01-06 18:20:34,917 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:34,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3520 states. [2021-01-06 18:20:35,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3520 to 3505. [2021-01-06 18:20:35,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3505 states. [2021-01-06 18:20:35,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3505 states to 3505 states and 6577 transitions. [2021-01-06 18:20:35,168 INFO L78 Accepts]: Start accepts. Automaton has 3505 states and 6577 transitions. Word has length 76 [2021-01-06 18:20:35,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:35,169 INFO L481 AbstractCegarLoop]: Abstraction has 3505 states and 6577 transitions. [2021-01-06 18:20:35,169 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:35,169 INFO L276 IsEmpty]: Start isEmpty. Operand 3505 states and 6577 transitions. [2021-01-06 18:20:35,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-01-06 18:20:35,172 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:35,172 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:35,173 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:20:35,173 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:35,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:35,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1274391233, now seen corresponding path program 1 times [2021-01-06 18:20:35,174 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:35,174 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731200103] [2021-01-06 18:20:35,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:35,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:35,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:35,274 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731200103] [2021-01-06 18:20:35,275 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:35,275 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:35,275 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635736776] [2021-01-06 18:20:35,276 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:35,276 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:35,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:35,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:35,277 INFO L87 Difference]: Start difference. First operand 3505 states and 6577 transitions. Second operand 3 states. [2021-01-06 18:20:35,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:35,875 INFO L93 Difference]: Finished difference Result 8372 states and 15750 transitions. [2021-01-06 18:20:35,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:35,876 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 77 [2021-01-06 18:20:35,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:35,889 INFO L225 Difference]: With dead ends: 8372 [2021-01-06 18:20:35,889 INFO L226 Difference]: Without dead ends: 5810 [2021-01-06 18:20:35,896 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:35,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5810 states. [2021-01-06 18:20:36,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5810 to 5795. [2021-01-06 18:20:36,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5795 states. [2021-01-06 18:20:36,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5795 states to 5795 states and 10881 transitions. [2021-01-06 18:20:36,382 INFO L78 Accepts]: Start accepts. Automaton has 5795 states and 10881 transitions. Word has length 77 [2021-01-06 18:20:36,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:36,382 INFO L481 AbstractCegarLoop]: Abstraction has 5795 states and 10881 transitions. [2021-01-06 18:20:36,382 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:36,383 INFO L276 IsEmpty]: Start isEmpty. Operand 5795 states and 10881 transitions. [2021-01-06 18:20:36,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:20:36,386 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:36,386 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:36,386 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:20:36,387 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:36,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:36,387 INFO L82 PathProgramCache]: Analyzing trace with hash -174588988, now seen corresponding path program 1 times [2021-01-06 18:20:36,387 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:36,388 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416970850] [2021-01-06 18:20:36,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:36,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:36,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:36,470 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416970850] [2021-01-06 18:20:36,470 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:36,470 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:36,474 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835554281] [2021-01-06 18:20:36,476 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:36,477 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:36,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:36,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:36,478 INFO L87 Difference]: Start difference. First operand 5795 states and 10881 transitions. Second operand 3 states. [2021-01-06 18:20:37,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:37,276 INFO L93 Difference]: Finished difference Result 14554 states and 27367 transitions. [2021-01-06 18:20:37,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:37,277 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2021-01-06 18:20:37,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:37,300 INFO L225 Difference]: With dead ends: 14554 [2021-01-06 18:20:37,300 INFO L226 Difference]: Without dead ends: 10292 [2021-01-06 18:20:37,312 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:37,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10292 states. [2021-01-06 18:20:37,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10292 to 10277. [2021-01-06 18:20:37,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10277 states. [2021-01-06 18:20:38,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10277 states to 10277 states and 19303 transitions. [2021-01-06 18:20:38,006 INFO L78 Accepts]: Start accepts. Automaton has 10277 states and 19303 transitions. Word has length 78 [2021-01-06 18:20:38,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:38,007 INFO L481 AbstractCegarLoop]: Abstraction has 10277 states and 19303 transitions. [2021-01-06 18:20:38,007 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:38,007 INFO L276 IsEmpty]: Start isEmpty. Operand 10277 states and 19303 transitions. [2021-01-06 18:20:38,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-01-06 18:20:38,010 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:38,010 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:38,011 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:20:38,011 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:38,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:38,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1488397348, now seen corresponding path program 1 times [2021-01-06 18:20:38,012 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:38,012 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397346008] [2021-01-06 18:20:38,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:38,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:38,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:38,080 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1397346008] [2021-01-06 18:20:38,080 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:38,080 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:38,081 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911989030] [2021-01-06 18:20:38,081 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:38,081 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:38,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:38,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:38,082 INFO L87 Difference]: Start difference. First operand 10277 states and 19303 transitions. Second operand 3 states. [2021-01-06 18:20:39,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:39,147 INFO L93 Difference]: Finished difference Result 26722 states and 50216 transitions. [2021-01-06 18:20:39,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:39,148 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2021-01-06 18:20:39,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:39,171 INFO L225 Difference]: With dead ends: 26722 [2021-01-06 18:20:39,171 INFO L226 Difference]: Without dead ends: 19050 [2021-01-06 18:20:39,183 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:39,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19050 states. [2021-01-06 18:20:40,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19050 to 19035. [2021-01-06 18:20:40,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19035 states. [2021-01-06 18:20:40,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19035 states to 19035 states and 35742 transitions. [2021-01-06 18:20:40,087 INFO L78 Accepts]: Start accepts. Automaton has 19035 states and 35742 transitions. Word has length 79 [2021-01-06 18:20:40,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:40,088 INFO L481 AbstractCegarLoop]: Abstraction has 19035 states and 35742 transitions. [2021-01-06 18:20:40,088 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:40,088 INFO L276 IsEmpty]: Start isEmpty. Operand 19035 states and 35742 transitions. [2021-01-06 18:20:40,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:20:40,091 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:40,091 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:40,092 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:20:40,092 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:40,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:40,092 INFO L82 PathProgramCache]: Analyzing trace with hash -864745975, now seen corresponding path program 1 times [2021-01-06 18:20:40,092 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:40,093 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927209343] [2021-01-06 18:20:40,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:40,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:40,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:40,163 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927209343] [2021-01-06 18:20:40,164 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:40,164 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:40,164 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986052040] [2021-01-06 18:20:40,164 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:40,165 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:40,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:40,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:40,165 INFO L87 Difference]: Start difference. First operand 19035 states and 35742 transitions. Second operand 3 states. [2021-01-06 18:20:41,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:41,783 INFO L93 Difference]: Finished difference Result 50646 states and 95079 transitions. [2021-01-06 18:20:41,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:41,783 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2021-01-06 18:20:41,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:41,829 INFO L225 Difference]: With dead ends: 50646 [2021-01-06 18:20:41,830 INFO L226 Difference]: Without dead ends: 36144 [2021-01-06 18:20:41,846 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:41,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36144 states. [2021-01-06 18:20:43,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36144 to 36129. [2021-01-06 18:20:43,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36129 states. [2021-01-06 18:20:43,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36129 states to 36129 states and 67777 transitions. [2021-01-06 18:20:43,737 INFO L78 Accepts]: Start accepts. Automaton has 36129 states and 67777 transitions. Word has length 80 [2021-01-06 18:20:43,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:43,737 INFO L481 AbstractCegarLoop]: Abstraction has 36129 states and 67777 transitions. [2021-01-06 18:20:43,737 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:43,738 INFO L276 IsEmpty]: Start isEmpty. Operand 36129 states and 67777 transitions. [2021-01-06 18:20:43,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-01-06 18:20:43,740 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:43,741 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:43,741 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:20:43,741 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:43,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:43,741 INFO L82 PathProgramCache]: Analyzing trace with hash 1131110153, now seen corresponding path program 1 times [2021-01-06 18:20:43,742 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:43,742 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024650440] [2021-01-06 18:20:43,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:43,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:43,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:43,996 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1024650440] [2021-01-06 18:20:43,997 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:43,997 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:44,000 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339965668] [2021-01-06 18:20:44,001 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:44,001 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:44,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:44,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:44,002 INFO L87 Difference]: Start difference. First operand 36129 states and 67777 transitions. Second operand 3 states. [2021-01-06 18:20:46,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:46,595 INFO L93 Difference]: Finished difference Result 97650 states and 183070 transitions. [2021-01-06 18:20:46,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:46,596 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2021-01-06 18:20:46,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:46,691 INFO L225 Difference]: With dead ends: 97650 [2021-01-06 18:20:46,691 INFO L226 Difference]: Without dead ends: 69478 [2021-01-06 18:20:46,720 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:46,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69478 states. [2021-01-06 18:20:50,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69478 to 69463. [2021-01-06 18:20:50,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69463 states. [2021-01-06 18:20:50,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69463 states to 69463 states and 130128 transitions. [2021-01-06 18:20:50,240 INFO L78 Accepts]: Start accepts. Automaton has 69463 states and 130128 transitions. Word has length 81 [2021-01-06 18:20:50,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:50,240 INFO L481 AbstractCegarLoop]: Abstraction has 69463 states and 130128 transitions. [2021-01-06 18:20:50,240 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:50,240 INFO L276 IsEmpty]: Start isEmpty. Operand 69463 states and 130128 transitions. [2021-01-06 18:20:50,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-01-06 18:20:50,243 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:50,244 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:50,244 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:20:50,244 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:50,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:50,245 INFO L82 PathProgramCache]: Analyzing trace with hash -674328181, now seen corresponding path program 1 times [2021-01-06 18:20:50,245 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:50,245 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842063191] [2021-01-06 18:20:50,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:50,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:50,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:50,321 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842063191] [2021-01-06 18:20:50,322 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:50,322 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:50,322 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170122770] [2021-01-06 18:20:50,322 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:50,323 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:50,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:50,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:50,324 INFO L87 Difference]: Start difference. First operand 69463 states and 130128 transitions. Second operand 3 states. [2021-01-06 18:20:53,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:53,654 INFO L93 Difference]: Finished difference Result 124656 states and 233242 transitions. [2021-01-06 18:20:53,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:53,657 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2021-01-06 18:20:53,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:53,785 INFO L225 Difference]: With dead ends: 124656 [2021-01-06 18:20:53,785 INFO L226 Difference]: Without dead ends: 69333 [2021-01-06 18:20:53,837 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:53,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69333 states. [2021-01-06 18:20:57,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69333 to 69333. [2021-01-06 18:20:57,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69333 states. [2021-01-06 18:20:57,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69333 states to 69333 states and 129870 transitions. [2021-01-06 18:20:57,209 INFO L78 Accepts]: Start accepts. Automaton has 69333 states and 129870 transitions. Word has length 81 [2021-01-06 18:20:57,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:57,209 INFO L481 AbstractCegarLoop]: Abstraction has 69333 states and 129870 transitions. [2021-01-06 18:20:57,210 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:57,210 INFO L276 IsEmpty]: Start isEmpty. Operand 69333 states and 129870 transitions. [2021-01-06 18:20:57,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-01-06 18:20:57,213 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:57,213 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:57,214 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:20:57,214 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:57,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:57,214 INFO L82 PathProgramCache]: Analyzing trace with hash 1545249019, now seen corresponding path program 1 times [2021-01-06 18:20:57,214 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:57,215 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401609266] [2021-01-06 18:20:57,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:57,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:57,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:57,275 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401609266] [2021-01-06 18:20:57,275 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:57,275 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:57,275 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924450644] [2021-01-06 18:20:57,276 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:57,276 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:57,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:57,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:57,277 INFO L87 Difference]: Start difference. First operand 69333 states and 129870 transitions. Second operand 3 states. [2021-01-06 18:21:03,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:03,259 INFO L93 Difference]: Finished difference Result 193628 states and 362459 transitions. [2021-01-06 18:21:03,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:03,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2021-01-06 18:21:03,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:03,658 INFO L225 Difference]: With dead ends: 193628 [2021-01-06 18:21:03,658 INFO L226 Difference]: Without dead ends: 138499 [2021-01-06 18:21:03,717 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:03,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138499 states. [2021-01-06 18:21:09,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138499 to 138499. [2021-01-06 18:21:09,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138499 states. [2021-01-06 18:21:10,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138499 states to 138499 states and 259441 transitions. [2021-01-06 18:21:10,574 INFO L78 Accepts]: Start accepts. Automaton has 138499 states and 259441 transitions. Word has length 83 [2021-01-06 18:21:10,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:10,575 INFO L481 AbstractCegarLoop]: Abstraction has 138499 states and 259441 transitions. [2021-01-06 18:21:10,575 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:10,575 INFO L276 IsEmpty]: Start isEmpty. Operand 138499 states and 259441 transitions. [2021-01-06 18:21:10,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-01-06 18:21:10,581 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:10,581 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:10,581 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:21:10,581 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:10,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:10,582 INFO L82 PathProgramCache]: Analyzing trace with hash 1229941369, now seen corresponding path program 1 times [2021-01-06 18:21:10,582 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:10,582 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [88328202] [2021-01-06 18:21:10,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:10,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:10,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:10,761 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [88328202] [2021-01-06 18:21:10,761 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:10,761 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:10,761 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763291268] [2021-01-06 18:21:10,762 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:10,762 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:10,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:10,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:10,763 INFO L87 Difference]: Start difference. First operand 138499 states and 259441 transitions. Second operand 5 states. [2021-01-06 18:21:20,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:20,699 INFO L93 Difference]: Finished difference Result 247737 states and 463623 transitions. [2021-01-06 18:21:20,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:21:20,699 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2021-01-06 18:21:20,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:21,405 INFO L225 Difference]: With dead ends: 247737 [2021-01-06 18:21:21,405 INFO L226 Difference]: Without dead ends: 247722 [2021-01-06 18:21:21,464 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:21,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247722 states. [2021-01-06 18:21:28,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247722 to 138691. [2021-01-06 18:21:28,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138691 states. [2021-01-06 18:21:29,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138691 states to 138691 states and 259633 transitions. [2021-01-06 18:21:29,560 INFO L78 Accepts]: Start accepts. Automaton has 138691 states and 259633 transitions. Word has length 83 [2021-01-06 18:21:29,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:29,560 INFO L481 AbstractCegarLoop]: Abstraction has 138691 states and 259633 transitions. [2021-01-06 18:21:29,561 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:29,561 INFO L276 IsEmpty]: Start isEmpty. Operand 138691 states and 259633 transitions. [2021-01-06 18:21:29,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:21:29,567 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:29,567 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:29,568 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:21:29,568 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:29,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:29,568 INFO L82 PathProgramCache]: Analyzing trace with hash 1196018206, now seen corresponding path program 1 times [2021-01-06 18:21:29,568 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:29,569 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683166901] [2021-01-06 18:21:29,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:29,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:29,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:29,744 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683166901] [2021-01-06 18:21:29,744 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:29,745 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:29,745 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1296418250] [2021-01-06 18:21:29,745 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:29,746 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:29,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:29,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:29,747 INFO L87 Difference]: Start difference. First operand 138691 states and 259633 transitions. Second operand 4 states. [2021-01-06 18:21:35,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:35,619 INFO L93 Difference]: Finished difference Result 138770 states and 259711 transitions. [2021-01-06 18:21:35,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:35,620 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 85 [2021-01-06 18:21:35,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:35,883 INFO L225 Difference]: With dead ends: 138770 [2021-01-06 18:21:35,883 INFO L226 Difference]: Without dead ends: 138755 [2021-01-06 18:21:35,914 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:36,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138755 states. [2021-01-06 18:21:42,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138755 to 138691. [2021-01-06 18:21:42,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138691 states. [2021-01-06 18:21:43,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138691 states to 138691 states and 259569 transitions. [2021-01-06 18:21:43,212 INFO L78 Accepts]: Start accepts. Automaton has 138691 states and 259569 transitions. Word has length 85 [2021-01-06 18:21:43,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:43,212 INFO L481 AbstractCegarLoop]: Abstraction has 138691 states and 259569 transitions. [2021-01-06 18:21:43,212 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:43,212 INFO L276 IsEmpty]: Start isEmpty. Operand 138691 states and 259569 transitions. [2021-01-06 18:21:43,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2021-01-06 18:21:43,219 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:43,220 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:43,220 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:21:43,220 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:43,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:43,221 INFO L82 PathProgramCache]: Analyzing trace with hash 757914992, now seen corresponding path program 1 times [2021-01-06 18:21:43,221 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:43,221 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701855544] [2021-01-06 18:21:43,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:43,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:43,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:43,336 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701855544] [2021-01-06 18:21:43,336 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:43,336 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:43,336 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376514047] [2021-01-06 18:21:43,337 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:43,337 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:43,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:43,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:43,338 INFO L87 Difference]: Start difference. First operand 138691 states and 259569 transitions. Second operand 4 states. [2021-01-06 18:21:51,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:51,330 INFO L93 Difference]: Finished difference Result 284009 states and 531413 transitions. [2021-01-06 18:21:51,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:51,330 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2021-01-06 18:21:51,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:51,615 INFO L225 Difference]: With dead ends: 284009 [2021-01-06 18:21:51,615 INFO L226 Difference]: Without dead ends: 145440 [2021-01-06 18:21:51,715 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:51,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145440 states. [2021-01-06 18:21:58,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145440 to 141661. [2021-01-06 18:21:58,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141661 states. [2021-01-06 18:21:59,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141661 states to 141661 states and 265023 transitions. [2021-01-06 18:21:59,171 INFO L78 Accepts]: Start accepts. Automaton has 141661 states and 265023 transitions. Word has length 92 [2021-01-06 18:21:59,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:59,171 INFO L481 AbstractCegarLoop]: Abstraction has 141661 states and 265023 transitions. [2021-01-06 18:21:59,171 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:59,171 INFO L276 IsEmpty]: Start isEmpty. Operand 141661 states and 265023 transitions. [2021-01-06 18:21:59,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2021-01-06 18:21:59,180 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:59,180 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:59,180 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:21:59,180 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:59,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:59,181 INFO L82 PathProgramCache]: Analyzing trace with hash 2127870146, now seen corresponding path program 1 times [2021-01-06 18:21:59,181 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:59,181 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901744211] [2021-01-06 18:21:59,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:59,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:59,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:59,256 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901744211] [2021-01-06 18:21:59,257 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:59,257 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:59,257 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329252881] [2021-01-06 18:21:59,257 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:59,258 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:59,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:59,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:59,258 INFO L87 Difference]: Start difference. First operand 141661 states and 265023 transitions. Second operand 5 states. [2021-01-06 18:22:27,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:27,195 INFO L93 Difference]: Finished difference Result 634385 states and 1181111 transitions. [2021-01-06 18:22:27,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:22:27,195 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2021-01-06 18:22:27,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:28,740 INFO L225 Difference]: With dead ends: 634385 [2021-01-06 18:22:28,741 INFO L226 Difference]: Without dead ends: 492844 [2021-01-06 18:22:29,032 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:22:29,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492844 states. [2021-01-06 18:22:42,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492844 to 141797. [2021-01-06 18:22:42,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141797 states. [2021-01-06 18:22:43,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141797 states to 141797 states and 265159 transitions. [2021-01-06 18:22:43,455 INFO L78 Accepts]: Start accepts. Automaton has 141797 states and 265159 transitions. Word has length 93 [2021-01-06 18:22:43,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:43,455 INFO L481 AbstractCegarLoop]: Abstraction has 141797 states and 265159 transitions. [2021-01-06 18:22:43,455 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:43,455 INFO L276 IsEmpty]: Start isEmpty. Operand 141797 states and 265159 transitions. [2021-01-06 18:22:43,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2021-01-06 18:22:43,463 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:43,464 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:43,464 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:22:43,464 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:43,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:43,465 INFO L82 PathProgramCache]: Analyzing trace with hash -2037763534, now seen corresponding path program 1 times [2021-01-06 18:22:43,465 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:43,465 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888162275] [2021-01-06 18:22:43,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:43,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:43,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:43,591 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888162275] [2021-01-06 18:22:43,591 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:43,591 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:43,591 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424368603] [2021-01-06 18:22:43,592 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:43,592 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:43,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:43,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:43,592 INFO L87 Difference]: Start difference. First operand 141797 states and 265159 transitions. Second operand 4 states. [2021-01-06 18:23:05,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:05,625 INFO L93 Difference]: Finished difference Result 452526 states and 846741 transitions. [2021-01-06 18:23:05,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:23:05,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2021-01-06 18:23:05,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:06,360 INFO L225 Difference]: With dead ends: 452526 [2021-01-06 18:23:06,360 INFO L226 Difference]: Without dead ends: 310835 [2021-01-06 18:23:06,743 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:23:07,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310835 states. [2021-01-06 18:23:18,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310835 to 201725. [2021-01-06 18:23:18,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201725 states. [2021-01-06 18:23:19,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201725 states to 201725 states and 377647 transitions. [2021-01-06 18:23:19,118 INFO L78 Accepts]: Start accepts. Automaton has 201725 states and 377647 transitions. Word has length 94 [2021-01-06 18:23:19,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:19,119 INFO L481 AbstractCegarLoop]: Abstraction has 201725 states and 377647 transitions. [2021-01-06 18:23:19,119 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:23:19,119 INFO L276 IsEmpty]: Start isEmpty. Operand 201725 states and 377647 transitions. [2021-01-06 18:23:19,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-01-06 18:23:19,127 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:19,127 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:19,127 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:23:19,128 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:19,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:19,128 INFO L82 PathProgramCache]: Analyzing trace with hash 349809373, now seen corresponding path program 1 times [2021-01-06 18:23:19,128 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:19,128 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420936834] [2021-01-06 18:23:19,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:19,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:19,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:19,232 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420936834] [2021-01-06 18:23:19,232 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:19,233 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:19,233 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [823095266] [2021-01-06 18:23:19,233 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:23:19,233 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:19,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:23:19,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:23:19,234 INFO L87 Difference]: Start difference. First operand 201725 states and 377647 transitions. Second operand 4 states.