/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product31.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:20:37,397 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:20:37,401 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:20:37,459 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:20:37,460 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:20:37,465 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:20:37,470 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:20:37,476 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:20:37,480 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:20:37,486 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:20:37,491 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:20:37,493 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:20:37,493 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:20:37,496 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:20:37,499 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:20:37,501 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:20:37,503 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:20:37,507 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:20:37,515 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:20:37,524 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:20:37,526 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:20:37,529 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:20:37,531 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:20:37,534 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:20:37,544 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:20:37,544 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:20:37,544 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:20:37,547 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:20:37,548 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:20:37,549 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:20:37,549 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:20:37,550 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:20:37,552 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:20:37,553 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:20:37,555 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:20:37,555 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:20:37,556 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:20:37,563 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:20:37,575 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:20:37,577 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:20:37,578 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:20:37,579 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:20:37,628 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:20:37,629 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:20:37,634 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:20:37,634 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:20:37,634 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:20:37,635 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:20:37,635 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:20:37,635 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:20:37,635 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:20:37,635 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:20:37,637 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:20:37,637 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:20:37,638 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:20:37,638 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:20:37,638 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:20:37,638 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:20:37,639 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:20:37,639 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:20:37,639 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:20:37,639 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:20:37,639 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:20:37,640 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:20:37,640 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:20:37,640 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:20:37,640 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:20:37,640 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:20:38,116 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:20:38,143 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:20:38,146 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:20:38,147 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:20:38,148 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:20:38,149 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product31.cil.c [2021-01-06 18:20:38,231 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/344d8611c/bbcf2ed7dec947b589aebe383a7fa404/FLAG20ab94552 [2021-01-06 18:20:39,012 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:20:39,013 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product31.cil.c [2021-01-06 18:20:39,056 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/344d8611c/bbcf2ed7dec947b589aebe383a7fa404/FLAG20ab94552 [2021-01-06 18:20:39,181 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/344d8611c/bbcf2ed7dec947b589aebe383a7fa404 [2021-01-06 18:20:39,185 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:20:39,189 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:20:39,193 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:20:39,194 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:20:39,199 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:20:39,200 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:20:39" (1/1) ... [2021-01-06 18:20:39,203 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@190b378f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:39, skipping insertion in model container [2021-01-06 18:20:39,203 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:20:39" (1/1) ... [2021-01-06 18:20:39,218 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:20:39,323 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] [2021-01-06 18:20:39,736 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product31.cil.c[10908,10921] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:20:40,018 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:20:40,030 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] [2021-01-06 18:20:40,100 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product31.cil.c[10908,10921] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:20:40,245 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:20:40,358 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:20:40,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40 WrapperNode [2021-01-06 18:20:40,359 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:20:40,362 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:20:40,363 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:20:40,363 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:20:40,371 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,448 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,678 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:20:40,679 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:20:40,680 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:20:40,680 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:20:40,689 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,690 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,719 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,720 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,831 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:40,924 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:41,034 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... [2021-01-06 18:20:41,154 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:20:41,155 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:20:41,155 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:20:41,156 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:20:41,156 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:20:41,235 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:20:41,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:20:41,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:20:41,237 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:20:48,716 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:20:48,716 INFO L299 CfgBuilder]: Removed 881 assume(true) statements. [2021-01-06 18:20:48,722 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:20:48 BoogieIcfgContainer [2021-01-06 18:20:48,723 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:20:48,725 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:20:48,725 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:20:48,728 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:20:48,729 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:20:39" (1/3) ... [2021-01-06 18:20:48,730 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17a16da3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:20:48, skipping insertion in model container [2021-01-06 18:20:48,730 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:20:40" (2/3) ... [2021-01-06 18:20:48,730 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17a16da3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:20:48, skipping insertion in model container [2021-01-06 18:20:48,730 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:20:48" (3/3) ... [2021-01-06 18:20:48,732 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product31.cil.c [2021-01-06 18:20:48,739 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:20:48,748 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:20:48,768 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:20:48,810 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:20:48,811 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:20:48,811 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:20:48,811 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:20:48,811 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:20:48,811 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:20:48,811 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:20:48,811 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:20:48,942 INFO L276 IsEmpty]: Start isEmpty. Operand 3675 states. [2021-01-06 18:20:48,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-01-06 18:20:48,964 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:48,966 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:48,966 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:48,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:48,974 INFO L82 PathProgramCache]: Analyzing trace with hash -183688650, now seen corresponding path program 1 times [2021-01-06 18:20:48,984 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:48,984 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572541501] [2021-01-06 18:20:48,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:49,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:49,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:49,392 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572541501] [2021-01-06 18:20:49,393 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:49,393 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:49,395 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79925822] [2021-01-06 18:20:49,400 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:49,400 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:49,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:49,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:49,423 INFO L87 Difference]: Start difference. First operand 3675 states. Second operand 3 states. [2021-01-06 18:20:49,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:49,889 INFO L93 Difference]: Finished difference Result 10945 states and 20597 transitions. [2021-01-06 18:20:49,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:49,891 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2021-01-06 18:20:49,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:49,972 INFO L225 Difference]: With dead ends: 10945 [2021-01-06 18:20:49,972 INFO L226 Difference]: Without dead ends: 7275 [2021-01-06 18:20:49,990 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:50,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7275 states. [2021-01-06 18:20:50,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7275 to 3671. [2021-01-06 18:20:50,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3671 states. [2021-01-06 18:20:50,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3671 states to 3671 states and 6896 transitions. [2021-01-06 18:20:50,240 INFO L78 Accepts]: Start accepts. Automaton has 3671 states and 6896 transitions. Word has length 53 [2021-01-06 18:20:50,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:50,241 INFO L481 AbstractCegarLoop]: Abstraction has 3671 states and 6896 transitions. [2021-01-06 18:20:50,241 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:50,241 INFO L276 IsEmpty]: Start isEmpty. Operand 3671 states and 6896 transitions. [2021-01-06 18:20:50,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:20:50,249 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:50,250 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:50,251 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:20:50,252 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:50,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:50,253 INFO L82 PathProgramCache]: Analyzing trace with hash -63832707, now seen corresponding path program 1 times [2021-01-06 18:20:50,253 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:50,254 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114990659] [2021-01-06 18:20:50,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:50,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:50,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:50,476 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114990659] [2021-01-06 18:20:50,476 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:50,476 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:50,477 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422287874] [2021-01-06 18:20:50,478 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:50,478 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:50,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:50,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:50,479 INFO L87 Difference]: Start difference. First operand 3671 states and 6896 transitions. Second operand 4 states. [2021-01-06 18:20:51,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:51,094 INFO L93 Difference]: Finished difference Result 14438 states and 27139 transitions. [2021-01-06 18:20:51,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:51,095 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2021-01-06 18:20:51,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:51,161 INFO L225 Difference]: With dead ends: 14438 [2021-01-06 18:20:51,161 INFO L226 Difference]: Without dead ends: 10789 [2021-01-06 18:20:51,176 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:51,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10789 states. [2021-01-06 18:20:51,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10789 to 3647. [2021-01-06 18:20:51,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:51,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6843 transitions. [2021-01-06 18:20:51,525 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6843 transitions. Word has length 60 [2021-01-06 18:20:51,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:51,526 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6843 transitions. [2021-01-06 18:20:51,527 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:51,527 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6843 transitions. [2021-01-06 18:20:51,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:20:51,531 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:51,531 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:51,531 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:20:51,532 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:51,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:51,535 INFO L82 PathProgramCache]: Analyzing trace with hash 1713448475, now seen corresponding path program 1 times [2021-01-06 18:20:51,535 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:51,536 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918233330] [2021-01-06 18:20:51,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:51,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:51,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:51,685 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918233330] [2021-01-06 18:20:51,685 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:51,686 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:51,686 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261838473] [2021-01-06 18:20:51,687 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:51,687 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:51,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:51,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:51,689 INFO L87 Difference]: Start difference. First operand 3647 states and 6843 transitions. Second operand 4 states. [2021-01-06 18:20:52,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:52,156 INFO L93 Difference]: Finished difference Result 10849 states and 20380 transitions. [2021-01-06 18:20:52,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:52,156 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 61 [2021-01-06 18:20:52,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:52,213 INFO L225 Difference]: With dead ends: 10849 [2021-01-06 18:20:52,214 INFO L226 Difference]: Without dead ends: 7224 [2021-01-06 18:20:52,222 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:52,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7224 states. [2021-01-06 18:20:52,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7224 to 3647. [2021-01-06 18:20:52,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:52,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6837 transitions. [2021-01-06 18:20:52,571 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6837 transitions. Word has length 61 [2021-01-06 18:20:52,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:52,580 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6837 transitions. [2021-01-06 18:20:52,580 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:52,580 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6837 transitions. [2021-01-06 18:20:52,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-01-06 18:20:52,584 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:52,584 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:52,584 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:20:52,585 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:52,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:52,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1064213782, now seen corresponding path program 1 times [2021-01-06 18:20:52,586 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:52,586 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367610539] [2021-01-06 18:20:52,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:52,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:52,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:52,710 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1367610539] [2021-01-06 18:20:52,711 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:52,711 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:52,711 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389838271] [2021-01-06 18:20:52,712 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:52,712 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:52,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:52,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:52,714 INFO L87 Difference]: Start difference. First operand 3647 states and 6837 transitions. Second operand 4 states. [2021-01-06 18:20:53,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:53,254 INFO L93 Difference]: Finished difference Result 10849 states and 20368 transitions. [2021-01-06 18:20:53,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:53,254 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2021-01-06 18:20:53,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:53,277 INFO L225 Difference]: With dead ends: 10849 [2021-01-06 18:20:53,278 INFO L226 Difference]: Without dead ends: 7224 [2021-01-06 18:20:53,287 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:53,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7224 states. [2021-01-06 18:20:53,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7224 to 3647. [2021-01-06 18:20:53,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:53,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6831 transitions. [2021-01-06 18:20:53,595 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6831 transitions. Word has length 63 [2021-01-06 18:20:53,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:53,597 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6831 transitions. [2021-01-06 18:20:53,597 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:53,598 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6831 transitions. [2021-01-06 18:20:53,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-01-06 18:20:53,602 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:53,603 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:53,603 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:20:53,603 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:53,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:53,603 INFO L82 PathProgramCache]: Analyzing trace with hash -472275451, now seen corresponding path program 1 times [2021-01-06 18:20:53,604 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:53,604 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719342859] [2021-01-06 18:20:53,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:53,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:53,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:53,708 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719342859] [2021-01-06 18:20:53,708 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:53,708 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:53,708 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161705507] [2021-01-06 18:20:53,710 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:53,710 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:53,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:53,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:53,712 INFO L87 Difference]: Start difference. First operand 3647 states and 6831 transitions. Second operand 4 states. [2021-01-06 18:20:54,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:54,660 INFO L93 Difference]: Finished difference Result 17985 states and 33770 transitions. [2021-01-06 18:20:54,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:54,663 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2021-01-06 18:20:54,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:54,706 INFO L225 Difference]: With dead ends: 17985 [2021-01-06 18:20:54,706 INFO L226 Difference]: Without dead ends: 14360 [2021-01-06 18:20:54,715 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:54,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14360 states. [2021-01-06 18:20:54,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14360 to 3647. [2021-01-06 18:20:54,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:54,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6830 transitions. [2021-01-06 18:20:54,973 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6830 transitions. Word has length 65 [2021-01-06 18:20:54,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:54,974 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6830 transitions. [2021-01-06 18:20:54,974 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:54,974 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6830 transitions. [2021-01-06 18:20:54,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:20:54,977 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:54,977 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:54,978 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:20:54,978 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:54,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:54,979 INFO L82 PathProgramCache]: Analyzing trace with hash 407840554, now seen corresponding path program 1 times [2021-01-06 18:20:54,979 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:54,980 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808857133] [2021-01-06 18:20:54,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:55,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:55,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:55,089 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808857133] [2021-01-06 18:20:55,090 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:55,090 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:55,090 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664996402] [2021-01-06 18:20:55,091 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:55,091 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:55,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:55,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:55,092 INFO L87 Difference]: Start difference. First operand 3647 states and 6830 transitions. Second operand 4 states. [2021-01-06 18:20:55,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:55,633 INFO L93 Difference]: Finished difference Result 10849 states and 20355 transitions. [2021-01-06 18:20:55,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:55,634 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2021-01-06 18:20:55,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:55,653 INFO L225 Difference]: With dead ends: 10849 [2021-01-06 18:20:55,654 INFO L226 Difference]: Without dead ends: 7224 [2021-01-06 18:20:55,661 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:55,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7224 states. [2021-01-06 18:20:55,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7224 to 3647. [2021-01-06 18:20:55,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:55,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6824 transitions. [2021-01-06 18:20:55,843 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6824 transitions. Word has length 66 [2021-01-06 18:20:55,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:55,843 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6824 transitions. [2021-01-06 18:20:55,844 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:55,844 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6824 transitions. [2021-01-06 18:20:55,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-01-06 18:20:55,847 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:55,847 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:55,848 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:20:55,848 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:55,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:55,854 INFO L82 PathProgramCache]: Analyzing trace with hash -1108571670, now seen corresponding path program 1 times [2021-01-06 18:20:55,854 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:55,854 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105997319] [2021-01-06 18:20:55,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:55,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:55,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:55,945 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105997319] [2021-01-06 18:20:55,945 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:55,946 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:55,947 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834012716] [2021-01-06 18:20:55,948 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:55,948 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:55,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:55,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:55,949 INFO L87 Difference]: Start difference. First operand 3647 states and 6824 transitions. Second operand 4 states. [2021-01-06 18:20:56,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:56,411 INFO L93 Difference]: Finished difference Result 10849 states and 20343 transitions. [2021-01-06 18:20:56,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:56,411 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2021-01-06 18:20:56,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:56,432 INFO L225 Difference]: With dead ends: 10849 [2021-01-06 18:20:56,433 INFO L226 Difference]: Without dead ends: 7224 [2021-01-06 18:20:56,442 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:56,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7224 states. [2021-01-06 18:20:56,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7224 to 3647. [2021-01-06 18:20:56,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3647 states. [2021-01-06 18:20:56,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 6818 transitions. [2021-01-06 18:20:56,745 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 6818 transitions. Word has length 67 [2021-01-06 18:20:56,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:56,746 INFO L481 AbstractCegarLoop]: Abstraction has 3647 states and 6818 transitions. [2021-01-06 18:20:56,746 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:56,746 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 6818 transitions. [2021-01-06 18:20:56,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:20:56,750 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:56,750 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:56,750 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:20:56,750 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:56,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:56,751 INFO L82 PathProgramCache]: Analyzing trace with hash 392052335, now seen corresponding path program 1 times [2021-01-06 18:20:56,751 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:56,752 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851079238] [2021-01-06 18:20:56,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:56,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:56,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:56,863 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851079238] [2021-01-06 18:20:56,863 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:56,863 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:56,864 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475659888] [2021-01-06 18:20:56,864 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:56,865 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:56,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:56,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:56,866 INFO L87 Difference]: Start difference. First operand 3647 states and 6818 transitions. Second operand 4 states. [2021-01-06 18:20:57,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:57,619 INFO L93 Difference]: Finished difference Result 14396 states and 27005 transitions. [2021-01-06 18:20:57,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:57,620 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2021-01-06 18:20:57,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:57,655 INFO L225 Difference]: With dead ends: 14396 [2021-01-06 18:20:57,656 INFO L226 Difference]: Without dead ends: 10777 [2021-01-06 18:20:57,667 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:57,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10777 states. [2021-01-06 18:20:57,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10777 to 3649. [2021-01-06 18:20:57,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3649 states. [2021-01-06 18:20:57,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3649 states to 3649 states and 6819 transitions. [2021-01-06 18:20:57,948 INFO L78 Accepts]: Start accepts. Automaton has 3649 states and 6819 transitions. Word has length 68 [2021-01-06 18:20:57,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:57,950 INFO L481 AbstractCegarLoop]: Abstraction has 3649 states and 6819 transitions. [2021-01-06 18:20:57,950 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:57,950 INFO L276 IsEmpty]: Start isEmpty. Operand 3649 states and 6819 transitions. [2021-01-06 18:20:57,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:20:57,965 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:57,966 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:57,966 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:20:57,966 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:57,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:57,967 INFO L82 PathProgramCache]: Analyzing trace with hash -488204641, now seen corresponding path program 1 times [2021-01-06 18:20:57,967 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:57,968 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941342102] [2021-01-06 18:20:57,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:58,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:58,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:58,063 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941342102] [2021-01-06 18:20:58,063 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:58,064 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:58,064 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438152547] [2021-01-06 18:20:58,064 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:58,065 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:58,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:58,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:58,066 INFO L87 Difference]: Start difference. First operand 3649 states and 6819 transitions. Second operand 4 states. [2021-01-06 18:20:58,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:58,887 INFO L93 Difference]: Finished difference Result 14388 states and 26985 transitions. [2021-01-06 18:20:58,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:58,887 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2021-01-06 18:20:58,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:58,923 INFO L225 Difference]: With dead ends: 14388 [2021-01-06 18:20:58,924 INFO L226 Difference]: Without dead ends: 10772 [2021-01-06 18:20:58,935 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:58,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10772 states. [2021-01-06 18:20:59,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10772 to 3654. [2021-01-06 18:20:59,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3654 states. [2021-01-06 18:20:59,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3654 states to 3654 states and 6827 transitions. [2021-01-06 18:20:59,243 INFO L78 Accepts]: Start accepts. Automaton has 3654 states and 6827 transitions. Word has length 69 [2021-01-06 18:20:59,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:59,243 INFO L481 AbstractCegarLoop]: Abstraction has 3654 states and 6827 transitions. [2021-01-06 18:20:59,243 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:59,243 INFO L276 IsEmpty]: Start isEmpty. Operand 3654 states and 6827 transitions. [2021-01-06 18:20:59,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-01-06 18:20:59,248 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:59,248 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:59,248 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:20:59,248 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:59,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:59,249 INFO L82 PathProgramCache]: Analyzing trace with hash 1663726628, now seen corresponding path program 1 times [2021-01-06 18:20:59,249 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:59,249 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204401507] [2021-01-06 18:20:59,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:59,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:59,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:59,317 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204401507] [2021-01-06 18:20:59,317 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:59,317 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:59,317 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014572937] [2021-01-06 18:20:59,318 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:59,318 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:59,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:59,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:59,319 INFO L87 Difference]: Start difference. First operand 3654 states and 6827 transitions. Second operand 3 states. [2021-01-06 18:20:59,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:59,567 INFO L93 Difference]: Finished difference Result 7265 states and 13596 transitions. [2021-01-06 18:20:59,568 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:59,568 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2021-01-06 18:20:59,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:59,579 INFO L225 Difference]: With dead ends: 7265 [2021-01-06 18:20:59,580 INFO L226 Difference]: Without dead ends: 3648 [2021-01-06 18:20:59,587 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:59,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3648 states. [2021-01-06 18:20:59,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3648 to 3648. [2021-01-06 18:20:59,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3648 states. [2021-01-06 18:20:59,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3648 states to 3648 states and 6815 transitions. [2021-01-06 18:20:59,810 INFO L78 Accepts]: Start accepts. Automaton has 3648 states and 6815 transitions. Word has length 70 [2021-01-06 18:20:59,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:59,810 INFO L481 AbstractCegarLoop]: Abstraction has 3648 states and 6815 transitions. [2021-01-06 18:20:59,810 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:59,810 INFO L276 IsEmpty]: Start isEmpty. Operand 3648 states and 6815 transitions. [2021-01-06 18:20:59,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-01-06 18:20:59,814 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:59,814 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:59,815 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:20:59,815 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:59,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:59,815 INFO L82 PathProgramCache]: Analyzing trace with hash -650743265, now seen corresponding path program 1 times [2021-01-06 18:20:59,816 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:59,816 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84800951] [2021-01-06 18:20:59,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:59,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:59,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:59,925 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84800951] [2021-01-06 18:20:59,925 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:59,926 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:59,926 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567460157] [2021-01-06 18:20:59,926 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:59,926 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:59,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:59,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:59,929 INFO L87 Difference]: Start difference. First operand 3648 states and 6815 transitions. Second operand 5 states. [2021-01-06 18:21:00,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:00,208 INFO L93 Difference]: Finished difference Result 7209 states and 13509 transitions. [2021-01-06 18:21:00,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:00,209 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2021-01-06 18:21:00,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:00,221 INFO L225 Difference]: With dead ends: 7209 [2021-01-06 18:21:00,221 INFO L226 Difference]: Without dead ends: 3635 [2021-01-06 18:21:00,237 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:21:00,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3635 states. [2021-01-06 18:21:00,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3635 to 3635. [2021-01-06 18:21:00,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3635 states. [2021-01-06 18:21:00,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3635 states to 3635 states and 6793 transitions. [2021-01-06 18:21:00,427 INFO L78 Accepts]: Start accepts. Automaton has 3635 states and 6793 transitions. Word has length 72 [2021-01-06 18:21:00,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:00,428 INFO L481 AbstractCegarLoop]: Abstraction has 3635 states and 6793 transitions. [2021-01-06 18:21:00,428 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:00,428 INFO L276 IsEmpty]: Start isEmpty. Operand 3635 states and 6793 transitions. [2021-01-06 18:21:00,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:21:00,431 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:00,431 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:00,431 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:21:00,431 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:00,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:00,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1408208117, now seen corresponding path program 1 times [2021-01-06 18:21:00,437 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:00,437 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473398052] [2021-01-06 18:21:00,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:00,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:00,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:00,564 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473398052] [2021-01-06 18:21:00,565 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:00,565 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:00,565 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88791478] [2021-01-06 18:21:00,565 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:00,566 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:00,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:00,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:00,566 INFO L87 Difference]: Start difference. First operand 3635 states and 6793 transitions. Second operand 5 states. [2021-01-06 18:21:00,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:00,822 INFO L93 Difference]: Finished difference Result 7203 states and 13498 transitions. [2021-01-06 18:21:00,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:21:00,822 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 75 [2021-01-06 18:21:00,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:00,834 INFO L225 Difference]: With dead ends: 7203 [2021-01-06 18:21:00,834 INFO L226 Difference]: Without dead ends: 3629 [2021-01-06 18:21:00,841 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:21:00,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3629 states. [2021-01-06 18:21:01,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3629 to 3629. [2021-01-06 18:21:01,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3629 states. [2021-01-06 18:21:01,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3629 states to 3629 states and 6784 transitions. [2021-01-06 18:21:01,019 INFO L78 Accepts]: Start accepts. Automaton has 3629 states and 6784 transitions. Word has length 75 [2021-01-06 18:21:01,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:01,021 INFO L481 AbstractCegarLoop]: Abstraction has 3629 states and 6784 transitions. [2021-01-06 18:21:01,021 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:01,021 INFO L276 IsEmpty]: Start isEmpty. Operand 3629 states and 6784 transitions. [2021-01-06 18:21:01,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:21:01,024 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:01,025 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:01,025 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:21:01,025 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:01,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:01,026 INFO L82 PathProgramCache]: Analyzing trace with hash -1665200245, now seen corresponding path program 1 times [2021-01-06 18:21:01,026 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:01,026 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512331631] [2021-01-06 18:21:01,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:01,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:01,099 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1512331631] [2021-01-06 18:21:01,099 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:01,099 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:01,099 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941563085] [2021-01-06 18:21:01,099 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:01,100 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:01,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:01,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:01,101 INFO L87 Difference]: Start difference. First operand 3629 states and 6784 transitions. Second operand 4 states. [2021-01-06 18:21:01,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:01,321 INFO L93 Difference]: Finished difference Result 7197 states and 13489 transitions. [2021-01-06 18:21:01,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:01,322 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2021-01-06 18:21:01,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:01,332 INFO L225 Difference]: With dead ends: 7197 [2021-01-06 18:21:01,332 INFO L226 Difference]: Without dead ends: 3615 [2021-01-06 18:21:01,339 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:01,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3615 states. [2021-01-06 18:21:01,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3615 to 3615. [2021-01-06 18:21:01,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3615 states. [2021-01-06 18:21:01,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3615 states to 3615 states and 6763 transitions. [2021-01-06 18:21:01,517 INFO L78 Accepts]: Start accepts. Automaton has 3615 states and 6763 transitions. Word has length 75 [2021-01-06 18:21:01,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:01,517 INFO L481 AbstractCegarLoop]: Abstraction has 3615 states and 6763 transitions. [2021-01-06 18:21:01,518 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:01,518 INFO L276 IsEmpty]: Start isEmpty. Operand 3615 states and 6763 transitions. [2021-01-06 18:21:01,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-01-06 18:21:01,521 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:01,521 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:01,522 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:21:01,522 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:01,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:01,522 INFO L82 PathProgramCache]: Analyzing trace with hash 194041656, now seen corresponding path program 1 times [2021-01-06 18:21:01,522 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:01,523 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601958373] [2021-01-06 18:21:01,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:01,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:01,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:01,625 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601958373] [2021-01-06 18:21:01,625 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:01,625 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:21:01,625 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889920833] [2021-01-06 18:21:01,625 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:01,626 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:01,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:01,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:01,626 INFO L87 Difference]: Start difference. First operand 3615 states and 6763 transitions. Second operand 6 states. [2021-01-06 18:21:01,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:01,956 INFO L93 Difference]: Finished difference Result 7197 states and 13484 transitions. [2021-01-06 18:21:01,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:21:01,956 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 76 [2021-01-06 18:21:01,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:01,970 INFO L225 Difference]: With dead ends: 7197 [2021-01-06 18:21:01,970 INFO L226 Difference]: Without dead ends: 3635 [2021-01-06 18:21:01,977 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:21:01,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3635 states. [2021-01-06 18:21:02,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3635 to 3615. [2021-01-06 18:21:02,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3615 states. [2021-01-06 18:21:02,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3615 states to 3615 states and 6762 transitions. [2021-01-06 18:21:02,152 INFO L78 Accepts]: Start accepts. Automaton has 3615 states and 6762 transitions. Word has length 76 [2021-01-06 18:21:02,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:02,152 INFO L481 AbstractCegarLoop]: Abstraction has 3615 states and 6762 transitions. [2021-01-06 18:21:02,152 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:02,153 INFO L276 IsEmpty]: Start isEmpty. Operand 3615 states and 6762 transitions. [2021-01-06 18:21:02,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-01-06 18:21:02,156 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:02,156 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:02,156 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:21:02,156 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:02,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:02,157 INFO L82 PathProgramCache]: Analyzing trace with hash 1134957956, now seen corresponding path program 1 times [2021-01-06 18:21:02,157 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:02,157 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041417179] [2021-01-06 18:21:02,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:02,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:02,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:02,234 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041417179] [2021-01-06 18:21:02,234 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:02,234 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:21:02,234 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468652735] [2021-01-06 18:21:02,235 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:02,235 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:02,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:02,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:02,236 INFO L87 Difference]: Start difference. First operand 3615 states and 6762 transitions. Second operand 6 states. [2021-01-06 18:21:02,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:02,686 INFO L93 Difference]: Finished difference Result 7187 states and 13465 transitions. [2021-01-06 18:21:02,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:21:02,687 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2021-01-06 18:21:02,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:02,699 INFO L225 Difference]: With dead ends: 7187 [2021-01-06 18:21:02,700 INFO L226 Difference]: Without dead ends: 3630 [2021-01-06 18:21:02,707 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:21:02,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3630 states. [2021-01-06 18:21:02,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3630 to 3615. [2021-01-06 18:21:02,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3615 states. [2021-01-06 18:21:02,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3615 states to 3615 states and 6761 transitions. [2021-01-06 18:21:02,908 INFO L78 Accepts]: Start accepts. Automaton has 3615 states and 6761 transitions. Word has length 77 [2021-01-06 18:21:02,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:02,909 INFO L481 AbstractCegarLoop]: Abstraction has 3615 states and 6761 transitions. [2021-01-06 18:21:02,909 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:02,909 INFO L276 IsEmpty]: Start isEmpty. Operand 3615 states and 6761 transitions. [2021-01-06 18:21:02,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:21:02,912 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:02,913 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:02,913 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:21:02,913 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:02,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:02,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1149977565, now seen corresponding path program 1 times [2021-01-06 18:21:02,914 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:02,914 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927517691] [2021-01-06 18:21:02,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:02,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:03,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:03,006 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927517691] [2021-01-06 18:21:03,008 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:03,009 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:03,009 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421602900] [2021-01-06 18:21:03,009 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:03,010 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:03,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:03,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:03,010 INFO L87 Difference]: Start difference. First operand 3615 states and 6761 transitions. Second operand 6 states. [2021-01-06 18:21:09,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:09,423 INFO L93 Difference]: Finished difference Result 24719 states and 46195 transitions. [2021-01-06 18:21:09,423 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:21:09,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 78 [2021-01-06 18:21:09,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:09,474 INFO L225 Difference]: With dead ends: 24719 [2021-01-06 18:21:09,474 INFO L226 Difference]: Without dead ends: 21195 [2021-01-06 18:21:09,484 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:21:09,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21195 states. [2021-01-06 18:21:09,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21195 to 3621. [2021-01-06 18:21:09,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3621 states. [2021-01-06 18:21:09,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3621 states to 3621 states and 6767 transitions. [2021-01-06 18:21:09,834 INFO L78 Accepts]: Start accepts. Automaton has 3621 states and 6767 transitions. Word has length 78 [2021-01-06 18:21:09,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:09,834 INFO L481 AbstractCegarLoop]: Abstraction has 3621 states and 6767 transitions. [2021-01-06 18:21:09,834 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:09,834 INFO L276 IsEmpty]: Start isEmpty. Operand 3621 states and 6767 transitions. [2021-01-06 18:21:09,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-01-06 18:21:09,837 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:09,838 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:09,838 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:21:09,838 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:09,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:09,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1660069039, now seen corresponding path program 1 times [2021-01-06 18:21:09,839 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:09,839 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570463031] [2021-01-06 18:21:09,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:09,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:09,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:09,965 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570463031] [2021-01-06 18:21:09,965 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:09,965 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:09,965 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149556158] [2021-01-06 18:21:09,966 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:09,966 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:09,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:09,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:09,967 INFO L87 Difference]: Start difference. First operand 3621 states and 6767 transitions. Second operand 4 states. [2021-01-06 18:21:12,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:12,741 INFO L93 Difference]: Finished difference Result 9546 states and 17947 transitions. [2021-01-06 18:21:12,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:12,742 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2021-01-06 18:21:12,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:12,768 INFO L225 Difference]: With dead ends: 9546 [2021-01-06 18:21:12,768 INFO L226 Difference]: Without dead ends: 6018 [2021-01-06 18:21:12,779 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:12,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6018 states. [2021-01-06 18:21:13,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6018 to 3621. [2021-01-06 18:21:13,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3621 states. [2021-01-06 18:21:13,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3621 states to 3621 states and 6761 transitions. [2021-01-06 18:21:13,112 INFO L78 Accepts]: Start accepts. Automaton has 3621 states and 6761 transitions. Word has length 79 [2021-01-06 18:21:13,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:13,113 INFO L481 AbstractCegarLoop]: Abstraction has 3621 states and 6761 transitions. [2021-01-06 18:21:13,113 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:13,113 INFO L276 IsEmpty]: Start isEmpty. Operand 3621 states and 6761 transitions. [2021-01-06 18:21:13,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:21:13,117 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:13,117 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:13,117 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:21:13,117 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:13,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:13,119 INFO L82 PathProgramCache]: Analyzing trace with hash 479677129, now seen corresponding path program 1 times [2021-01-06 18:21:13,119 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:13,119 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847418718] [2021-01-06 18:21:13,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:13,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:13,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:13,259 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847418718] [2021-01-06 18:21:13,259 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:13,260 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:13,263 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438866533] [2021-01-06 18:21:13,265 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:13,265 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:13,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:13,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:13,266 INFO L87 Difference]: Start difference. First operand 3621 states and 6761 transitions. Second operand 4 states. [2021-01-06 18:21:16,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:16,366 INFO L93 Difference]: Finished difference Result 9572 states and 17982 transitions. [2021-01-06 18:21:16,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:16,367 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2021-01-06 18:21:16,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:16,374 INFO L225 Difference]: With dead ends: 9572 [2021-01-06 18:21:16,375 INFO L226 Difference]: Without dead ends: 6018 [2021-01-06 18:21:16,380 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:16,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6018 states. [2021-01-06 18:21:16,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6018 to 3621. [2021-01-06 18:21:16,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3621 states. [2021-01-06 18:21:16,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3621 states to 3621 states and 6755 transitions. [2021-01-06 18:21:16,673 INFO L78 Accepts]: Start accepts. Automaton has 3621 states and 6755 transitions. Word has length 80 [2021-01-06 18:21:16,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:16,673 INFO L481 AbstractCegarLoop]: Abstraction has 3621 states and 6755 transitions. [2021-01-06 18:21:16,673 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:16,673 INFO L276 IsEmpty]: Start isEmpty. Operand 3621 states and 6755 transitions. [2021-01-06 18:21:16,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:21:16,678 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:16,678 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:16,678 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:21:16,678 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:16,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:16,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1078636057, now seen corresponding path program 1 times [2021-01-06 18:21:16,680 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:16,680 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791707587] [2021-01-06 18:21:16,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:16,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:16,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:16,847 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791707587] [2021-01-06 18:21:16,847 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:16,848 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:16,848 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247014080] [2021-01-06 18:21:16,850 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:16,851 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:16,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:16,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:16,852 INFO L87 Difference]: Start difference. First operand 3621 states and 6755 transitions. Second operand 4 states. [2021-01-06 18:21:19,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:19,891 INFO L93 Difference]: Finished difference Result 9572 states and 17971 transitions. [2021-01-06 18:21:19,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:19,892 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2021-01-06 18:21:19,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:19,899 INFO L225 Difference]: With dead ends: 9572 [2021-01-06 18:21:19,899 INFO L226 Difference]: Without dead ends: 6018 [2021-01-06 18:21:19,903 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:19,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6018 states. [2021-01-06 18:21:20,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6018 to 3621. [2021-01-06 18:21:20,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3621 states. [2021-01-06 18:21:20,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3621 states to 3621 states and 6749 transitions. [2021-01-06 18:21:20,180 INFO L78 Accepts]: Start accepts. Automaton has 3621 states and 6749 transitions. Word has length 82 [2021-01-06 18:21:20,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:20,180 INFO L481 AbstractCegarLoop]: Abstraction has 3621 states and 6749 transitions. [2021-01-06 18:21:20,180 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:20,180 INFO L276 IsEmpty]: Start isEmpty. Operand 3621 states and 6749 transitions. [2021-01-06 18:21:20,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2021-01-06 18:21:20,184 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:20,184 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:20,184 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:21:20,184 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:20,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:20,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1747394921, now seen corresponding path program 1 times [2021-01-06 18:21:20,185 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:20,185 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514703600] [2021-01-06 18:21:20,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:20,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:20,300 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514703600] [2021-01-06 18:21:20,301 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:20,301 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:20,301 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511688581] [2021-01-06 18:21:20,302 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:20,302 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:20,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:20,303 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:20,303 INFO L87 Difference]: Start difference. First operand 3621 states and 6749 transitions. Second operand 6 states. [2021-01-06 18:21:30,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:30,919 INFO L93 Difference]: Finished difference Result 45890 states and 85651 transitions. [2021-01-06 18:21:30,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:21:30,920 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2021-01-06 18:21:30,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:30,985 INFO L225 Difference]: With dead ends: 45890 [2021-01-06 18:21:30,986 INFO L226 Difference]: Without dead ends: 42363 [2021-01-06 18:21:31,000 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:21:31,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42363 states. [2021-01-06 18:21:31,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42363 to 7194. [2021-01-06 18:21:31,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7194 states. [2021-01-06 18:21:31,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7194 states to 7194 states and 13442 transitions. [2021-01-06 18:21:31,751 INFO L78 Accepts]: Start accepts. Automaton has 7194 states and 13442 transitions. Word has length 84 [2021-01-06 18:21:31,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:31,752 INFO L481 AbstractCegarLoop]: Abstraction has 7194 states and 13442 transitions. [2021-01-06 18:21:31,752 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:31,752 INFO L276 IsEmpty]: Start isEmpty. Operand 7194 states and 13442 transitions. [2021-01-06 18:21:31,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:21:31,758 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:31,758 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:31,759 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:21:31,759 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:31,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:31,759 INFO L82 PathProgramCache]: Analyzing trace with hash -508944324, now seen corresponding path program 1 times [2021-01-06 18:21:31,760 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:31,760 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299743256] [2021-01-06 18:21:31,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:31,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:31,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:31,886 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299743256] [2021-01-06 18:21:31,887 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:31,887 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:31,887 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565471438] [2021-01-06 18:21:31,888 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:31,888 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:31,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:31,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:31,889 INFO L87 Difference]: Start difference. First operand 7194 states and 13442 transitions. Second operand 4 states. [2021-01-06 18:21:35,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:35,228 INFO L93 Difference]: Finished difference Result 19040 states and 35790 transitions. [2021-01-06 18:21:35,228 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:35,228 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 85 [2021-01-06 18:21:35,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:35,243 INFO L225 Difference]: With dead ends: 19040 [2021-01-06 18:21:35,243 INFO L226 Difference]: Without dead ends: 11973 [2021-01-06 18:21:35,249 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:35,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11973 states. [2021-01-06 18:21:35,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11973 to 3621. [2021-01-06 18:21:35,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3621 states. [2021-01-06 18:21:35,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3621 states to 3621 states and 6743 transitions. [2021-01-06 18:21:35,490 INFO L78 Accepts]: Start accepts. Automaton has 3621 states and 6743 transitions. Word has length 85 [2021-01-06 18:21:35,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:35,490 INFO L481 AbstractCegarLoop]: Abstraction has 3621 states and 6743 transitions. [2021-01-06 18:21:35,490 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:35,490 INFO L276 IsEmpty]: Start isEmpty. Operand 3621 states and 6743 transitions. [2021-01-06 18:21:35,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:21:35,493 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:35,493 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:35,493 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:21:35,494 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:35,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:35,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1298731663, now seen corresponding path program 1 times [2021-01-06 18:21:35,494 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:35,495 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949628937] [2021-01-06 18:21:35,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:35,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:35,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:35,562 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1949628937] [2021-01-06 18:21:35,562 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:35,562 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:35,562 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632355464] [2021-01-06 18:21:35,563 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:35,563 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:35,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:35,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:35,564 INFO L87 Difference]: Start difference. First operand 3621 states and 6743 transitions. Second operand 3 states. [2021-01-06 18:21:35,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:35,900 INFO L93 Difference]: Finished difference Result 5447 states and 10152 transitions. [2021-01-06 18:21:35,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:35,901 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-01-06 18:21:35,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:35,908 INFO L225 Difference]: With dead ends: 5447 [2021-01-06 18:21:35,909 INFO L226 Difference]: Without dead ends: 3615 [2021-01-06 18:21:35,912 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:35,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3615 states. [2021-01-06 18:21:36,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3615 to 3615. [2021-01-06 18:21:36,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3615 states. [2021-01-06 18:21:36,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3615 states to 3615 states and 6733 transitions. [2021-01-06 18:21:36,163 INFO L78 Accepts]: Start accepts. Automaton has 3615 states and 6733 transitions. Word has length 86 [2021-01-06 18:21:36,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:36,164 INFO L481 AbstractCegarLoop]: Abstraction has 3615 states and 6733 transitions. [2021-01-06 18:21:36,164 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:36,164 INFO L276 IsEmpty]: Start isEmpty. Operand 3615 states and 6733 transitions. [2021-01-06 18:21:36,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:21:36,167 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:36,167 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:36,167 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:21:36,168 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:36,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:36,168 INFO L82 PathProgramCache]: Analyzing trace with hash -726355396, now seen corresponding path program 1 times [2021-01-06 18:21:36,168 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:36,168 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129386701] [2021-01-06 18:21:36,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:36,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:36,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:36,268 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129386701] [2021-01-06 18:21:36,268 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:36,268 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:36,272 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032819560] [2021-01-06 18:21:36,272 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:36,272 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:36,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:36,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:36,273 INFO L87 Difference]: Start difference. First operand 3615 states and 6733 transitions. Second operand 5 states. [2021-01-06 18:21:37,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:37,547 INFO L93 Difference]: Finished difference Result 14410 states and 26853 transitions. [2021-01-06 18:21:37,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:21:37,547 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:21:37,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:37,563 INFO L225 Difference]: With dead ends: 14410 [2021-01-06 18:21:37,563 INFO L226 Difference]: Without dead ends: 12600 [2021-01-06 18:21:37,568 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:21:37,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12600 states. [2021-01-06 18:21:37,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12600 to 5390. [2021-01-06 18:21:37,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5390 states. [2021-01-06 18:21:37,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5390 states to 5390 states and 10034 transitions. [2021-01-06 18:21:37,952 INFO L78 Accepts]: Start accepts. Automaton has 5390 states and 10034 transitions. Word has length 88 [2021-01-06 18:21:37,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:37,953 INFO L481 AbstractCegarLoop]: Abstraction has 5390 states and 10034 transitions. [2021-01-06 18:21:37,953 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:37,953 INFO L276 IsEmpty]: Start isEmpty. Operand 5390 states and 10034 transitions. [2021-01-06 18:21:37,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:21:37,957 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:37,957 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:37,957 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:21:37,958 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:37,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:37,958 INFO L82 PathProgramCache]: Analyzing trace with hash -1041663046, now seen corresponding path program 1 times [2021-01-06 18:21:37,958 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:37,958 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [667142358] [2021-01-06 18:21:37,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:37,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:38,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:38,068 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [667142358] [2021-01-06 18:21:38,068 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:38,068 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:38,068 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986599356] [2021-01-06 18:21:38,068 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:38,069 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:38,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:38,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:38,073 INFO L87 Difference]: Start difference. First operand 5390 states and 10034 transitions. Second operand 5 states. [2021-01-06 18:21:38,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:38,848 INFO L93 Difference]: Finished difference Result 8156 states and 15170 transitions. [2021-01-06 18:21:38,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:21:38,848 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:21:38,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:38,857 INFO L225 Difference]: With dead ends: 8156 [2021-01-06 18:21:38,857 INFO L226 Difference]: Without dead ends: 8143 [2021-01-06 18:21:38,858 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:38,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8143 states. [2021-01-06 18:21:39,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8143 to 5396. [2021-01-06 18:21:39,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5396 states. [2021-01-06 18:21:39,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5396 states to 5396 states and 10040 transitions. [2021-01-06 18:21:39,260 INFO L78 Accepts]: Start accepts. Automaton has 5396 states and 10040 transitions. Word has length 88 [2021-01-06 18:21:39,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:39,260 INFO L481 AbstractCegarLoop]: Abstraction has 5396 states and 10040 transitions. [2021-01-06 18:21:39,261 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:39,261 INFO L276 IsEmpty]: Start isEmpty. Operand 5396 states and 10040 transitions. [2021-01-06 18:21:39,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2021-01-06 18:21:39,264 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:39,264 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:39,264 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:21:39,264 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:39,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:39,265 INFO L82 PathProgramCache]: Analyzing trace with hash -183106049, now seen corresponding path program 1 times [2021-01-06 18:21:39,265 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:39,265 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33980432] [2021-01-06 18:21:39,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:39,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:39,330 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33980432] [2021-01-06 18:21:39,330 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:39,330 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:39,330 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816309726] [2021-01-06 18:21:39,331 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:39,331 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:39,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:39,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:39,332 INFO L87 Difference]: Start difference. First operand 5396 states and 10040 transitions. Second operand 4 states. [2021-01-06 18:21:39,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:39,743 INFO L93 Difference]: Finished difference Result 5411 states and 10054 transitions. [2021-01-06 18:21:39,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:39,744 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2021-01-06 18:21:39,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:39,750 INFO L225 Difference]: With dead ends: 5411 [2021-01-06 18:21:39,750 INFO L226 Difference]: Without dead ends: 5398 [2021-01-06 18:21:39,751 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:39,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5398 states. [2021-01-06 18:21:40,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5398 to 5396. [2021-01-06 18:21:40,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5396 states. [2021-01-06 18:21:40,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5396 states to 5396 states and 10038 transitions. [2021-01-06 18:21:40,182 INFO L78 Accepts]: Start accepts. Automaton has 5396 states and 10038 transitions. Word has length 90 [2021-01-06 18:21:40,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:40,183 INFO L481 AbstractCegarLoop]: Abstraction has 5396 states and 10038 transitions. [2021-01-06 18:21:40,183 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:40,183 INFO L276 IsEmpty]: Start isEmpty. Operand 5396 states and 10038 transitions. [2021-01-06 18:21:40,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2021-01-06 18:21:40,188 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:40,188 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:40,188 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:21:40,189 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:40,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:40,189 INFO L82 PathProgramCache]: Analyzing trace with hash 1958221190, now seen corresponding path program 1 times [2021-01-06 18:21:40,189 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:40,189 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301916940] [2021-01-06 18:21:40,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:40,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:40,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:40,268 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301916940] [2021-01-06 18:21:40,268 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:40,268 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:40,268 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079647291] [2021-01-06 18:21:40,269 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:40,269 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:40,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:40,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:40,270 INFO L87 Difference]: Start difference. First operand 5396 states and 10038 transitions. Second operand 5 states. [2021-01-06 18:21:43,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:43,968 INFO L93 Difference]: Finished difference Result 16761 states and 31036 transitions. [2021-01-06 18:21:43,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:43,968 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2021-01-06 18:21:43,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:43,985 INFO L225 Difference]: With dead ends: 16761 [2021-01-06 18:21:43,985 INFO L226 Difference]: Without dead ends: 14008 [2021-01-06 18:21:43,991 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:21:44,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14008 states. [2021-01-06 18:21:44,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14008 to 5400. [2021-01-06 18:21:44,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5400 states. [2021-01-06 18:21:44,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5400 states to 5400 states and 10042 transitions. [2021-01-06 18:21:44,472 INFO L78 Accepts]: Start accepts. Automaton has 5400 states and 10042 transitions. Word has length 97 [2021-01-06 18:21:44,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:44,472 INFO L481 AbstractCegarLoop]: Abstraction has 5400 states and 10042 transitions. [2021-01-06 18:21:44,472 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:44,472 INFO L276 IsEmpty]: Start isEmpty. Operand 5400 states and 10042 transitions. [2021-01-06 18:21:44,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-01-06 18:21:44,477 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:44,478 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:44,478 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:21:44,478 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:44,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:44,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1994848158, now seen corresponding path program 1 times [2021-01-06 18:21:44,479 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:44,479 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897543453] [2021-01-06 18:21:44,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:44,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:44,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:44,548 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897543453] [2021-01-06 18:21:44,548 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:44,548 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:21:44,548 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380703447] [2021-01-06 18:21:44,549 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:44,549 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:44,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:44,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:44,549 INFO L87 Difference]: Start difference. First operand 5400 states and 10042 transitions. Second operand 3 states. [2021-01-06 18:21:45,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:45,535 INFO L93 Difference]: Finished difference Result 13063 states and 24336 transitions. [2021-01-06 18:21:45,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:45,535 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2021-01-06 18:21:45,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:45,544 INFO L225 Difference]: With dead ends: 13063 [2021-01-06 18:21:45,545 INFO L226 Difference]: Without dead ends: 8668 [2021-01-06 18:21:45,550 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:45,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8668 states. [2021-01-06 18:21:46,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8668 to 8655. [2021-01-06 18:21:46,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8655 states. [2021-01-06 18:21:46,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8655 states to 8655 states and 16067 transitions. [2021-01-06 18:21:46,234 INFO L78 Accepts]: Start accepts. Automaton has 8655 states and 16067 transitions. Word has length 98 [2021-01-06 18:21:46,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:46,234 INFO L481 AbstractCegarLoop]: Abstraction has 8655 states and 16067 transitions. [2021-01-06 18:21:46,234 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:46,234 INFO L276 IsEmpty]: Start isEmpty. Operand 8655 states and 16067 transitions. [2021-01-06 18:21:46,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-01-06 18:21:46,240 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:46,240 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:46,240 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:21:46,241 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:46,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:46,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1317049385, now seen corresponding path program 1 times [2021-01-06 18:21:46,241 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:46,241 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901187780] [2021-01-06 18:21:46,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:46,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:46,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:46,302 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901187780] [2021-01-06 18:21:46,302 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:46,302 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:46,302 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479869356] [2021-01-06 18:21:46,302 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:46,303 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:46,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:46,303 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:46,303 INFO L87 Difference]: Start difference. First operand 8655 states and 16067 transitions. Second operand 3 states. [2021-01-06 18:21:49,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:49,335 INFO L93 Difference]: Finished difference Result 21231 states and 39317 transitions. [2021-01-06 18:21:49,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:49,335 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2021-01-06 18:21:49,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:49,352 INFO L225 Difference]: With dead ends: 21231 [2021-01-06 18:21:49,352 INFO L226 Difference]: Without dead ends: 14238 [2021-01-06 18:21:49,360 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:49,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14238 states. [2021-01-06 18:21:50,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14238 to 8343. [2021-01-06 18:21:50,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8343 states. [2021-01-06 18:21:50,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8343 states to 8343 states and 15371 transitions. [2021-01-06 18:21:50,124 INFO L78 Accepts]: Start accepts. Automaton has 8343 states and 15371 transitions. Word has length 98 [2021-01-06 18:21:50,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:50,124 INFO L481 AbstractCegarLoop]: Abstraction has 8343 states and 15371 transitions. [2021-01-06 18:21:50,124 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:50,124 INFO L276 IsEmpty]: Start isEmpty. Operand 8343 states and 15371 transitions. [2021-01-06 18:21:50,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2021-01-06 18:21:50,130 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:50,130 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:50,130 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:21:50,130 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:50,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:50,131 INFO L82 PathProgramCache]: Analyzing trace with hash 1220561966, now seen corresponding path program 1 times [2021-01-06 18:21:50,131 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:50,131 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218636553] [2021-01-06 18:21:50,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:50,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:50,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:50,198 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218636553] [2021-01-06 18:21:50,198 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:50,198 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:50,198 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73097109] [2021-01-06 18:21:50,199 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:50,199 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:50,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:50,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:50,199 INFO L87 Difference]: Start difference. First operand 8343 states and 15371 transitions. Second operand 5 states. [2021-01-06 18:21:54,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:54,283 INFO L93 Difference]: Finished difference Result 20169 states and 37381 transitions. [2021-01-06 18:21:54,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:54,283 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2021-01-06 18:21:54,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:54,298 INFO L225 Difference]: With dead ends: 20169 [2021-01-06 18:21:54,299 INFO L226 Difference]: Without dead ends: 13632 [2021-01-06 18:21:54,311 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:54,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13632 states. [2021-01-06 18:21:54,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13632 to 8343. [2021-01-06 18:21:54,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8343 states. [2021-01-06 18:21:54,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8343 states to 8343 states and 15075 transitions. [2021-01-06 18:21:54,963 INFO L78 Accepts]: Start accepts. Automaton has 8343 states and 15075 transitions. Word has length 101 [2021-01-06 18:21:54,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:54,964 INFO L481 AbstractCegarLoop]: Abstraction has 8343 states and 15075 transitions. [2021-01-06 18:21:54,964 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:54,964 INFO L276 IsEmpty]: Start isEmpty. Operand 8343 states and 15075 transitions. [2021-01-06 18:21:54,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-01-06 18:21:54,968 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:54,968 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:54,968 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:21:54,968 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:54,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:54,969 INFO L82 PathProgramCache]: Analyzing trace with hash -1597652250, now seen corresponding path program 1 times [2021-01-06 18:21:54,969 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:54,969 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142140549] [2021-01-06 18:21:54,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:55,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:55,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:55,107 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142140549] [2021-01-06 18:21:55,108 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:55,108 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:21:55,108 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970196831] [2021-01-06 18:21:55,108 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:55,108 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:55,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:55,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:55,109 INFO L87 Difference]: Start difference. First operand 8343 states and 15075 transitions. Second operand 6 states. [2021-01-06 18:22:00,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:00,690 INFO L93 Difference]: Finished difference Result 30747 states and 55483 transitions. [2021-01-06 18:22:00,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-01-06 18:22:00,690 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2021-01-06 18:22:00,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:00,718 INFO L225 Difference]: With dead ends: 30747 [2021-01-06 18:22:00,718 INFO L226 Difference]: Without dead ends: 24021 [2021-01-06 18:22:00,728 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2021-01-06 18:22:00,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24021 states. [2021-01-06 18:22:02,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24021 to 15199. [2021-01-06 18:22:02,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15199 states. [2021-01-06 18:22:02,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15199 states to 15199 states and 26525 transitions. [2021-01-06 18:22:02,118 INFO L78 Accepts]: Start accepts. Automaton has 15199 states and 26525 transitions. Word has length 102 [2021-01-06 18:22:02,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:02,118 INFO L481 AbstractCegarLoop]: Abstraction has 15199 states and 26525 transitions. [2021-01-06 18:22:02,118 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:02,118 INFO L276 IsEmpty]: Start isEmpty. Operand 15199 states and 26525 transitions. [2021-01-06 18:22:02,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-01-06 18:22:02,121 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:02,122 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:02,122 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:22:02,122 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:02,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:02,122 INFO L82 PathProgramCache]: Analyzing trace with hash -211448856, now seen corresponding path program 1 times [2021-01-06 18:22:02,123 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:02,123 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939224604] [2021-01-06 18:22:02,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:02,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:02,188 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939224604] [2021-01-06 18:22:02,188 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:02,188 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:02,188 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607047895] [2021-01-06 18:22:02,188 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:22:02,189 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:02,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:22:02,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:22:02,189 INFO L87 Difference]: Start difference. First operand 15199 states and 26525 transitions. Second operand 3 states. [2021-01-06 18:22:04,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:04,499 INFO L93 Difference]: Finished difference Result 36655 states and 64214 transitions. [2021-01-06 18:22:04,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:22:04,500 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 102 [2021-01-06 18:22:04,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:04,528 INFO L225 Difference]: With dead ends: 36655 [2021-01-06 18:22:04,528 INFO L226 Difference]: Without dead ends: 23824 [2021-01-06 18:22:04,538 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:22:04,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23824 states. [2021-01-06 18:22:06,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23824 to 23783. [2021-01-06 18:22:06,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23783 states. [2021-01-06 18:22:06,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23783 states to 23783 states and 41768 transitions. [2021-01-06 18:22:06,854 INFO L78 Accepts]: Start accepts. Automaton has 23783 states and 41768 transitions. Word has length 102 [2021-01-06 18:22:06,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:06,854 INFO L481 AbstractCegarLoop]: Abstraction has 23783 states and 41768 transitions. [2021-01-06 18:22:06,855 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:22:06,855 INFO L276 IsEmpty]: Start isEmpty. Operand 23783 states and 41768 transitions. [2021-01-06 18:22:06,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2021-01-06 18:22:06,859 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:06,859 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:06,860 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:22:06,860 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:06,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:06,865 INFO L82 PathProgramCache]: Analyzing trace with hash 406115304, now seen corresponding path program 1 times [2021-01-06 18:22:06,866 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:06,866 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303978387] [2021-01-06 18:22:06,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:06,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:07,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:07,085 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303978387] [2021-01-06 18:22:07,085 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:07,085 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:07,086 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021543950] [2021-01-06 18:22:07,086 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:22:07,086 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:07,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:22:07,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:22:07,087 INFO L87 Difference]: Start difference. First operand 23783 states and 41768 transitions. Second operand 6 states. [2021-01-06 18:22:16,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:16,765 INFO L93 Difference]: Finished difference Result 95169 states and 168754 transitions. [2021-01-06 18:22:16,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:22:16,765 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 103 [2021-01-06 18:22:16,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:16,970 INFO L225 Difference]: With dead ends: 95169 [2021-01-06 18:22:16,970 INFO L226 Difference]: Without dead ends: 71480 [2021-01-06 18:22:16,994 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2021-01-06 18:22:17,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71480 states. [2021-01-06 18:22:21,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71480 to 46969. [2021-01-06 18:22:21,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46969 states. [2021-01-06 18:22:22,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46969 states to 46969 states and 82551 transitions. [2021-01-06 18:22:22,037 INFO L78 Accepts]: Start accepts. Automaton has 46969 states and 82551 transitions. Word has length 103 [2021-01-06 18:22:22,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:22,038 INFO L481 AbstractCegarLoop]: Abstraction has 46969 states and 82551 transitions. [2021-01-06 18:22:22,038 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:22,038 INFO L276 IsEmpty]: Start isEmpty. Operand 46969 states and 82551 transitions. [2021-01-06 18:22:22,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2021-01-06 18:22:22,045 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:22,045 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:22,046 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-01-06 18:22:22,046 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:22,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:22,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1844676653, now seen corresponding path program 1 times [2021-01-06 18:22:22,046 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:22,047 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279048969] [2021-01-06 18:22:22,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:22,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:22,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:22,126 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279048969] [2021-01-06 18:22:22,127 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:22,127 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:22,127 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198996995] [2021-01-06 18:22:22,127 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:22,127 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:22,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:22,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:22,128 INFO L87 Difference]: Start difference. First operand 46969 states and 82551 transitions. Second operand 5 states. [2021-01-06 18:22:27,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:27,091 INFO L93 Difference]: Finished difference Result 93870 states and 165011 transitions. [2021-01-06 18:22:27,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:22:27,092 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2021-01-06 18:22:27,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:27,151 INFO L225 Difference]: With dead ends: 93870 [2021-01-06 18:22:27,152 INFO L226 Difference]: Without dead ends: 46980 [2021-01-06 18:22:27,182 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:22:27,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46980 states. [2021-01-06 18:22:31,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46980 to 46965. [2021-01-06 18:22:31,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46965 states. [2021-01-06 18:22:32,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46965 states to 46965 states and 82541 transitions. [2021-01-06 18:22:32,057 INFO L78 Accepts]: Start accepts. Automaton has 46965 states and 82541 transitions. Word has length 105 [2021-01-06 18:22:32,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:32,057 INFO L481 AbstractCegarLoop]: Abstraction has 46965 states and 82541 transitions. [2021-01-06 18:22:32,057 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:32,057 INFO L276 IsEmpty]: Start isEmpty. Operand 46965 states and 82541 transitions. [2021-01-06 18:22:32,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:22:32,064 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:32,064 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:32,064 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-01-06 18:22:32,064 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:32,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:32,065 INFO L82 PathProgramCache]: Analyzing trace with hash -833402693, now seen corresponding path program 1 times [2021-01-06 18:22:32,065 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:32,065 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887948104] [2021-01-06 18:22:32,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:32,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:32,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:32,322 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887948104] [2021-01-06 18:22:32,325 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:32,325 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:32,325 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [753095398] [2021-01-06 18:22:32,326 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:32,326 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:32,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:32,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:32,327 INFO L87 Difference]: Start difference. First operand 46965 states and 82541 transitions. Second operand 4 states. [2021-01-06 18:22:41,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:41,177 INFO L93 Difference]: Finished difference Result 131509 states and 231268 transitions. [2021-01-06 18:22:41,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:41,177 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2021-01-06 18:22:41,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:41,299 INFO L225 Difference]: With dead ends: 131509 [2021-01-06 18:22:41,299 INFO L226 Difference]: Without dead ends: 84694 [2021-01-06 18:22:41,347 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:41,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84694 states. [2021-01-06 18:22:47,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84694 to 63288. [2021-01-06 18:22:47,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63288 states. [2021-01-06 18:22:48,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63288 states to 63288 states and 110478 transitions. [2021-01-06 18:22:48,014 INFO L78 Accepts]: Start accepts. Automaton has 63288 states and 110478 transitions. Word has length 106 [2021-01-06 18:22:48,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:48,014 INFO L481 AbstractCegarLoop]: Abstraction has 63288 states and 110478 transitions. [2021-01-06 18:22:48,014 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:48,014 INFO L276 IsEmpty]: Start isEmpty. Operand 63288 states and 110478 transitions. [2021-01-06 18:22:48,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:22:48,021 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:48,021 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:48,022 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2021-01-06 18:22:48,022 INFO L429 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:48,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:48,022 INFO L82 PathProgramCache]: Analyzing trace with hash -1447452521, now seen corresponding path program 1 times [2021-01-06 18:22:48,022 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:48,023 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736704766] [2021-01-06 18:22:48,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:48,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:48,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:48,095 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736704766] [2021-01-06 18:22:48,095 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:48,095 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:48,095 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824217988] [2021-01-06 18:22:48,096 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:48,096 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:48,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:48,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:48,096 INFO L87 Difference]: Start difference. First operand 63288 states and 110478 transitions. Second operand 5 states. [2021-01-06 18:22:52,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:52,009 INFO L93 Difference]: Finished difference Result 94551 states and 165081 transitions. [2021-01-06 18:22:52,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:22:52,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 106 [2021-01-06 18:22:52,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:52,050 INFO L225 Difference]: With dead ends: 94551 [2021-01-06 18:22:52,050 INFO L226 Difference]: Without dead ends: 31293 [2021-01-06 18:22:52,075 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:22:52,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31293 states. [2021-01-06 18:22:55,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31293 to 31293. [2021-01-06 18:22:55,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31293 states. [2021-01-06 18:22:55,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31293 states to 31293 states and 54638 transitions. [2021-01-06 18:22:55,518 INFO L78 Accepts]: Start accepts. Automaton has 31293 states and 54638 transitions. Word has length 106 [2021-01-06 18:22:55,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:55,518 INFO L481 AbstractCegarLoop]: Abstraction has 31293 states and 54638 transitions. [2021-01-06 18:22:55,518 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:55,519 INFO L276 IsEmpty]: Start isEmpty. Operand 31293 states and 54638 transitions. [2021-01-06 18:22:55,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2021-01-06 18:22:55,522 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:55,522 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:55,522 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-01-06 18:22:55,523 INFO L429 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:55,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:55,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1065012452, now seen corresponding path program 1 times [2021-01-06 18:22:55,523 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:55,523 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460309780] [2021-01-06 18:22:55,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:55,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:55,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:55,601 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460309780] [2021-01-06 18:22:55,602 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:55,602 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:55,602 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965453538] [2021-01-06 18:22:55,602 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:55,602 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:55,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:55,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:55,603 INFO L87 Difference]: Start difference. First operand 31293 states and 54638 transitions. Second operand 5 states. [2021-01-06 18:23:10,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:10,065 INFO L93 Difference]: Finished difference Result 138698 states and 242253 transitions. [2021-01-06 18:23:10,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:23:10,065 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2021-01-06 18:23:10,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:10,215 INFO L225 Difference]: With dead ends: 138698 [2021-01-06 18:23:10,215 INFO L226 Difference]: Without dead ends: 107482 [2021-01-06 18:23:10,250 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:23:10,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107482 states. [2021-01-06 18:23:14,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107482 to 31349. [2021-01-06 18:23:14,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31349 states. [2021-01-06 18:23:14,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31349 states to 31349 states and 54694 transitions. [2021-01-06 18:23:14,441 INFO L78 Accepts]: Start accepts. Automaton has 31349 states and 54694 transitions. Word has length 107 [2021-01-06 18:23:14,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:14,441 INFO L481 AbstractCegarLoop]: Abstraction has 31349 states and 54694 transitions. [2021-01-06 18:23:14,441 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:14,441 INFO L276 IsEmpty]: Start isEmpty. Operand 31349 states and 54694 transitions. [2021-01-06 18:23:14,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2021-01-06 18:23:14,444 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:14,444 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:14,444 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-01-06 18:23:14,444 INFO L429 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:14,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:14,445 INFO L82 PathProgramCache]: Analyzing trace with hash -79358499, now seen corresponding path program 1 times [2021-01-06 18:23:14,445 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:14,445 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130378608] [2021-01-06 18:23:14,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:14,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:14,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:14,541 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130378608] [2021-01-06 18:23:14,541 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:14,542 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:14,542 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108252546] [2021-01-06 18:23:14,542 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:23:14,542 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:14,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:23:14,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:23:14,543 INFO L87 Difference]: Start difference. First operand 31349 states and 54694 transitions. Second operand 4 states. [2021-01-06 18:23:24,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:24,394 INFO L93 Difference]: Finished difference Result 87775 states and 155207 transitions. [2021-01-06 18:23:24,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:23:24,394 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 108 [2021-01-06 18:23:24,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:24,477 INFO L225 Difference]: With dead ends: 87775 [2021-01-06 18:23:24,477 INFO L226 Difference]: Without dead ends: 56496 [2021-01-06 18:23:24,499 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:24,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56496 states. [2021-01-06 18:23:29,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56496 to 38557. [2021-01-06 18:23:29,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38557 states. [2021-01-06 18:23:29,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38557 states to 38557 states and 66366 transitions. [2021-01-06 18:23:29,398 INFO L78 Accepts]: Start accepts. Automaton has 38557 states and 66366 transitions. Word has length 108 [2021-01-06 18:23:29,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:29,398 INFO L481 AbstractCegarLoop]: Abstraction has 38557 states and 66366 transitions. [2021-01-06 18:23:29,398 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:23:29,398 INFO L276 IsEmpty]: Start isEmpty. Operand 38557 states and 66366 transitions. [2021-01-06 18:23:29,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-01-06 18:23:29,401 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:29,401 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:29,401 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-01-06 18:23:29,401 INFO L429 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:29,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:29,403 INFO L82 PathProgramCache]: Analyzing trace with hash -1418033947, now seen corresponding path program 1 times [2021-01-06 18:23:29,403 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:29,403 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899380937] [2021-01-06 18:23:29,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:29,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:29,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:29,579 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899380937] [2021-01-06 18:23:29,579 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:29,580 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:23:29,580 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116933451] [2021-01-06 18:23:29,580 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:29,580 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:29,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:29,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:29,581 INFO L87 Difference]: Start difference. First operand 38557 states and 66366 transitions. Second operand 5 states. [2021-01-06 18:23:48,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:48,103 INFO L93 Difference]: Finished difference Result 187335 states and 322285 transitions. [2021-01-06 18:23:48,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:23:48,104 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 110 [2021-01-06 18:23:48,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:48,519 INFO L225 Difference]: With dead ends: 187335 [2021-01-06 18:23:48,519 INFO L226 Difference]: Without dead ends: 148855 [2021-01-06 18:23:48,573 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:23:48,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148855 states. [2021-01-06 18:23:54,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148855 to 38625. [2021-01-06 18:23:54,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38625 states. [2021-01-06 18:23:54,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38625 states to 38625 states and 66434 transitions. [2021-01-06 18:23:54,344 INFO L78 Accepts]: Start accepts. Automaton has 38625 states and 66434 transitions. Word has length 110 [2021-01-06 18:23:54,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:54,344 INFO L481 AbstractCegarLoop]: Abstraction has 38625 states and 66434 transitions. [2021-01-06 18:23:54,349 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:54,349 INFO L276 IsEmpty]: Start isEmpty. Operand 38625 states and 66434 transitions. [2021-01-06 18:23:54,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-01-06 18:23:54,353 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:54,354 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:54,354 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-01-06 18:23:54,354 INFO L429 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:54,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:54,354 INFO L82 PathProgramCache]: Analyzing trace with hash -1899114205, now seen corresponding path program 1 times [2021-01-06 18:23:54,355 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:54,355 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834073313] [2021-01-06 18:23:54,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:54,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:54,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:54,521 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834073313] [2021-01-06 18:23:54,522 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:54,522 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:54,522 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405710232] [2021-01-06 18:23:54,522 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:23:54,522 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:54,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:23:54,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:23:54,523 INFO L87 Difference]: Start difference. First operand 38625 states and 66434 transitions. Second operand 6 states. [2021-01-06 18:24:05,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:05,455 INFO L93 Difference]: Finished difference Result 98172 states and 169159 transitions. [2021-01-06 18:24:05,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:24:05,455 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 110 [2021-01-06 18:24:05,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:05,541 INFO L225 Difference]: With dead ends: 98172 [2021-01-06 18:24:05,541 INFO L226 Difference]: Without dead ends: 65137 [2021-01-06 18:24:05,567 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:24:05,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65137 states. [2021-01-06 18:24:11,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65137 to 38537. [2021-01-06 18:24:11,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38537 states. [2021-01-06 18:24:11,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38537 states to 38537 states and 66258 transitions. [2021-01-06 18:24:11,059 INFO L78 Accepts]: Start accepts. Automaton has 38537 states and 66258 transitions. Word has length 110 [2021-01-06 18:24:11,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:11,059 INFO L481 AbstractCegarLoop]: Abstraction has 38537 states and 66258 transitions. [2021-01-06 18:24:11,059 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:24:11,059 INFO L276 IsEmpty]: Start isEmpty. Operand 38537 states and 66258 transitions. [2021-01-06 18:24:11,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-01-06 18:24:11,062 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:11,062 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:11,062 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-01-06 18:24:11,062 INFO L429 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:11,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:11,063 INFO L82 PathProgramCache]: Analyzing trace with hash 809491801, now seen corresponding path program 1 times [2021-01-06 18:24:11,063 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:11,063 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82432958] [2021-01-06 18:24:11,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:11,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:11,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:11,139 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82432958] [2021-01-06 18:24:11,139 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:11,139 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:24:11,139 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896700154] [2021-01-06 18:24:11,139 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:24:11,140 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:11,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:24:11,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:24:11,140 INFO L87 Difference]: Start difference. First operand 38537 states and 66258 transitions. Second operand 3 states. [2021-01-06 18:24:19,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:19,834 INFO L93 Difference]: Finished difference Result 101880 states and 175387 transitions. [2021-01-06 18:24:19,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:24:19,836 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2021-01-06 18:24:19,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:19,944 INFO L225 Difference]: With dead ends: 101880 [2021-01-06 18:24:19,944 INFO L226 Difference]: Without dead ends: 65246 [2021-01-06 18:24:19,976 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:24:20,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65246 states. [2021-01-06 18:24:28,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65246 to 65233. [2021-01-06 18:24:28,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65233 states. [2021-01-06 18:24:28,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65233 states to 65233 states and 112328 transitions. [2021-01-06 18:24:28,596 INFO L78 Accepts]: Start accepts. Automaton has 65233 states and 112328 transitions. Word has length 117 [2021-01-06 18:24:28,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:28,596 INFO L481 AbstractCegarLoop]: Abstraction has 65233 states and 112328 transitions. [2021-01-06 18:24:28,596 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:24:28,596 INFO L276 IsEmpty]: Start isEmpty. Operand 65233 states and 112328 transitions. [2021-01-06 18:24:28,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-01-06 18:24:28,600 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:28,600 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:28,600 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2021-01-06 18:24:28,600 INFO L429 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:28,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:28,601 INFO L82 PathProgramCache]: Analyzing trace with hash 112939318, now seen corresponding path program 1 times [2021-01-06 18:24:28,601 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:28,601 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571434619] [2021-01-06 18:24:28,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:28,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:28,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:28,674 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571434619] [2021-01-06 18:24:28,674 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:28,674 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:24:28,674 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123720308] [2021-01-06 18:24:28,675 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:24:28,675 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:28,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:24:28,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:24:28,675 INFO L87 Difference]: Start difference. First operand 65233 states and 112328 transitions. Second operand 3 states.