/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec2_product11.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:21:28,421 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:21:28,424 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:21:28,457 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:21:28,458 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:21:28,459 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:21:28,461 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:21:28,463 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:21:28,465 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:21:28,466 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:21:28,468 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:21:28,469 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:21:28,470 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:21:28,471 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:21:28,472 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:21:28,473 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:21:28,474 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:21:28,476 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:21:28,478 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:21:28,480 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:21:28,482 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:21:28,484 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:21:28,486 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:21:28,487 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:21:28,490 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:21:28,491 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:21:28,491 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:21:28,492 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:21:28,493 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:21:28,494 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:21:28,494 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:21:28,495 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:21:28,496 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:21:28,497 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:21:28,498 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:21:28,498 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:21:28,499 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:21:28,500 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:21:28,500 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:21:28,501 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:21:28,502 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:21:28,503 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:21:28,530 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:21:28,531 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:21:28,532 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:21:28,533 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:21:28,533 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:21:28,533 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:21:28,533 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:21:28,534 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:21:28,534 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:21:28,534 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:21:28,534 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:21:28,534 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:21:28,535 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:21:28,535 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:21:28,535 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:21:28,535 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:21:28,536 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:21:28,536 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:21:28,536 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:21:28,536 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:21:28,536 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:21:28,537 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:21:28,537 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:21:28,537 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:21:28,537 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:21:28,538 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:21:28,902 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:21:28,932 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:21:28,940 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:21:28,942 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:21:28,942 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:21:28,943 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec2_product11.cil.c [2021-01-06 18:21:29,039 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/1c3835517/8891fb6aed5848a08d4c6508dfd0b2e1/FLAG6ede5407f [2021-01-06 18:21:29,863 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:21:29,864 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product11.cil.c [2021-01-06 18:21:29,900 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/1c3835517/8891fb6aed5848a08d4c6508dfd0b2e1/FLAG6ede5407f [2021-01-06 18:21:30,051 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/1c3835517/8891fb6aed5848a08d4c6508dfd0b2e1 [2021-01-06 18:21:30,064 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:21:30,070 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:21:30,073 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:21:30,073 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:21:30,077 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:21:30,078 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:21:30" (1/1) ... [2021-01-06 18:21:30,080 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4100f889 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:30, skipping insertion in model container [2021-01-06 18:21:30,080 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:21:30" (1/1) ... [2021-01-06 18:21:30,088 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:21:30,189 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-06 18:21:30,352 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product11.cil.c[1221,1234] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:21:30,855 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:21:30,866 INFO L203 MainTranslator]: Completed pre-run [2021-01-06 18:21:30,881 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product11.cil.c[1221,1234] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:21:31,103 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:21:31,177 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:21:31,178 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31 WrapperNode [2021-01-06 18:21:31,178 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:21:31,179 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:21:31,180 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:21:31,180 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:21:31,188 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,220 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,538 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:21:31,540 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:21:31,541 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:21:31,541 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:21:31,552 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,552 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,600 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,601 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,699 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,762 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,782 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... [2021-01-06 18:21:31,815 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:21:31,817 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:21:31,817 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:21:31,817 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:21:31,818 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:21:31,917 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:21:31,917 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:21:31,917 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:21:31,917 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:21:36,531 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:21:36,532 INFO L299 CfgBuilder]: Removed 565 assume(true) statements. [2021-01-06 18:21:36,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:21:36 BoogieIcfgContainer [2021-01-06 18:21:36,537 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:21:36,539 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:21:36,539 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:21:36,543 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:21:36,543 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:21:30" (1/3) ... [2021-01-06 18:21:36,544 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6172c610 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:21:36, skipping insertion in model container [2021-01-06 18:21:36,544 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:21:31" (2/3) ... [2021-01-06 18:21:36,545 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6172c610 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:21:36, skipping insertion in model container [2021-01-06 18:21:36,545 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:21:36" (3/3) ... [2021-01-06 18:21:36,546 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec2_product11.cil.c [2021-01-06 18:21:36,553 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:21:36,559 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:21:36,581 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:21:36,638 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:21:36,638 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:21:36,638 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:21:36,639 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:21:36,639 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:21:36,639 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:21:36,639 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:21:36,639 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:21:36,707 INFO L276 IsEmpty]: Start isEmpty. Operand 2412 states. [2021-01-06 18:21:36,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-01-06 18:21:36,741 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:36,742 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:36,743 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:36,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:36,750 INFO L82 PathProgramCache]: Analyzing trace with hash -290760884, now seen corresponding path program 1 times [2021-01-06 18:21:36,760 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:36,760 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915399177] [2021-01-06 18:21:36,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:37,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:37,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:37,238 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915399177] [2021-01-06 18:21:37,239 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:37,239 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:37,240 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819504577] [2021-01-06 18:21:37,247 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:37,247 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:37,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:37,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:37,263 INFO L87 Difference]: Start difference. First operand 2412 states. Second operand 3 states. [2021-01-06 18:21:37,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:37,449 INFO L93 Difference]: Finished difference Result 4815 states and 9093 transitions. [2021-01-06 18:21:37,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:37,451 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2021-01-06 18:21:37,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:37,502 INFO L225 Difference]: With dead ends: 4815 [2021-01-06 18:21:37,502 INFO L226 Difference]: Without dead ends: 2408 [2021-01-06 18:21:37,516 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:37,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2408 states. [2021-01-06 18:21:37,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2408 to 2408. [2021-01-06 18:21:37,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2408 states. [2021-01-06 18:21:37,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2408 states to 2408 states and 4537 transitions. [2021-01-06 18:21:37,687 INFO L78 Accepts]: Start accepts. Automaton has 2408 states and 4537 transitions. Word has length 44 [2021-01-06 18:21:37,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:37,688 INFO L481 AbstractCegarLoop]: Abstraction has 2408 states and 4537 transitions. [2021-01-06 18:21:37,688 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:37,688 INFO L276 IsEmpty]: Start isEmpty. Operand 2408 states and 4537 transitions. [2021-01-06 18:21:37,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-01-06 18:21:37,691 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:37,692 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:37,692 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:21:37,692 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:37,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:37,693 INFO L82 PathProgramCache]: Analyzing trace with hash 1144028709, now seen corresponding path program 1 times [2021-01-06 18:21:37,694 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:37,694 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640924237] [2021-01-06 18:21:37,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:37,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:37,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:37,815 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640924237] [2021-01-06 18:21:37,815 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:37,815 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:21:37,816 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071404393] [2021-01-06 18:21:37,818 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:21:37,819 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:37,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:21:37,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:37,820 INFO L87 Difference]: Start difference. First operand 2408 states and 4537 transitions. Second operand 6 states. [2021-01-06 18:21:38,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:38,169 INFO L93 Difference]: Finished difference Result 4767 states and 8990 transitions. [2021-01-06 18:21:38,170 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:38,170 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2021-01-06 18:21:38,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:38,192 INFO L225 Difference]: With dead ends: 4767 [2021-01-06 18:21:38,192 INFO L226 Difference]: Without dead ends: 2402 [2021-01-06 18:21:38,198 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:21:38,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2402 states. [2021-01-06 18:21:38,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2402 to 2402. [2021-01-06 18:21:38,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2402 states. [2021-01-06 18:21:38,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2402 states to 2402 states and 4524 transitions. [2021-01-06 18:21:38,292 INFO L78 Accepts]: Start accepts. Automaton has 2402 states and 4524 transitions. Word has length 51 [2021-01-06 18:21:38,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:38,293 INFO L481 AbstractCegarLoop]: Abstraction has 2402 states and 4524 transitions. [2021-01-06 18:21:38,293 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:21:38,293 INFO L276 IsEmpty]: Start isEmpty. Operand 2402 states and 4524 transitions. [2021-01-06 18:21:38,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:21:38,298 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:38,298 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:38,299 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:21:38,301 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:38,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:38,303 INFO L82 PathProgramCache]: Analyzing trace with hash 832146375, now seen corresponding path program 1 times [2021-01-06 18:21:38,303 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:38,304 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122101881] [2021-01-06 18:21:38,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:38,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:38,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:38,463 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122101881] [2021-01-06 18:21:38,463 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:38,464 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:38,464 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609798423] [2021-01-06 18:21:38,465 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:38,465 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:38,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:38,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:38,468 INFO L87 Difference]: Start difference. First operand 2402 states and 4524 transitions. Second operand 4 states. [2021-01-06 18:21:38,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:38,669 INFO L93 Difference]: Finished difference Result 4761 states and 8977 transitions. [2021-01-06 18:21:38,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:38,670 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2021-01-06 18:21:38,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:38,686 INFO L225 Difference]: With dead ends: 4761 [2021-01-06 18:21:38,686 INFO L226 Difference]: Without dead ends: 2402 [2021-01-06 18:21:38,690 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:38,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2402 states. [2021-01-06 18:21:38,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2402 to 2402. [2021-01-06 18:21:38,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2402 states. [2021-01-06 18:21:38,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2402 states to 2402 states and 4520 transitions. [2021-01-06 18:21:38,796 INFO L78 Accepts]: Start accepts. Automaton has 2402 states and 4520 transitions. Word has length 52 [2021-01-06 18:21:38,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:38,804 INFO L481 AbstractCegarLoop]: Abstraction has 2402 states and 4520 transitions. [2021-01-06 18:21:38,804 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:38,805 INFO L276 IsEmpty]: Start isEmpty. Operand 2402 states and 4520 transitions. [2021-01-06 18:21:38,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-01-06 18:21:38,808 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:38,808 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:38,808 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:21:38,809 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:38,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:38,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1234534178, now seen corresponding path program 1 times [2021-01-06 18:21:38,811 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:38,811 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624137415] [2021-01-06 18:21:38,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:38,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:38,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:38,918 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624137415] [2021-01-06 18:21:38,918 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:38,919 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:38,919 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664645379] [2021-01-06 18:21:38,919 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:38,920 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:38,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:38,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:38,921 INFO L87 Difference]: Start difference. First operand 2402 states and 4520 transitions. Second operand 4 states. [2021-01-06 18:21:39,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:39,100 INFO L93 Difference]: Finished difference Result 4761 states and 8973 transitions. [2021-01-06 18:21:39,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:39,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2021-01-06 18:21:39,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:39,116 INFO L225 Difference]: With dead ends: 4761 [2021-01-06 18:21:39,116 INFO L226 Difference]: Without dead ends: 2402 [2021-01-06 18:21:39,120 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:39,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2402 states. [2021-01-06 18:21:39,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2402 to 2402. [2021-01-06 18:21:39,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2402 states. [2021-01-06 18:21:39,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2402 states to 2402 states and 4516 transitions. [2021-01-06 18:21:39,285 INFO L78 Accepts]: Start accepts. Automaton has 2402 states and 4516 transitions. Word has length 53 [2021-01-06 18:21:39,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:39,287 INFO L481 AbstractCegarLoop]: Abstraction has 2402 states and 4516 transitions. [2021-01-06 18:21:39,287 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:39,287 INFO L276 IsEmpty]: Start isEmpty. Operand 2402 states and 4516 transitions. [2021-01-06 18:21:39,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:21:39,289 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:39,290 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:39,291 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:21:39,293 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:39,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:39,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1985220866, now seen corresponding path program 1 times [2021-01-06 18:21:39,294 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:39,295 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293959052] [2021-01-06 18:21:39,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:39,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:39,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:39,392 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293959052] [2021-01-06 18:21:39,393 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:39,393 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:39,393 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49781045] [2021-01-06 18:21:39,394 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:39,394 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:39,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:39,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:39,396 INFO L87 Difference]: Start difference. First operand 2402 states and 4516 transitions. Second operand 4 states. [2021-01-06 18:21:39,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:39,596 INFO L93 Difference]: Finished difference Result 4761 states and 8969 transitions. [2021-01-06 18:21:39,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:39,598 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2021-01-06 18:21:39,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:39,613 INFO L225 Difference]: With dead ends: 4761 [2021-01-06 18:21:39,613 INFO L226 Difference]: Without dead ends: 2402 [2021-01-06 18:21:39,618 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:39,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2402 states. [2021-01-06 18:21:39,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2402 to 2402. [2021-01-06 18:21:39,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2402 states. [2021-01-06 18:21:39,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2402 states to 2402 states and 4512 transitions. [2021-01-06 18:21:39,737 INFO L78 Accepts]: Start accepts. Automaton has 2402 states and 4512 transitions. Word has length 54 [2021-01-06 18:21:39,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:39,738 INFO L481 AbstractCegarLoop]: Abstraction has 2402 states and 4512 transitions. [2021-01-06 18:21:39,738 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:39,738 INFO L276 IsEmpty]: Start isEmpty. Operand 2402 states and 4512 transitions. [2021-01-06 18:21:39,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:21:39,742 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:39,742 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:39,742 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:21:39,743 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:39,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:39,743 INFO L82 PathProgramCache]: Analyzing trace with hash 520012930, now seen corresponding path program 1 times [2021-01-06 18:21:39,744 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:39,744 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241021185] [2021-01-06 18:21:39,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:39,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:39,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:39,843 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241021185] [2021-01-06 18:21:39,843 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:39,843 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:39,843 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96024621] [2021-01-06 18:21:39,845 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:39,845 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:39,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:39,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:39,846 INFO L87 Difference]: Start difference. First operand 2402 states and 4512 transitions. Second operand 4 states. [2021-01-06 18:21:39,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:39,992 INFO L93 Difference]: Finished difference Result 4761 states and 8965 transitions. [2021-01-06 18:21:39,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:39,992 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2021-01-06 18:21:39,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:40,006 INFO L225 Difference]: With dead ends: 4761 [2021-01-06 18:21:40,007 INFO L226 Difference]: Without dead ends: 2381 [2021-01-06 18:21:40,012 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:40,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2381 states. [2021-01-06 18:21:40,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2381 to 2381. [2021-01-06 18:21:40,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:40,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4478 transitions. [2021-01-06 18:21:40,123 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4478 transitions. Word has length 54 [2021-01-06 18:21:40,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:40,123 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4478 transitions. [2021-01-06 18:21:40,123 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:40,123 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4478 transitions. [2021-01-06 18:21:40,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-01-06 18:21:40,126 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:40,126 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:40,126 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:21:40,126 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:40,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:40,132 INFO L82 PathProgramCache]: Analyzing trace with hash 648271101, now seen corresponding path program 1 times [2021-01-06 18:21:40,132 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:40,132 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286007347] [2021-01-06 18:21:40,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:40,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:40,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:40,215 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286007347] [2021-01-06 18:21:40,215 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:40,215 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:40,216 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476711225] [2021-01-06 18:21:40,217 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:40,217 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:40,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:40,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:40,218 INFO L87 Difference]: Start difference. First operand 2381 states and 4478 transitions. Second operand 4 states. [2021-01-06 18:21:40,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:40,368 INFO L93 Difference]: Finished difference Result 4740 states and 8931 transitions. [2021-01-06 18:21:40,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:40,368 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2021-01-06 18:21:40,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:40,381 INFO L225 Difference]: With dead ends: 4740 [2021-01-06 18:21:40,382 INFO L226 Difference]: Without dead ends: 2381 [2021-01-06 18:21:40,388 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:40,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2381 states. [2021-01-06 18:21:40,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2381 to 2381. [2021-01-06 18:21:40,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:40,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4477 transitions. [2021-01-06 18:21:40,482 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4477 transitions. Word has length 55 [2021-01-06 18:21:40,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:40,482 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4477 transitions. [2021-01-06 18:21:40,483 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:40,483 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4477 transitions. [2021-01-06 18:21:40,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-01-06 18:21:40,485 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:40,485 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:40,485 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:21:40,485 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:40,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:40,486 INFO L82 PathProgramCache]: Analyzing trace with hash -980899267, now seen corresponding path program 1 times [2021-01-06 18:21:40,486 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:40,486 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740348147] [2021-01-06 18:21:40,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:40,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:40,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:40,609 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740348147] [2021-01-06 18:21:40,609 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:40,609 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:40,610 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611830534] [2021-01-06 18:21:40,610 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:40,610 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:40,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:40,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:40,611 INFO L87 Difference]: Start difference. First operand 2381 states and 4477 transitions. Second operand 4 states. [2021-01-06 18:21:40,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:40,750 INFO L93 Difference]: Finished difference Result 4740 states and 8930 transitions. [2021-01-06 18:21:40,750 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:40,750 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2021-01-06 18:21:40,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:40,765 INFO L225 Difference]: With dead ends: 4740 [2021-01-06 18:21:40,765 INFO L226 Difference]: Without dead ends: 2381 [2021-01-06 18:21:40,770 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:40,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2381 states. [2021-01-06 18:21:40,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2381 to 2381. [2021-01-06 18:21:40,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:40,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4476 transitions. [2021-01-06 18:21:40,861 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4476 transitions. Word has length 56 [2021-01-06 18:21:40,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:40,861 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4476 transitions. [2021-01-06 18:21:40,861 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:40,862 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4476 transitions. [2021-01-06 18:21:40,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-01-06 18:21:40,864 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:40,864 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:40,864 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:21:40,864 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:40,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:40,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1215993560, now seen corresponding path program 1 times [2021-01-06 18:21:40,865 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:40,865 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131281349] [2021-01-06 18:21:40,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:40,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:40,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:40,961 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131281349] [2021-01-06 18:21:40,962 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:40,962 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:21:40,962 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493841497] [2021-01-06 18:21:40,962 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:21:40,963 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:40,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:21:40,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:21:40,964 INFO L87 Difference]: Start difference. First operand 2381 states and 4476 transitions. Second operand 7 states. [2021-01-06 18:21:41,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:41,183 INFO L93 Difference]: Finished difference Result 4734 states and 8918 transitions. [2021-01-06 18:21:41,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:21:41,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2021-01-06 18:21:41,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:41,213 INFO L225 Difference]: With dead ends: 4734 [2021-01-06 18:21:41,213 INFO L226 Difference]: Without dead ends: 2381 [2021-01-06 18:21:41,225 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:21:41,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2381 states. [2021-01-06 18:21:41,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2381 to 2381. [2021-01-06 18:21:41,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:41,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4475 transitions. [2021-01-06 18:21:41,325 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4475 transitions. Word has length 57 [2021-01-06 18:21:41,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:41,325 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4475 transitions. [2021-01-06 18:21:41,325 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:21:41,325 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4475 transitions. [2021-01-06 18:21:41,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:21:41,327 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:41,328 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:41,328 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:21:41,328 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:41,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:41,328 INFO L82 PathProgramCache]: Analyzing trace with hash 1756855464, now seen corresponding path program 1 times [2021-01-06 18:21:41,329 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:41,329 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711865923] [2021-01-06 18:21:41,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:41,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:41,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:41,435 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711865923] [2021-01-06 18:21:41,435 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:41,435 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:41,435 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161893303] [2021-01-06 18:21:41,436 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:41,436 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:41,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:41,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:41,437 INFO L87 Difference]: Start difference. First operand 2381 states and 4475 transitions. Second operand 4 states. [2021-01-06 18:21:42,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:42,377 INFO L93 Difference]: Finished difference Result 6609 states and 12486 transitions. [2021-01-06 18:21:42,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:42,378 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2021-01-06 18:21:42,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:42,388 INFO L225 Difference]: With dead ends: 6609 [2021-01-06 18:21:42,388 INFO L226 Difference]: Without dead ends: 4262 [2021-01-06 18:21:42,393 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:42,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4262 states. [2021-01-06 18:21:42,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4262 to 2381. [2021-01-06 18:21:42,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:42,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4469 transitions. [2021-01-06 18:21:42,505 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4469 transitions. Word has length 58 [2021-01-06 18:21:42,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:42,505 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4469 transitions. [2021-01-06 18:21:42,505 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:42,505 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4469 transitions. [2021-01-06 18:21:42,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:21:42,507 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:42,508 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:42,508 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:21:42,508 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:42,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:42,508 INFO L82 PathProgramCache]: Analyzing trace with hash -179816380, now seen corresponding path program 1 times [2021-01-06 18:21:42,509 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:42,509 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995750718] [2021-01-06 18:21:42,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:42,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:42,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:42,585 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995750718] [2021-01-06 18:21:42,586 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:42,586 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:42,586 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386743705] [2021-01-06 18:21:42,586 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:42,587 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:42,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:42,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:42,587 INFO L87 Difference]: Start difference. First operand 2381 states and 4469 transitions. Second operand 4 states. [2021-01-06 18:21:43,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:43,494 INFO L93 Difference]: Finished difference Result 6609 states and 12475 transitions. [2021-01-06 18:21:43,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:43,494 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2021-01-06 18:21:43,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:43,505 INFO L225 Difference]: With dead ends: 6609 [2021-01-06 18:21:43,506 INFO L226 Difference]: Without dead ends: 4262 [2021-01-06 18:21:43,511 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:43,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4262 states. [2021-01-06 18:21:43,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4262 to 2381. [2021-01-06 18:21:43,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:43,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4463 transitions. [2021-01-06 18:21:43,622 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4463 transitions. Word has length 60 [2021-01-06 18:21:43,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:43,622 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4463 transitions. [2021-01-06 18:21:43,622 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:43,622 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4463 transitions. [2021-01-06 18:21:43,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-01-06 18:21:43,625 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:43,625 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:43,625 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:21:43,625 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:43,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:43,626 INFO L82 PathProgramCache]: Analyzing trace with hash -1318291490, now seen corresponding path program 1 times [2021-01-06 18:21:43,626 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:43,626 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1066094884] [2021-01-06 18:21:43,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:43,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:43,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:43,722 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1066094884] [2021-01-06 18:21:43,722 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:43,722 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:43,723 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808266001] [2021-01-06 18:21:43,723 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:43,723 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:43,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:43,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:43,724 INFO L87 Difference]: Start difference. First operand 2381 states and 4463 transitions. Second operand 4 states. [2021-01-06 18:21:44,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:44,632 INFO L93 Difference]: Finished difference Result 6609 states and 12464 transitions. [2021-01-06 18:21:44,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:44,633 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 62 [2021-01-06 18:21:44,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:44,645 INFO L225 Difference]: With dead ends: 6609 [2021-01-06 18:21:44,646 INFO L226 Difference]: Without dead ends: 4262 [2021-01-06 18:21:44,652 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:44,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4262 states. [2021-01-06 18:21:44,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4262 to 2381. [2021-01-06 18:21:44,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:44,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4457 transitions. [2021-01-06 18:21:44,779 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4457 transitions. Word has length 62 [2021-01-06 18:21:44,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:44,779 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4457 transitions. [2021-01-06 18:21:44,779 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:44,779 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4457 transitions. [2021-01-06 18:21:44,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-01-06 18:21:44,782 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:44,782 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:44,782 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:21:44,782 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:44,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:44,783 INFO L82 PathProgramCache]: Analyzing trace with hash -2074320220, now seen corresponding path program 1 times [2021-01-06 18:21:44,783 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:44,784 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56407532] [2021-01-06 18:21:44,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:44,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:44,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:44,862 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56407532] [2021-01-06 18:21:44,863 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:44,863 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:44,863 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383571860] [2021-01-06 18:21:44,863 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:44,863 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:44,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:44,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:44,864 INFO L87 Difference]: Start difference. First operand 2381 states and 4457 transitions. Second operand 4 states. [2021-01-06 18:21:45,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:45,804 INFO L93 Difference]: Finished difference Result 6609 states and 12453 transitions. [2021-01-06 18:21:45,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:21:45,805 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2021-01-06 18:21:45,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:45,815 INFO L225 Difference]: With dead ends: 6609 [2021-01-06 18:21:45,816 INFO L226 Difference]: Without dead ends: 4262 [2021-01-06 18:21:45,821 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:45,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4262 states. [2021-01-06 18:21:45,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4262 to 2381. [2021-01-06 18:21:45,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2021-01-06 18:21:45,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 4451 transitions. [2021-01-06 18:21:45,951 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 4451 transitions. Word has length 64 [2021-01-06 18:21:45,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:45,952 INFO L481 AbstractCegarLoop]: Abstraction has 2381 states and 4451 transitions. [2021-01-06 18:21:45,952 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:21:45,952 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 4451 transitions. [2021-01-06 18:21:45,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:21:45,955 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:45,955 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:45,955 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:21:45,955 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:45,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:45,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1621494380, now seen corresponding path program 1 times [2021-01-06 18:21:45,956 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:45,956 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310439456] [2021-01-06 18:21:45,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:45,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:46,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:46,027 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310439456] [2021-01-06 18:21:46,027 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:46,027 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:21:46,027 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672463390] [2021-01-06 18:21:46,028 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:46,028 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:46,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:46,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:46,029 INFO L87 Difference]: Start difference. First operand 2381 states and 4451 transitions. Second operand 3 states. [2021-01-06 18:21:46,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:46,431 INFO L93 Difference]: Finished difference Result 4840 states and 9026 transitions. [2021-01-06 18:21:46,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:46,431 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2021-01-06 18:21:46,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:46,439 INFO L225 Difference]: With dead ends: 4840 [2021-01-06 18:21:46,439 INFO L226 Difference]: Without dead ends: 3332 [2021-01-06 18:21:46,443 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:46,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3332 states. [2021-01-06 18:21:46,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3332 to 3308. [2021-01-06 18:21:46,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3308 states. [2021-01-06 18:21:46,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3308 states to 3308 states and 6133 transitions. [2021-01-06 18:21:46,575 INFO L78 Accepts]: Start accepts. Automaton has 3308 states and 6133 transitions. Word has length 66 [2021-01-06 18:21:46,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:46,575 INFO L481 AbstractCegarLoop]: Abstraction has 3308 states and 6133 transitions. [2021-01-06 18:21:46,575 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:46,575 INFO L276 IsEmpty]: Start isEmpty. Operand 3308 states and 6133 transitions. [2021-01-06 18:21:46,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:21:46,577 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:46,577 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:46,577 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:21:46,578 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:46,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:46,578 INFO L82 PathProgramCache]: Analyzing trace with hash -610377130, now seen corresponding path program 1 times [2021-01-06 18:21:46,578 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:46,579 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285520294] [2021-01-06 18:21:46,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:46,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:46,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:46,639 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [285520294] [2021-01-06 18:21:46,639 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:46,639 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:46,639 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847650859] [2021-01-06 18:21:46,640 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:46,640 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:46,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:46,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:46,641 INFO L87 Difference]: Start difference. First operand 3308 states and 6133 transitions. Second operand 3 states. [2021-01-06 18:21:46,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:46,880 INFO L93 Difference]: Finished difference Result 8400 states and 15663 transitions. [2021-01-06 18:21:46,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:46,881 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2021-01-06 18:21:46,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:46,894 INFO L225 Difference]: With dead ends: 8400 [2021-01-06 18:21:46,894 INFO L226 Difference]: Without dead ends: 6110 [2021-01-06 18:21:46,900 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:46,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6110 states. [2021-01-06 18:21:47,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6110 to 6110. [2021-01-06 18:21:47,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6110 states. [2021-01-06 18:21:47,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6110 states to 6110 states and 11398 transitions. [2021-01-06 18:21:47,172 INFO L78 Accepts]: Start accepts. Automaton has 6110 states and 11398 transitions. Word has length 66 [2021-01-06 18:21:47,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:47,172 INFO L481 AbstractCegarLoop]: Abstraction has 6110 states and 11398 transitions. [2021-01-06 18:21:47,173 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:47,173 INFO L276 IsEmpty]: Start isEmpty. Operand 6110 states and 11398 transitions. [2021-01-06 18:21:47,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:21:47,175 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:47,175 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:47,175 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:21:47,175 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:47,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:47,176 INFO L82 PathProgramCache]: Analyzing trace with hash -1344930565, now seen corresponding path program 1 times [2021-01-06 18:21:47,176 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:47,176 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990928910] [2021-01-06 18:21:47,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:47,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:47,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:47,239 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990928910] [2021-01-06 18:21:47,239 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:47,239 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:47,239 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909876998] [2021-01-06 18:21:47,240 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:47,240 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:47,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:47,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:47,240 INFO L87 Difference]: Start difference. First operand 6110 states and 11398 transitions. Second operand 3 states. [2021-01-06 18:21:47,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:47,577 INFO L93 Difference]: Finished difference Result 16139 states and 30174 transitions. [2021-01-06 18:21:47,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:47,578 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2021-01-06 18:21:47,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:47,608 INFO L225 Difference]: With dead ends: 16139 [2021-01-06 18:21:47,608 INFO L226 Difference]: Without dead ends: 11608 [2021-01-06 18:21:47,620 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:47,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11608 states. [2021-01-06 18:21:48,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11608 to 11606. [2021-01-06 18:21:48,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11606 states. [2021-01-06 18:21:48,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11606 states to 11606 states and 21719 transitions. [2021-01-06 18:21:48,136 INFO L78 Accepts]: Start accepts. Automaton has 11606 states and 21719 transitions. Word has length 68 [2021-01-06 18:21:48,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:48,136 INFO L481 AbstractCegarLoop]: Abstraction has 11606 states and 21719 transitions. [2021-01-06 18:21:48,136 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:48,136 INFO L276 IsEmpty]: Start isEmpty. Operand 11606 states and 21719 transitions. [2021-01-06 18:21:48,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:21:48,139 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:48,139 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:48,139 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:21:48,139 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:48,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:48,140 INFO L82 PathProgramCache]: Analyzing trace with hash 72240446, now seen corresponding path program 1 times [2021-01-06 18:21:48,140 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:48,140 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21133866] [2021-01-06 18:21:48,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:48,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:48,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:48,207 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21133866] [2021-01-06 18:21:48,207 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:48,208 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:48,208 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016174879] [2021-01-06 18:21:48,208 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:48,208 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:48,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:48,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:48,209 INFO L87 Difference]: Start difference. First operand 11606 states and 21719 transitions. Second operand 3 states. [2021-01-06 18:21:48,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:48,823 INFO L93 Difference]: Finished difference Result 31389 states and 58758 transitions. [2021-01-06 18:21:48,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:48,824 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2021-01-06 18:21:48,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:48,873 INFO L225 Difference]: With dead ends: 31389 [2021-01-06 18:21:48,873 INFO L226 Difference]: Without dead ends: 22383 [2021-01-06 18:21:48,891 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:48,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22383 states. [2021-01-06 18:21:49,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22383 to 22379. [2021-01-06 18:21:49,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22379 states. [2021-01-06 18:21:49,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22379 states to 22379 states and 41937 transitions. [2021-01-06 18:21:49,837 INFO L78 Accepts]: Start accepts. Automaton has 22379 states and 41937 transitions. Word has length 69 [2021-01-06 18:21:49,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:49,838 INFO L481 AbstractCegarLoop]: Abstraction has 22379 states and 41937 transitions. [2021-01-06 18:21:49,838 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:49,838 INFO L276 IsEmpty]: Start isEmpty. Operand 22379 states and 41937 transitions. [2021-01-06 18:21:49,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-01-06 18:21:49,841 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:49,841 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:49,841 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:21:49,841 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:49,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:49,842 INFO L82 PathProgramCache]: Analyzing trace with hash -2055495902, now seen corresponding path program 1 times [2021-01-06 18:21:49,842 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:49,842 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509373883] [2021-01-06 18:21:49,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:49,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:49,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:49,913 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509373883] [2021-01-06 18:21:49,913 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:49,914 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:49,917 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505066823] [2021-01-06 18:21:49,919 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:49,919 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:49,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:49,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:49,920 INFO L87 Difference]: Start difference. First operand 22379 states and 41937 transitions. Second operand 3 states. [2021-01-06 18:21:51,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:51,219 INFO L93 Difference]: Finished difference Result 61427 states and 115036 transitions. [2021-01-06 18:21:51,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:51,220 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2021-01-06 18:21:51,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:51,299 INFO L225 Difference]: With dead ends: 61427 [2021-01-06 18:21:51,300 INFO L226 Difference]: Without dead ends: 43490 [2021-01-06 18:21:51,335 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:51,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43490 states. [2021-01-06 18:21:53,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43490 to 43484. [2021-01-06 18:21:53,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43484 states. [2021-01-06 18:21:53,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43484 states to 43484 states and 81519 transitions. [2021-01-06 18:21:53,158 INFO L78 Accepts]: Start accepts. Automaton has 43484 states and 81519 transitions. Word has length 70 [2021-01-06 18:21:53,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:53,159 INFO L481 AbstractCegarLoop]: Abstraction has 43484 states and 81519 transitions. [2021-01-06 18:21:53,159 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:53,159 INFO L276 IsEmpty]: Start isEmpty. Operand 43484 states and 81519 transitions. [2021-01-06 18:21:53,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-01-06 18:21:53,162 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:53,162 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:53,163 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:21:53,163 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:53,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:53,163 INFO L82 PathProgramCache]: Analyzing trace with hash 704154055, now seen corresponding path program 1 times [2021-01-06 18:21:53,164 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:53,164 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766887801] [2021-01-06 18:21:53,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:53,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:53,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:53,351 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766887801] [2021-01-06 18:21:53,351 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:53,351 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:21:53,352 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881546522] [2021-01-06 18:21:53,353 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:21:53,353 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:53,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:21:53,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:53,354 INFO L87 Difference]: Start difference. First operand 43484 states and 81519 transitions. Second operand 3 states. [2021-01-06 18:21:55,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:55,424 INFO L93 Difference]: Finished difference Result 120573 states and 225797 transitions. [2021-01-06 18:21:55,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:21:55,424 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 71 [2021-01-06 18:21:55,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:55,566 INFO L225 Difference]: With dead ends: 120573 [2021-01-06 18:21:55,567 INFO L226 Difference]: Without dead ends: 84812 [2021-01-06 18:21:55,598 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:21:55,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84812 states. [2021-01-06 18:21:58,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84812 to 84804. [2021-01-06 18:21:58,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84804 states. [2021-01-06 18:21:58,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84804 states to 84804 states and 158954 transitions. [2021-01-06 18:21:58,389 INFO L78 Accepts]: Start accepts. Automaton has 84804 states and 158954 transitions. Word has length 71 [2021-01-06 18:21:58,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:58,390 INFO L481 AbstractCegarLoop]: Abstraction has 84804 states and 158954 transitions. [2021-01-06 18:21:58,390 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:21:58,390 INFO L276 IsEmpty]: Start isEmpty. Operand 84804 states and 158954 transitions. [2021-01-06 18:21:58,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-01-06 18:21:58,413 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:58,413 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:58,413 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:21:58,413 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:58,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:58,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1921622606, now seen corresponding path program 1 times [2021-01-06 18:21:58,414 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:58,414 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401349815] [2021-01-06 18:21:58,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:58,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:58,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:58,491 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401349815] [2021-01-06 18:21:58,491 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:58,491 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:58,492 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684004222] [2021-01-06 18:21:58,492 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:21:58,492 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:58,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:21:58,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:21:58,493 INFO L87 Difference]: Start difference. First operand 84804 states and 158954 transitions. Second operand 4 states. [2021-01-06 18:22:01,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:01,644 INFO L93 Difference]: Finished difference Result 188073 states and 350233 transitions. [2021-01-06 18:22:01,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:22:01,644 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 102 [2021-01-06 18:22:01,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:01,832 INFO L225 Difference]: With dead ends: 188073 [2021-01-06 18:22:01,833 INFO L226 Difference]: Without dead ends: 103506 [2021-01-06 18:22:01,897 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:02,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103506 states. [2021-01-06 18:22:04,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103506 to 84934. [2021-01-06 18:22:04,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84934 states. [2021-01-06 18:22:04,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84934 states to 84934 states and 159084 transitions. [2021-01-06 18:22:04,978 INFO L78 Accepts]: Start accepts. Automaton has 84934 states and 159084 transitions. Word has length 102 [2021-01-06 18:22:04,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:04,979 INFO L481 AbstractCegarLoop]: Abstraction has 84934 states and 159084 transitions. [2021-01-06 18:22:04,979 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:04,979 INFO L276 IsEmpty]: Start isEmpty. Operand 84934 states and 159084 transitions. [2021-01-06 18:22:05,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2021-01-06 18:22:05,000 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:05,000 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:05,000 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:22:05,000 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:05,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:05,001 INFO L82 PathProgramCache]: Analyzing trace with hash -756118418, now seen corresponding path program 1 times [2021-01-06 18:22:05,002 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:05,002 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096758036] [2021-01-06 18:22:05,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:05,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:05,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:05,075 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096758036] [2021-01-06 18:22:05,076 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:05,076 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:05,076 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561453092] [2021-01-06 18:22:05,077 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:05,077 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:05,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:05,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:05,077 INFO L87 Difference]: Start difference. First operand 84934 states and 159084 transitions. Second operand 5 states. [2021-01-06 18:22:13,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:13,111 INFO L93 Difference]: Finished difference Result 341447 states and 636879 transitions. [2021-01-06 18:22:13,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:22:13,111 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 104 [2021-01-06 18:22:13,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:13,629 INFO L225 Difference]: With dead ends: 341447 [2021-01-06 18:22:13,629 INFO L226 Difference]: Without dead ends: 256582 [2021-01-06 18:22:13,736 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:22:13,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256582 states. [2021-01-06 18:22:17,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256582 to 85194. [2021-01-06 18:22:17,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85194 states. [2021-01-06 18:22:17,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85194 states to 85194 states and 159344 transitions. [2021-01-06 18:22:17,842 INFO L78 Accepts]: Start accepts. Automaton has 85194 states and 159344 transitions. Word has length 104 [2021-01-06 18:22:17,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:17,843 INFO L481 AbstractCegarLoop]: Abstraction has 85194 states and 159344 transitions. [2021-01-06 18:22:17,843 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:17,843 INFO L276 IsEmpty]: Start isEmpty. Operand 85194 states and 159344 transitions. [2021-01-06 18:22:17,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2021-01-06 18:22:17,858 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:17,858 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:17,859 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:22:17,859 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:17,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:17,859 INFO L82 PathProgramCache]: Analyzing trace with hash -305155431, now seen corresponding path program 1 times [2021-01-06 18:22:17,859 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:17,860 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136941286] [2021-01-06 18:22:17,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:17,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:18,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:18,148 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136941286] [2021-01-06 18:22:18,149 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:18,149 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:18,152 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126610794] [2021-01-06 18:22:18,152 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:18,152 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:18,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:18,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:18,153 INFO L87 Difference]: Start difference. First operand 85194 states and 159344 transitions. Second operand 4 states. [2021-01-06 18:22:22,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:22,175 INFO L93 Difference]: Finished difference Result 175269 states and 327594 transitions. [2021-01-06 18:22:22,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:22,177 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2021-01-06 18:22:22,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:22,327 INFO L225 Difference]: With dead ends: 175269 [2021-01-06 18:22:22,327 INFO L226 Difference]: Without dead ends: 90130 [2021-01-06 18:22:22,387 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:22,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90130 states. [2021-01-06 18:22:25,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90130 to 85194. [2021-01-06 18:22:25,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85194 states. [2021-01-06 18:22:25,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85194 states to 85194 states and 159278 transitions. [2021-01-06 18:22:25,566 INFO L78 Accepts]: Start accepts. Automaton has 85194 states and 159278 transitions. Word has length 105 [2021-01-06 18:22:25,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:25,566 INFO L481 AbstractCegarLoop]: Abstraction has 85194 states and 159278 transitions. [2021-01-06 18:22:25,566 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:25,567 INFO L276 IsEmpty]: Start isEmpty. Operand 85194 states and 159278 transitions. [2021-01-06 18:22:25,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:22:25,580 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:25,580 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:25,581 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:22:25,581 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:25,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:25,581 INFO L82 PathProgramCache]: Analyzing trace with hash 1265972457, now seen corresponding path program 1 times [2021-01-06 18:22:25,582 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:25,582 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056792021] [2021-01-06 18:22:25,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:25,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:25,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:25,732 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056792021] [2021-01-06 18:22:25,734 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:25,735 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:25,735 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338562413] [2021-01-06 18:22:25,735 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:25,739 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:25,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:25,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:25,740 INFO L87 Difference]: Start difference. First operand 85194 states and 159278 transitions. Second operand 4 states. [2021-01-06 18:22:29,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:29,776 INFO L93 Difference]: Finished difference Result 175269 states and 327464 transitions. [2021-01-06 18:22:29,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:29,777 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2021-01-06 18:22:29,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:29,917 INFO L225 Difference]: With dead ends: 175269 [2021-01-06 18:22:29,917 INFO L226 Difference]: Without dead ends: 90130 [2021-01-06 18:22:29,971 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:30,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90130 states. [2021-01-06 18:22:32,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90130 to 85194. [2021-01-06 18:22:32,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85194 states. [2021-01-06 18:22:33,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85194 states to 85194 states and 159212 transitions. [2021-01-06 18:22:33,057 INFO L78 Accepts]: Start accepts. Automaton has 85194 states and 159212 transitions. Word has length 106 [2021-01-06 18:22:33,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:33,058 INFO L481 AbstractCegarLoop]: Abstraction has 85194 states and 159212 transitions. [2021-01-06 18:22:33,058 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:33,058 INFO L276 IsEmpty]: Start isEmpty. Operand 85194 states and 159212 transitions. [2021-01-06 18:22:33,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2021-01-06 18:22:33,070 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:33,070 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:33,070 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:22:33,070 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:33,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:33,071 INFO L82 PathProgramCache]: Analyzing trace with hash 1820254817, now seen corresponding path program 1 times [2021-01-06 18:22:33,071 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:33,071 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430700594] [2021-01-06 18:22:33,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:33,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:33,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:33,136 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [430700594] [2021-01-06 18:22:33,136 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:33,136 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:33,137 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227418274] [2021-01-06 18:22:33,137 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:33,137 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:33,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:33,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:33,138 INFO L87 Difference]: Start difference. First operand 85194 states and 159212 transitions. Second operand 5 states. [2021-01-06 18:22:50,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:50,701 INFO L93 Difference]: Finished difference Result 720379 states and 1346844 transitions. [2021-01-06 18:22:50,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:22:50,702 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2021-01-06 18:22:50,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:52,115 INFO L225 Difference]: With dead ends: 720379 [2021-01-06 18:22:52,116 INFO L226 Difference]: Without dead ends: 635258 [2021-01-06 18:22:52,796 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:22:53,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635258 states. [2021-01-06 18:23:02,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635258 to 168279. [2021-01-06 18:23:02,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168279 states. [2021-01-06 18:23:03,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168279 states to 168279 states and 313939 transitions. [2021-01-06 18:23:03,098 INFO L78 Accepts]: Start accepts. Automaton has 168279 states and 313939 transitions. Word has length 107 [2021-01-06 18:23:03,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:03,099 INFO L481 AbstractCegarLoop]: Abstraction has 168279 states and 313939 transitions. [2021-01-06 18:23:03,099 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:03,099 INFO L276 IsEmpty]: Start isEmpty. Operand 168279 states and 313939 transitions. [2021-01-06 18:23:03,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2021-01-06 18:23:03,133 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:03,134 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:03,134 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:23:03,134 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:03,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:03,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1520772321, now seen corresponding path program 1 times [2021-01-06 18:23:03,135 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:03,135 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201791239] [2021-01-06 18:23:03,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:03,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:03,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:03,199 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201791239] [2021-01-06 18:23:03,200 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:03,200 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:03,200 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [390599577] [2021-01-06 18:23:03,200 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:03,200 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:03,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:03,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:03,201 INFO L87 Difference]: Start difference. First operand 168279 states and 313939 transitions. Second operand 5 states. [2021-01-06 18:23:14,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:14,248 INFO L93 Difference]: Finished difference Result 403856 states and 744668 transitions. [2021-01-06 18:23:14,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-01-06 18:23:14,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2021-01-06 18:23:14,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:15,197 INFO L225 Difference]: With dead ends: 403856 [2021-01-06 18:23:15,197 INFO L226 Difference]: Without dead ends: 235824 [2021-01-06 18:23:15,362 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:23:15,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235824 states. [2021-01-06 18:23:22,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235824 to 168537. [2021-01-06 18:23:22,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168537 states. [2021-01-06 18:23:22,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168537 states to 168537 states and 314197 transitions. [2021-01-06 18:23:22,918 INFO L78 Accepts]: Start accepts. Automaton has 168537 states and 314197 transitions. Word has length 107 [2021-01-06 18:23:22,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:22,918 INFO L481 AbstractCegarLoop]: Abstraction has 168537 states and 314197 transitions. [2021-01-06 18:23:22,918 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:22,918 INFO L276 IsEmpty]: Start isEmpty. Operand 168537 states and 314197 transitions. [2021-01-06 18:23:22,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2021-01-06 18:23:22,934 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:22,934 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:22,934 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:23:22,934 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:22,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:22,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1092493388, now seen corresponding path program 1 times [2021-01-06 18:23:22,935 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:22,935 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [208127417] [2021-01-06 18:23:22,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:22,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:23,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:23,038 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [208127417] [2021-01-06 18:23:23,038 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:23,038 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:23,038 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279939097] [2021-01-06 18:23:23,039 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:23:23,039 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:23,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:23:23,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:23:23,040 INFO L87 Difference]: Start difference. First operand 168537 states and 314197 transitions. Second operand 4 states. [2021-01-06 18:23:31,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:31,232 INFO L93 Difference]: Finished difference Result 346887 states and 646172 transitions. [2021-01-06 18:23:31,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:23:31,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2021-01-06 18:23:31,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:31,562 INFO L225 Difference]: With dead ends: 346887 [2021-01-06 18:23:31,562 INFO L226 Difference]: Without dead ends: 178403 [2021-01-06 18:23:31,663 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:23:31,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178403 states. [2021-01-06 18:23:38,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178403 to 168537. [2021-01-06 18:23:38,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168537 states. [2021-01-06 18:23:38,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168537 states to 168537 states and 314067 transitions. [2021-01-06 18:23:38,496 INFO L78 Accepts]: Start accepts. Automaton has 168537 states and 314067 transitions. Word has length 107 [2021-01-06 18:23:38,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:38,496 INFO L481 AbstractCegarLoop]: Abstraction has 168537 states and 314067 transitions. [2021-01-06 18:23:38,496 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:23:38,496 INFO L276 IsEmpty]: Start isEmpty. Operand 168537 states and 314067 transitions. [2021-01-06 18:23:38,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2021-01-06 18:23:38,510 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:38,510 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:38,510 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:23:38,510 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:38,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:38,511 INFO L82 PathProgramCache]: Analyzing trace with hash 336176870, now seen corresponding path program 1 times [2021-01-06 18:23:38,511 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:38,511 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962414523] [2021-01-06 18:23:38,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:38,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:38,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:38,911 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962414523] [2021-01-06 18:23:38,911 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:38,911 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:38,912 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762933866] [2021-01-06 18:23:38,912 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:38,912 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:38,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:38,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:38,913 INFO L87 Difference]: Start difference. First operand 168537 states and 314067 transitions. Second operand 5 states. [2021-01-06 18:23:51,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:51,506 INFO L93 Difference]: Finished difference Result 409281 states and 757052 transitions. [2021-01-06 18:23:51,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:23:51,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 108 [2021-01-06 18:23:51,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:51,980 INFO L225 Difference]: With dead ends: 409281 [2021-01-06 18:23:51,981 INFO L226 Difference]: Without dead ends: 240785 [2021-01-06 18:23:52,186 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:23:52,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240785 states. [2021-01-06 18:23:58,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240785 to 139616. [2021-01-06 18:23:58,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139616 states. [2021-01-06 18:23:58,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139616 states to 139616 states and 259092 transitions. [2021-01-06 18:23:58,955 INFO L78 Accepts]: Start accepts. Automaton has 139616 states and 259092 transitions. Word has length 108 [2021-01-06 18:23:58,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:58,955 INFO L481 AbstractCegarLoop]: Abstraction has 139616 states and 259092 transitions. [2021-01-06 18:23:58,955 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:58,955 INFO L276 IsEmpty]: Start isEmpty. Operand 139616 states and 259092 transitions. [2021-01-06 18:23:58,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2021-01-06 18:23:58,974 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:58,974 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:58,974 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:23:58,974 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:58,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:58,975 INFO L82 PathProgramCache]: Analyzing trace with hash -2055425111, now seen corresponding path program 1 times [2021-01-06 18:23:58,975 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:58,975 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626431000] [2021-01-06 18:23:58,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:59,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:59,344 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:59,344 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626431000] [2021-01-06 18:23:59,344 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:59,344 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:23:59,344 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362837874] [2021-01-06 18:23:59,345 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:59,345 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:59,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:59,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:59,346 INFO L87 Difference]: Start difference. First operand 139616 states and 259092 transitions. Second operand 5 states. [2021-01-06 18:24:16,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:16,496 INFO L93 Difference]: Finished difference Result 559559 states and 1036393 transitions. [2021-01-06 18:24:16,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:24:16,497 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 153 [2021-01-06 18:24:16,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:17,594 INFO L225 Difference]: With dead ends: 559559 [2021-01-06 18:24:17,594 INFO L226 Difference]: Without dead ends: 420164 [2021-01-06 18:24:17,739 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:24:18,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420164 states. [2021-01-06 18:24:28,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420164 to 139744. [2021-01-06 18:24:28,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139744 states. [2021-01-06 18:24:28,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139744 states to 139744 states and 259156 transitions. [2021-01-06 18:24:28,597 INFO L78 Accepts]: Start accepts. Automaton has 139744 states and 259156 transitions. Word has length 153 [2021-01-06 18:24:28,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:28,598 INFO L481 AbstractCegarLoop]: Abstraction has 139744 states and 259156 transitions. [2021-01-06 18:24:28,598 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:24:28,598 INFO L276 IsEmpty]: Start isEmpty. Operand 139744 states and 259156 transitions. [2021-01-06 18:24:28,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2021-01-06 18:24:28,616 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:28,617 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:28,617 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:24:28,617 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:28,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:28,618 INFO L82 PathProgramCache]: Analyzing trace with hash 1564774060, now seen corresponding path program 1 times [2021-01-06 18:24:28,618 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:28,618 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549743792] [2021-01-06 18:24:28,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:28,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:28,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:28,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549743792] [2021-01-06 18:24:28,694 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:28,694 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:24:28,694 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094109373] [2021-01-06 18:24:28,695 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:24:28,695 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:28,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:24:28,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:24:28,696 INFO L87 Difference]: Start difference. First operand 139744 states and 259156 transitions. Second operand 3 states. [2021-01-06 18:24:37,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:37,338 INFO L93 Difference]: Finished difference Result 294660 states and 543681 transitions. [2021-01-06 18:24:37,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:24:37,339 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 154 [2021-01-06 18:24:37,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:37,739 INFO L225 Difference]: With dead ends: 294660 [2021-01-06 18:24:37,739 INFO L226 Difference]: Without dead ends: 155137 [2021-01-06 18:24:37,830 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:24:37,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155137 states. [2021-01-06 18:24:44,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155137 to 138336. [2021-01-06 18:24:44,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138336 states. [2021-01-06 18:24:44,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138336 states to 138336 states and 256084 transitions. [2021-01-06 18:24:44,326 INFO L78 Accepts]: Start accepts. Automaton has 138336 states and 256084 transitions. Word has length 154 [2021-01-06 18:24:44,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:44,327 INFO L481 AbstractCegarLoop]: Abstraction has 138336 states and 256084 transitions. [2021-01-06 18:24:44,327 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:24:44,327 INFO L276 IsEmpty]: Start isEmpty. Operand 138336 states and 256084 transitions. [2021-01-06 18:24:44,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2021-01-06 18:24:44,343 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:44,343 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:44,343 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:24:44,343 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:44,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:44,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1309943377, now seen corresponding path program 1 times [2021-01-06 18:24:44,344 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:44,344 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944716298] [2021-01-06 18:24:44,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:44,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:44,780 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:44,781 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944716298] [2021-01-06 18:24:44,781 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:44,781 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:24:44,781 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24522114] [2021-01-06 18:24:44,782 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:24:44,782 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:44,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:24:44,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:24:44,782 INFO L87 Difference]: Start difference. First operand 138336 states and 256084 transitions. Second operand 5 states. [2021-01-06 18:24:52,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:52,233 INFO L93 Difference]: Finished difference Result 285944 states and 529055 transitions. [2021-01-06 18:24:52,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:24:52,234 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 157 [2021-01-06 18:24:52,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:52,668 INFO L225 Difference]: With dead ends: 285944 [2021-01-06 18:24:52,668 INFO L226 Difference]: Without dead ends: 147687 [2021-01-06 18:24:52,748 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:24:52,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147687 states. [2021-01-06 18:24:58,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147687 to 138336. [2021-01-06 18:24:58,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138336 states. [2021-01-06 18:24:59,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138336 states to 138336 states and 254284 transitions. [2021-01-06 18:24:59,371 INFO L78 Accepts]: Start accepts. Automaton has 138336 states and 254284 transitions. Word has length 157 [2021-01-06 18:24:59,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:59,372 INFO L481 AbstractCegarLoop]: Abstraction has 138336 states and 254284 transitions. [2021-01-06 18:24:59,372 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:24:59,372 INFO L276 IsEmpty]: Start isEmpty. Operand 138336 states and 254284 transitions. [2021-01-06 18:24:59,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2021-01-06 18:24:59,386 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:59,386 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:59,386 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:24:59,387 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:59,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:59,387 INFO L82 PathProgramCache]: Analyzing trace with hash -595465751, now seen corresponding path program 1 times [2021-01-06 18:24:59,387 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:59,387 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920032562] [2021-01-06 18:24:59,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:59,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:59,494 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:59,494 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920032562] [2021-01-06 18:24:59,494 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:59,494 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:24:59,495 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [760789045] [2021-01-06 18:24:59,495 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:24:59,495 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:59,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:24:59,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:24:59,496 INFO L87 Difference]: Start difference. First operand 138336 states and 254284 transitions. Second operand 7 states.