/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec2_product19.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:22:24,894 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:22:24,897 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:22:24,934 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:22:24,934 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:22:24,936 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:22:24,937 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:22:24,940 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:22:24,942 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:22:24,943 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:22:24,944 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:22:24,946 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:22:24,946 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:22:24,947 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:22:24,949 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:22:24,950 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:22:24,951 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:22:24,952 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:22:24,955 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:22:24,957 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:22:24,959 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:22:24,961 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:22:24,962 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:22:24,963 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:22:24,967 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:22:24,967 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:22:24,968 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:22:24,971 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:22:24,972 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:22:24,976 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:22:24,976 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:22:24,977 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:22:24,978 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:22:24,979 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:22:25,001 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:22:25,001 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:22:25,002 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:22:25,002 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:22:25,003 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:22:25,004 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:22:25,005 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:22:25,006 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:22:25,035 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:22:25,035 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:22:25,037 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:22:25,037 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:22:25,037 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:22:25,038 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:22:25,038 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:22:25,038 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:22:25,038 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:22:25,039 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:22:25,039 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:22:25,039 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:22:25,039 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:22:25,040 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:22:25,040 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:22:25,040 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:22:25,040 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:22:25,041 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:22:25,041 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:22:25,041 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:22:25,041 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:22:25,042 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:22:25,042 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:22:25,042 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:22:25,042 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:22:25,043 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:22:25,438 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:22:25,496 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:22:25,500 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:22:25,501 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:22:25,502 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:22:25,503 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec2_product19.cil.c [2021-01-06 18:22:25,606 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/9f67cf9ac/02d40be6f7a34ecd8f8898733901f81b/FLAG225221f4e [2021-01-06 18:22:26,534 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:22:26,534 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product19.cil.c [2021-01-06 18:22:26,575 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/9f67cf9ac/02d40be6f7a34ecd8f8898733901f81b/FLAG225221f4e [2021-01-06 18:22:26,665 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/9f67cf9ac/02d40be6f7a34ecd8f8898733901f81b [2021-01-06 18:22:26,669 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:22:26,672 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:22:26,677 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:22:26,677 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:22:26,682 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:22:26,684 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:22:26" (1/1) ... [2021-01-06 18:22:26,686 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a705bc7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:26, skipping insertion in model container [2021-01-06 18:22:26,687 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:22:26" (1/1) ... [2021-01-06 18:22:26,697 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:22:26,799 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] [2021-01-06 18:22:27,296 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product19.cil.c[34129,34142] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:22:27,520 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:22:27,541 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] [2021-01-06 18:22:27,627 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product19.cil.c[34129,34142] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:22:27,751 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:22:27,816 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:22:27,817 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27 WrapperNode [2021-01-06 18:22:27,817 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:22:27,819 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:22:27,819 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:22:27,819 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:22:27,827 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:27,866 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,105 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:22:28,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:22:28,107 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:22:28,107 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:22:28,117 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,118 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,145 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,145 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,237 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,307 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,330 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... [2021-01-06 18:22:28,364 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:22:28,367 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:22:28,367 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:22:28,367 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:22:28,368 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:22:28,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:22:28,467 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:22:28,467 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:22:28,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:22:34,295 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:22:34,296 INFO L299 CfgBuilder]: Removed 613 assume(true) statements. [2021-01-06 18:22:34,301 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:22:34 BoogieIcfgContainer [2021-01-06 18:22:34,301 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:22:34,303 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:22:34,303 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:22:34,307 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:22:34,307 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:22:26" (1/3) ... [2021-01-06 18:22:34,308 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@609722a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:22:34, skipping insertion in model container [2021-01-06 18:22:34,308 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:22:27" (2/3) ... [2021-01-06 18:22:34,309 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@609722a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:22:34, skipping insertion in model container [2021-01-06 18:22:34,309 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:22:34" (3/3) ... [2021-01-06 18:22:34,311 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec2_product19.cil.c [2021-01-06 18:22:34,317 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:22:34,324 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:22:34,344 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:22:34,382 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:22:34,382 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:22:34,382 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:22:34,382 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:22:34,383 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:22:34,383 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:22:34,383 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:22:34,383 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:22:34,434 INFO L276 IsEmpty]: Start isEmpty. Operand 2496 states. [2021-01-06 18:22:34,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-01-06 18:22:34,453 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:34,455 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:34,456 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:34,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:34,463 INFO L82 PathProgramCache]: Analyzing trace with hash 793828150, now seen corresponding path program 1 times [2021-01-06 18:22:34,473 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:34,474 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493787215] [2021-01-06 18:22:34,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:34,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:34,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:34,917 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493787215] [2021-01-06 18:22:34,918 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:34,918 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:34,919 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79090631] [2021-01-06 18:22:34,924 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:22:34,924 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:34,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:22:34,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:22:34,948 INFO L87 Difference]: Start difference. First operand 2496 states. Second operand 3 states. [2021-01-06 18:22:35,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:35,243 INFO L93 Difference]: Finished difference Result 4983 states and 9381 transitions. [2021-01-06 18:22:35,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:22:35,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2021-01-06 18:22:35,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:35,283 INFO L225 Difference]: With dead ends: 4983 [2021-01-06 18:22:35,284 INFO L226 Difference]: Without dead ends: 2492 [2021-01-06 18:22:35,294 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:22:35,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2492 states. [2021-01-06 18:22:35,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2492 to 2492. [2021-01-06 18:22:35,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2492 states. [2021-01-06 18:22:35,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2492 states to 2492 states and 4681 transitions. [2021-01-06 18:22:35,488 INFO L78 Accepts]: Start accepts. Automaton has 2492 states and 4681 transitions. Word has length 44 [2021-01-06 18:22:35,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:35,488 INFO L481 AbstractCegarLoop]: Abstraction has 2492 states and 4681 transitions. [2021-01-06 18:22:35,488 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:22:35,489 INFO L276 IsEmpty]: Start isEmpty. Operand 2492 states and 4681 transitions. [2021-01-06 18:22:35,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-01-06 18:22:35,492 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:35,493 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:35,493 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:22:35,494 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:35,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:35,495 INFO L82 PathProgramCache]: Analyzing trace with hash -248118129, now seen corresponding path program 1 times [2021-01-06 18:22:35,495 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:35,495 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723209220] [2021-01-06 18:22:35,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:35,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:35,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:35,624 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723209220] [2021-01-06 18:22:35,624 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:35,624 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:22:35,625 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555581303] [2021-01-06 18:22:35,627 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:22:35,628 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:35,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:22:35,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:22:35,629 INFO L87 Difference]: Start difference. First operand 2492 states and 4681 transitions. Second operand 6 states. [2021-01-06 18:22:35,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:35,890 INFO L93 Difference]: Finished difference Result 4935 states and 9278 transitions. [2021-01-06 18:22:35,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:22:35,891 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2021-01-06 18:22:35,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:35,907 INFO L225 Difference]: With dead ends: 4935 [2021-01-06 18:22:35,908 INFO L226 Difference]: Without dead ends: 2486 [2021-01-06 18:22:35,914 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:22:35,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2486 states. [2021-01-06 18:22:36,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2486 to 2486. [2021-01-06 18:22:36,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2486 states. [2021-01-06 18:22:36,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2486 states to 2486 states and 4668 transitions. [2021-01-06 18:22:36,015 INFO L78 Accepts]: Start accepts. Automaton has 2486 states and 4668 transitions. Word has length 51 [2021-01-06 18:22:36,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:36,015 INFO L481 AbstractCegarLoop]: Abstraction has 2486 states and 4668 transitions. [2021-01-06 18:22:36,015 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:36,015 INFO L276 IsEmpty]: Start isEmpty. Operand 2486 states and 4668 transitions. [2021-01-06 18:22:36,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:22:36,020 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:36,020 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:36,020 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:22:36,023 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:36,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:36,027 INFO L82 PathProgramCache]: Analyzing trace with hash -560000463, now seen corresponding path program 1 times [2021-01-06 18:22:36,027 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:36,027 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280562992] [2021-01-06 18:22:36,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:36,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:36,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:36,153 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280562992] [2021-01-06 18:22:36,153 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:36,153 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:36,154 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571411863] [2021-01-06 18:22:36,154 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:36,154 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:36,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:36,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:36,156 INFO L87 Difference]: Start difference. First operand 2486 states and 4668 transitions. Second operand 4 states. [2021-01-06 18:22:36,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:36,420 INFO L93 Difference]: Finished difference Result 4929 states and 9265 transitions. [2021-01-06 18:22:36,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:36,422 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2021-01-06 18:22:36,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:36,437 INFO L225 Difference]: With dead ends: 4929 [2021-01-06 18:22:36,438 INFO L226 Difference]: Without dead ends: 2486 [2021-01-06 18:22:36,445 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:36,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2486 states. [2021-01-06 18:22:36,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2486 to 2486. [2021-01-06 18:22:36,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2486 states. [2021-01-06 18:22:36,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2486 states to 2486 states and 4664 transitions. [2021-01-06 18:22:36,553 INFO L78 Accepts]: Start accepts. Automaton has 2486 states and 4664 transitions. Word has length 52 [2021-01-06 18:22:36,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:36,561 INFO L481 AbstractCegarLoop]: Abstraction has 2486 states and 4664 transitions. [2021-01-06 18:22:36,562 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:36,562 INFO L276 IsEmpty]: Start isEmpty. Operand 2486 states and 4664 transitions. [2021-01-06 18:22:36,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-01-06 18:22:36,567 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:36,567 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:36,567 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:22:36,568 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:36,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:36,568 INFO L82 PathProgramCache]: Analyzing trace with hash -157612660, now seen corresponding path program 1 times [2021-01-06 18:22:36,570 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:36,570 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975669635] [2021-01-06 18:22:36,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:36,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:36,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:36,708 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975669635] [2021-01-06 18:22:36,709 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:36,709 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:36,709 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561880200] [2021-01-06 18:22:36,709 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:36,710 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:36,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:36,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:36,711 INFO L87 Difference]: Start difference. First operand 2486 states and 4664 transitions. Second operand 4 states. [2021-01-06 18:22:36,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:36,906 INFO L93 Difference]: Finished difference Result 4929 states and 9261 transitions. [2021-01-06 18:22:36,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:36,907 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2021-01-06 18:22:36,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:36,924 INFO L225 Difference]: With dead ends: 4929 [2021-01-06 18:22:36,924 INFO L226 Difference]: Without dead ends: 2486 [2021-01-06 18:22:36,930 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:36,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2486 states. [2021-01-06 18:22:37,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2486 to 2486. [2021-01-06 18:22:37,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2486 states. [2021-01-06 18:22:37,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2486 states to 2486 states and 4660 transitions. [2021-01-06 18:22:37,037 INFO L78 Accepts]: Start accepts. Automaton has 2486 states and 4660 transitions. Word has length 53 [2021-01-06 18:22:37,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:37,039 INFO L481 AbstractCegarLoop]: Abstraction has 2486 states and 4660 transitions. [2021-01-06 18:22:37,039 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:37,039 INFO L276 IsEmpty]: Start isEmpty. Operand 2486 states and 4660 transitions. [2021-01-06 18:22:37,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:22:37,042 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:37,042 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:37,044 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:22:37,046 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:37,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:37,046 INFO L82 PathProgramCache]: Analyzing trace with hash 593074028, now seen corresponding path program 1 times [2021-01-06 18:22:37,047 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:37,047 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1230347424] [2021-01-06 18:22:37,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:37,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:37,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:37,172 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1230347424] [2021-01-06 18:22:37,173 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:37,173 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:37,173 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860639839] [2021-01-06 18:22:37,174 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:37,174 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:37,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:37,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:37,176 INFO L87 Difference]: Start difference. First operand 2486 states and 4660 transitions. Second operand 4 states. [2021-01-06 18:22:37,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:37,360 INFO L93 Difference]: Finished difference Result 4929 states and 9257 transitions. [2021-01-06 18:22:37,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:37,363 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2021-01-06 18:22:37,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:37,384 INFO L225 Difference]: With dead ends: 4929 [2021-01-06 18:22:37,384 INFO L226 Difference]: Without dead ends: 2486 [2021-01-06 18:22:37,389 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:37,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2486 states. [2021-01-06 18:22:37,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2486 to 2486. [2021-01-06 18:22:37,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2486 states. [2021-01-06 18:22:37,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2486 states to 2486 states and 4656 transitions. [2021-01-06 18:22:37,586 INFO L78 Accepts]: Start accepts. Automaton has 2486 states and 4656 transitions. Word has length 54 [2021-01-06 18:22:37,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:37,587 INFO L481 AbstractCegarLoop]: Abstraction has 2486 states and 4656 transitions. [2021-01-06 18:22:37,587 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:37,587 INFO L276 IsEmpty]: Start isEmpty. Operand 2486 states and 4656 transitions. [2021-01-06 18:22:37,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:22:37,591 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:37,591 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:37,591 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:22:37,592 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:37,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:37,592 INFO L82 PathProgramCache]: Analyzing trace with hash -872133908, now seen corresponding path program 1 times [2021-01-06 18:22:37,592 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:37,593 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175240239] [2021-01-06 18:22:37,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:37,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:37,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:37,711 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175240239] [2021-01-06 18:22:37,711 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:37,711 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:37,712 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640968028] [2021-01-06 18:22:37,713 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:37,713 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:37,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:37,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:37,714 INFO L87 Difference]: Start difference. First operand 2486 states and 4656 transitions. Second operand 4 states. [2021-01-06 18:22:37,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:37,843 INFO L93 Difference]: Finished difference Result 4929 states and 9253 transitions. [2021-01-06 18:22:37,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:37,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2021-01-06 18:22:37,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:37,859 INFO L225 Difference]: With dead ends: 4929 [2021-01-06 18:22:37,859 INFO L226 Difference]: Without dead ends: 2465 [2021-01-06 18:22:37,864 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:37,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2465 states. [2021-01-06 18:22:37,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2465 to 2465. [2021-01-06 18:22:37,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:37,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4622 transitions. [2021-01-06 18:22:37,969 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4622 transitions. Word has length 54 [2021-01-06 18:22:37,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:37,970 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4622 transitions. [2021-01-06 18:22:37,970 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:37,970 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4622 transitions. [2021-01-06 18:22:37,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-01-06 18:22:37,972 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:37,972 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:37,973 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:22:37,973 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:37,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:37,978 INFO L82 PathProgramCache]: Analyzing trace with hash -743875737, now seen corresponding path program 1 times [2021-01-06 18:22:37,978 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:37,978 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805643833] [2021-01-06 18:22:37,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:38,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:38,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:38,060 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805643833] [2021-01-06 18:22:38,060 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:38,060 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:38,061 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205999826] [2021-01-06 18:22:38,062 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:38,062 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:38,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:38,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:38,063 INFO L87 Difference]: Start difference. First operand 2465 states and 4622 transitions. Second operand 4 states. [2021-01-06 18:22:38,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:38,205 INFO L93 Difference]: Finished difference Result 4908 states and 9219 transitions. [2021-01-06 18:22:38,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:38,205 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2021-01-06 18:22:38,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:38,220 INFO L225 Difference]: With dead ends: 4908 [2021-01-06 18:22:38,221 INFO L226 Difference]: Without dead ends: 2465 [2021-01-06 18:22:38,227 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:38,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2465 states. [2021-01-06 18:22:38,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2465 to 2465. [2021-01-06 18:22:38,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:38,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4621 transitions. [2021-01-06 18:22:38,333 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4621 transitions. Word has length 55 [2021-01-06 18:22:38,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:38,333 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4621 transitions. [2021-01-06 18:22:38,333 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:38,334 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4621 transitions. [2021-01-06 18:22:38,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-01-06 18:22:38,336 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:38,336 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:38,336 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:22:38,336 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:38,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:38,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1921921191, now seen corresponding path program 1 times [2021-01-06 18:22:38,337 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:38,337 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486878681] [2021-01-06 18:22:38,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:38,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:38,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:38,479 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486878681] [2021-01-06 18:22:38,479 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:38,479 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:38,480 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646600090] [2021-01-06 18:22:38,480 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:38,480 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:38,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:38,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:38,481 INFO L87 Difference]: Start difference. First operand 2465 states and 4621 transitions. Second operand 4 states. [2021-01-06 18:22:38,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:38,611 INFO L93 Difference]: Finished difference Result 4908 states and 9218 transitions. [2021-01-06 18:22:38,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:38,612 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2021-01-06 18:22:38,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:38,627 INFO L225 Difference]: With dead ends: 4908 [2021-01-06 18:22:38,628 INFO L226 Difference]: Without dead ends: 2465 [2021-01-06 18:22:38,633 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:38,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2465 states. [2021-01-06 18:22:38,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2465 to 2465. [2021-01-06 18:22:38,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:38,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4620 transitions. [2021-01-06 18:22:38,770 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4620 transitions. Word has length 56 [2021-01-06 18:22:38,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:38,770 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4620 transitions. [2021-01-06 18:22:38,770 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:38,771 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4620 transitions. [2021-01-06 18:22:38,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-01-06 18:22:38,774 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:38,774 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:38,774 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:22:38,774 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:38,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:38,775 INFO L82 PathProgramCache]: Analyzing trace with hash -176153278, now seen corresponding path program 1 times [2021-01-06 18:22:38,776 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:38,776 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712494493] [2021-01-06 18:22:38,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:38,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:38,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:38,874 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712494493] [2021-01-06 18:22:38,875 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:38,875 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:22:38,875 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222206884] [2021-01-06 18:22:38,876 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:22:38,876 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:38,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:22:38,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:22:38,877 INFO L87 Difference]: Start difference. First operand 2465 states and 4620 transitions. Second operand 7 states. [2021-01-06 18:22:39,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:39,101 INFO L93 Difference]: Finished difference Result 4902 states and 9206 transitions. [2021-01-06 18:22:39,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:22:39,101 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2021-01-06 18:22:39,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:39,134 INFO L225 Difference]: With dead ends: 4902 [2021-01-06 18:22:39,134 INFO L226 Difference]: Without dead ends: 2465 [2021-01-06 18:22:39,144 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:22:39,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2465 states. [2021-01-06 18:22:39,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2465 to 2465. [2021-01-06 18:22:39,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:39,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4619 transitions. [2021-01-06 18:22:39,252 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4619 transitions. Word has length 57 [2021-01-06 18:22:39,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:39,257 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4619 transitions. [2021-01-06 18:22:39,257 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:22:39,257 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4619 transitions. [2021-01-06 18:22:39,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:22:39,260 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:39,260 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:39,260 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:22:39,260 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:39,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:39,261 INFO L82 PathProgramCache]: Analyzing trace with hash 364708626, now seen corresponding path program 1 times [2021-01-06 18:22:39,261 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:39,262 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930162476] [2021-01-06 18:22:39,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:39,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:39,384 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930162476] [2021-01-06 18:22:39,384 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:39,384 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:39,384 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568218739] [2021-01-06 18:22:39,385 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:39,385 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:39,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:39,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:39,386 INFO L87 Difference]: Start difference. First operand 2465 states and 4619 transitions. Second operand 4 states. [2021-01-06 18:22:40,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:40,765 INFO L93 Difference]: Finished difference Result 6861 states and 12918 transitions. [2021-01-06 18:22:40,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:40,766 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2021-01-06 18:22:40,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:40,780 INFO L225 Difference]: With dead ends: 6861 [2021-01-06 18:22:40,780 INFO L226 Difference]: Without dead ends: 4430 [2021-01-06 18:22:40,787 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:40,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4430 states. [2021-01-06 18:22:40,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4430 to 2465. [2021-01-06 18:22:40,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:40,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4613 transitions. [2021-01-06 18:22:40,953 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4613 transitions. Word has length 58 [2021-01-06 18:22:40,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:40,953 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4613 transitions. [2021-01-06 18:22:40,953 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:40,953 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4613 transitions. [2021-01-06 18:22:40,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:22:40,956 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:40,956 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:40,956 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:22:40,957 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:40,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:40,957 INFO L82 PathProgramCache]: Analyzing trace with hash -655602938, now seen corresponding path program 1 times [2021-01-06 18:22:40,958 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:40,958 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346107568] [2021-01-06 18:22:40,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:40,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:41,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:41,062 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346107568] [2021-01-06 18:22:41,062 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:41,062 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:41,063 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560084971] [2021-01-06 18:22:41,063 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:41,063 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:41,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:41,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:41,064 INFO L87 Difference]: Start difference. First operand 2465 states and 4613 transitions. Second operand 4 states. [2021-01-06 18:22:42,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:42,315 INFO L93 Difference]: Finished difference Result 6861 states and 12907 transitions. [2021-01-06 18:22:42,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:42,316 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2021-01-06 18:22:42,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:42,330 INFO L225 Difference]: With dead ends: 6861 [2021-01-06 18:22:42,330 INFO L226 Difference]: Without dead ends: 4430 [2021-01-06 18:22:42,336 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:42,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4430 states. [2021-01-06 18:22:42,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4430 to 2465. [2021-01-06 18:22:42,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:42,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4607 transitions. [2021-01-06 18:22:42,487 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4607 transitions. Word has length 60 [2021-01-06 18:22:42,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:42,487 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4607 transitions. [2021-01-06 18:22:42,487 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:42,487 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4607 transitions. [2021-01-06 18:22:42,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-01-06 18:22:42,496 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:42,496 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:42,496 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:22:42,497 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:42,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:42,497 INFO L82 PathProgramCache]: Analyzing trace with hash 843286856, now seen corresponding path program 1 times [2021-01-06 18:22:42,498 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:42,498 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101084448] [2021-01-06 18:22:42,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:42,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:42,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:42,589 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101084448] [2021-01-06 18:22:42,590 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:42,590 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:42,590 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447950915] [2021-01-06 18:22:42,590 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:42,591 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:42,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:42,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:42,591 INFO L87 Difference]: Start difference. First operand 2465 states and 4607 transitions. Second operand 4 states. [2021-01-06 18:22:43,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:43,772 INFO L93 Difference]: Finished difference Result 6861 states and 12896 transitions. [2021-01-06 18:22:43,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:43,772 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 62 [2021-01-06 18:22:43,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:43,786 INFO L225 Difference]: With dead ends: 6861 [2021-01-06 18:22:43,786 INFO L226 Difference]: Without dead ends: 4430 [2021-01-06 18:22:43,793 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:43,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4430 states. [2021-01-06 18:22:43,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4430 to 2465. [2021-01-06 18:22:43,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:43,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4601 transitions. [2021-01-06 18:22:43,953 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4601 transitions. Word has length 62 [2021-01-06 18:22:43,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:43,954 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4601 transitions. [2021-01-06 18:22:43,954 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:43,954 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4601 transitions. [2021-01-06 18:22:43,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-01-06 18:22:43,960 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:43,960 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:43,960 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:22:43,961 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:43,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:43,961 INFO L82 PathProgramCache]: Analyzing trace with hash 241191526, now seen corresponding path program 1 times [2021-01-06 18:22:43,962 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:43,962 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742505611] [2021-01-06 18:22:43,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:43,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:44,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:44,131 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742505611] [2021-01-06 18:22:44,131 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:44,131 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:44,131 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807437180] [2021-01-06 18:22:44,132 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:44,132 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:44,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:44,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:44,133 INFO L87 Difference]: Start difference. First operand 2465 states and 4601 transitions. Second operand 4 states. [2021-01-06 18:22:45,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:45,244 INFO L93 Difference]: Finished difference Result 6861 states and 12885 transitions. [2021-01-06 18:22:45,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:22:45,245 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2021-01-06 18:22:45,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:45,258 INFO L225 Difference]: With dead ends: 6861 [2021-01-06 18:22:45,259 INFO L226 Difference]: Without dead ends: 4430 [2021-01-06 18:22:45,265 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:45,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4430 states. [2021-01-06 18:22:45,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4430 to 2465. [2021-01-06 18:22:45,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2465 states. [2021-01-06 18:22:45,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 2465 states and 4595 transitions. [2021-01-06 18:22:45,393 INFO L78 Accepts]: Start accepts. Automaton has 2465 states and 4595 transitions. Word has length 64 [2021-01-06 18:22:45,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:45,394 INFO L481 AbstractCegarLoop]: Abstraction has 2465 states and 4595 transitions. [2021-01-06 18:22:45,394 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:45,394 INFO L276 IsEmpty]: Start isEmpty. Operand 2465 states and 4595 transitions. [2021-01-06 18:22:45,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:22:45,396 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:45,397 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:45,397 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:22:45,397 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:45,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:45,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1170985470, now seen corresponding path program 1 times [2021-01-06 18:22:45,398 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:45,398 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903558272] [2021-01-06 18:22:45,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:45,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:45,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:45,475 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903558272] [2021-01-06 18:22:45,475 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:45,475 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:45,475 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593133497] [2021-01-06 18:22:45,476 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:22:45,476 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:45,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:22:45,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:22:45,477 INFO L87 Difference]: Start difference. First operand 2465 states and 4595 transitions. Second operand 6 states. [2021-01-06 18:22:49,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:49,151 INFO L93 Difference]: Finished difference Result 26682 states and 50017 transitions. [2021-01-06 18:22:49,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-01-06 18:22:49,160 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2021-01-06 18:22:49,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:49,236 INFO L225 Difference]: With dead ends: 26682 [2021-01-06 18:22:49,236 INFO L226 Difference]: Without dead ends: 24269 [2021-01-06 18:22:49,248 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2021-01-06 18:22:49,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24269 states. [2021-01-06 18:22:49,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24269 to 4859. [2021-01-06 18:22:49,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4859 states. [2021-01-06 18:22:49,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4859 states to 4859 states and 9087 transitions. [2021-01-06 18:22:49,740 INFO L78 Accepts]: Start accepts. Automaton has 4859 states and 9087 transitions. Word has length 66 [2021-01-06 18:22:49,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:49,741 INFO L481 AbstractCegarLoop]: Abstraction has 4859 states and 9087 transitions. [2021-01-06 18:22:49,741 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:49,741 INFO L276 IsEmpty]: Start isEmpty. Operand 4859 states and 9087 transitions. [2021-01-06 18:22:49,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:22:49,745 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:49,745 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:49,745 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:22:49,745 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:49,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:49,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1712632802, now seen corresponding path program 1 times [2021-01-06 18:22:49,746 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:49,746 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867787626] [2021-01-06 18:22:49,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:49,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:49,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:49,816 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867787626] [2021-01-06 18:22:49,817 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:49,817 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:49,817 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315465515] [2021-01-06 18:22:49,817 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:49,817 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:49,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:49,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:49,818 INFO L87 Difference]: Start difference. First operand 4859 states and 9087 transitions. Second operand 5 states. [2021-01-06 18:22:52,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:52,182 INFO L93 Difference]: Finished difference Result 19504 states and 36450 transitions. [2021-01-06 18:22:52,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:22:52,183 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2021-01-06 18:22:52,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:52,224 INFO L225 Difference]: With dead ends: 19504 [2021-01-06 18:22:52,225 INFO L226 Difference]: Without dead ends: 14738 [2021-01-06 18:22:52,236 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:22:52,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14738 states. [2021-01-06 18:22:52,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14738 to 4871. [2021-01-06 18:22:52,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4871 states. [2021-01-06 18:22:52,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4871 states to 4871 states and 9099 transitions. [2021-01-06 18:22:52,561 INFO L78 Accepts]: Start accepts. Automaton has 4871 states and 9099 transitions. Word has length 68 [2021-01-06 18:22:52,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:52,561 INFO L481 AbstractCegarLoop]: Abstraction has 4871 states and 9099 transitions. [2021-01-06 18:22:52,561 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:52,561 INFO L276 IsEmpty]: Start isEmpty. Operand 4871 states and 9099 transitions. [2021-01-06 18:22:52,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:22:52,565 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:52,566 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:52,566 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:22:52,566 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:52,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:52,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1456100407, now seen corresponding path program 1 times [2021-01-06 18:22:52,567 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:52,567 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076180375] [2021-01-06 18:22:52,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:52,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:52,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:52,632 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076180375] [2021-01-06 18:22:52,632 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:52,632 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:22:52,632 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787128731] [2021-01-06 18:22:52,632 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:22:52,633 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:52,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:22:52,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:22:52,633 INFO L87 Difference]: Start difference. First operand 4871 states and 9099 transitions. Second operand 4 states. [2021-01-06 18:22:54,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:54,708 INFO L93 Difference]: Finished difference Result 17049 states and 31890 transitions. [2021-01-06 18:22:54,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:22:54,709 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2021-01-06 18:22:54,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:54,732 INFO L225 Difference]: With dead ends: 17049 [2021-01-06 18:22:54,733 INFO L226 Difference]: Without dead ends: 12232 [2021-01-06 18:22:54,744 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:54,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12232 states. [2021-01-06 18:22:55,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12232 to 6717. [2021-01-06 18:22:55,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6717 states. [2021-01-06 18:22:55,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6717 states to 6717 states and 12405 transitions. [2021-01-06 18:22:55,310 INFO L78 Accepts]: Start accepts. Automaton has 6717 states and 12405 transitions. Word has length 69 [2021-01-06 18:22:55,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:55,311 INFO L481 AbstractCegarLoop]: Abstraction has 6717 states and 12405 transitions. [2021-01-06 18:22:55,311 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:22:55,311 INFO L276 IsEmpty]: Start isEmpty. Operand 6717 states and 12405 transitions. [2021-01-06 18:22:55,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:22:55,315 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:55,315 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:55,316 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:22:55,316 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:55,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:55,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1736650596, now seen corresponding path program 1 times [2021-01-06 18:22:55,317 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:55,317 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017151996] [2021-01-06 18:22:55,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:55,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:55,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:55,400 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017151996] [2021-01-06 18:22:55,400 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:55,400 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:55,400 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310927588] [2021-01-06 18:22:55,401 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:55,401 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:55,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:55,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:55,402 INFO L87 Difference]: Start difference. First operand 6717 states and 12405 transitions. Second operand 5 states. [2021-01-06 18:22:55,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:55,697 INFO L93 Difference]: Finished difference Result 10042 states and 18556 transitions. [2021-01-06 18:22:55,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:22:55,698 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 69 [2021-01-06 18:22:55,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:55,707 INFO L225 Difference]: With dead ends: 10042 [2021-01-06 18:22:55,708 INFO L226 Difference]: Without dead ends: 3350 [2021-01-06 18:22:55,718 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:22:55,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3350 states. [2021-01-06 18:22:55,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3350 to 3350. [2021-01-06 18:22:55,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3350 states. [2021-01-06 18:22:55,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3350 states to 3350 states and 6177 transitions. [2021-01-06 18:22:55,954 INFO L78 Accepts]: Start accepts. Automaton has 3350 states and 6177 transitions. Word has length 69 [2021-01-06 18:22:55,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:55,954 INFO L481 AbstractCegarLoop]: Abstraction has 3350 states and 6177 transitions. [2021-01-06 18:22:55,954 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:55,954 INFO L276 IsEmpty]: Start isEmpty. Operand 3350 states and 6177 transitions. [2021-01-06 18:22:55,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-01-06 18:22:55,956 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:55,957 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:55,957 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:22:55,957 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:55,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:55,958 INFO L82 PathProgramCache]: Analyzing trace with hash -2075844719, now seen corresponding path program 1 times [2021-01-06 18:22:55,958 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:55,958 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929867537] [2021-01-06 18:22:55,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:55,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:56,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:56,037 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929867537] [2021-01-06 18:22:56,037 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:56,037 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:56,037 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716548478] [2021-01-06 18:22:56,038 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:56,038 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:56,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:56,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:56,039 INFO L87 Difference]: Start difference. First operand 3350 states and 6177 transitions. Second operand 5 states. [2021-01-06 18:22:57,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:57,378 INFO L93 Difference]: Finished difference Result 24203 states and 44881 transitions. [2021-01-06 18:22:57,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:22:57,379 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2021-01-06 18:22:57,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:57,417 INFO L225 Difference]: With dead ends: 24203 [2021-01-06 18:22:57,417 INFO L226 Difference]: Without dead ends: 20897 [2021-01-06 18:22:57,427 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:22:57,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20897 states. [2021-01-06 18:22:57,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20897 to 6172. [2021-01-06 18:22:57,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6172 states. [2021-01-06 18:22:57,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6172 states to 6172 states and 11435 transitions. [2021-01-06 18:22:57,854 INFO L78 Accepts]: Start accepts. Automaton has 6172 states and 11435 transitions. Word has length 71 [2021-01-06 18:22:57,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:57,854 INFO L481 AbstractCegarLoop]: Abstraction has 6172 states and 11435 transitions. [2021-01-06 18:22:57,854 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:22:57,855 INFO L276 IsEmpty]: Start isEmpty. Operand 6172 states and 11435 transitions. [2021-01-06 18:22:57,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-01-06 18:22:57,857 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:57,857 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:57,857 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:22:57,858 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:57,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:57,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1801085105, now seen corresponding path program 1 times [2021-01-06 18:22:57,858 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:57,859 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123490822] [2021-01-06 18:22:57,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:57,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:57,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:57,954 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123490822] [2021-01-06 18:22:57,954 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:57,954 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:22:57,954 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375164425] [2021-01-06 18:22:57,956 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:22:57,956 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:57,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:22:57,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:22:57,957 INFO L87 Difference]: Start difference. First operand 6172 states and 11435 transitions. Second operand 6 states. [2021-01-06 18:22:59,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:22:59,008 INFO L93 Difference]: Finished difference Result 11179 states and 20607 transitions. [2021-01-06 18:22:59,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:22:59,008 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2021-01-06 18:22:59,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:22:59,018 INFO L225 Difference]: With dead ends: 11179 [2021-01-06 18:22:59,018 INFO L226 Difference]: Without dead ends: 8521 [2021-01-06 18:22:59,022 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:22:59,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8521 states. [2021-01-06 18:22:59,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8521 to 6162. [2021-01-06 18:22:59,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6162 states. [2021-01-06 18:22:59,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6162 states to 6162 states and 11415 transitions. [2021-01-06 18:22:59,371 INFO L78 Accepts]: Start accepts. Automaton has 6162 states and 11415 transitions. Word has length 71 [2021-01-06 18:22:59,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:22:59,371 INFO L481 AbstractCegarLoop]: Abstraction has 6162 states and 11415 transitions. [2021-01-06 18:22:59,371 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:22:59,371 INFO L276 IsEmpty]: Start isEmpty. Operand 6162 states and 11415 transitions. [2021-01-06 18:22:59,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-01-06 18:22:59,374 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:22:59,374 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:22:59,374 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:22:59,374 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:22:59,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:22:59,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1768785045, now seen corresponding path program 1 times [2021-01-06 18:22:59,375 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:22:59,375 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626791098] [2021-01-06 18:22:59,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:22:59,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:22:59,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:22:59,453 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626791098] [2021-01-06 18:22:59,453 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:22:59,453 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:22:59,453 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642386717] [2021-01-06 18:22:59,454 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:22:59,454 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:22:59,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:22:59,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:22:59,455 INFO L87 Difference]: Start difference. First operand 6162 states and 11415 transitions. Second operand 5 states. [2021-01-06 18:23:00,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:00,359 INFO L93 Difference]: Finished difference Result 18842 states and 34899 transitions. [2021-01-06 18:23:00,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-01-06 18:23:00,359 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2021-01-06 18:23:00,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:00,381 INFO L225 Difference]: With dead ends: 18842 [2021-01-06 18:23:00,382 INFO L226 Difference]: Without dead ends: 16190 [2021-01-06 18:23:00,389 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:23:00,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16190 states. [2021-01-06 18:23:00,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16190 to 8553. [2021-01-06 18:23:00,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8553 states. [2021-01-06 18:23:00,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8553 states to 8553 states and 15820 transitions. [2021-01-06 18:23:00,960 INFO L78 Accepts]: Start accepts. Automaton has 8553 states and 15820 transitions. Word has length 73 [2021-01-06 18:23:00,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:00,960 INFO L481 AbstractCegarLoop]: Abstraction has 8553 states and 15820 transitions. [2021-01-06 18:23:00,960 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:00,960 INFO L276 IsEmpty]: Start isEmpty. Operand 8553 states and 15820 transitions. [2021-01-06 18:23:00,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:23:00,963 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:00,963 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:00,963 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:23:00,963 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:00,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:00,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1891753177, now seen corresponding path program 1 times [2021-01-06 18:23:00,964 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:00,964 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [468114238] [2021-01-06 18:23:00,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:00,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:01,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:01,033 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [468114238] [2021-01-06 18:23:01,033 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:01,033 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:01,033 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128860145] [2021-01-06 18:23:01,034 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:01,034 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:01,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:01,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:01,035 INFO L87 Difference]: Start difference. First operand 8553 states and 15820 transitions. Second operand 5 states. [2021-01-06 18:23:01,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:01,857 INFO L93 Difference]: Finished difference Result 17777 states and 32735 transitions. [2021-01-06 18:23:01,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:23:01,857 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 75 [2021-01-06 18:23:01,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:01,875 INFO L225 Difference]: With dead ends: 17777 [2021-01-06 18:23:01,875 INFO L226 Difference]: Without dead ends: 12951 [2021-01-06 18:23:01,882 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:23:01,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12951 states. [2021-01-06 18:23:02,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12951 to 8570. [2021-01-06 18:23:02,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8570 states. [2021-01-06 18:23:02,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8570 states to 8570 states and 15833 transitions. [2021-01-06 18:23:02,446 INFO L78 Accepts]: Start accepts. Automaton has 8570 states and 15833 transitions. Word has length 75 [2021-01-06 18:23:02,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:02,446 INFO L481 AbstractCegarLoop]: Abstraction has 8570 states and 15833 transitions. [2021-01-06 18:23:02,446 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:02,446 INFO L276 IsEmpty]: Start isEmpty. Operand 8570 states and 15833 transitions. [2021-01-06 18:23:02,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:23:02,449 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:02,450 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:02,450 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:23:02,450 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:02,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:02,450 INFO L82 PathProgramCache]: Analyzing trace with hash -383722097, now seen corresponding path program 1 times [2021-01-06 18:23:02,451 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:02,451 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889453277] [2021-01-06 18:23:02,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:02,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:02,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:02,519 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889453277] [2021-01-06 18:23:02,520 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:02,520 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:02,520 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1412111639] [2021-01-06 18:23:02,520 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:02,521 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:02,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:02,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:02,521 INFO L87 Difference]: Start difference. First operand 8570 states and 15833 transitions. Second operand 5 states. [2021-01-06 18:23:03,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:03,602 INFO L93 Difference]: Finished difference Result 19529 states and 36182 transitions. [2021-01-06 18:23:03,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:23:03,602 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2021-01-06 18:23:03,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:03,621 INFO L225 Difference]: With dead ends: 19529 [2021-01-06 18:23:03,622 INFO L226 Difference]: Without dead ends: 12496 [2021-01-06 18:23:03,630 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:23:03,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12496 states. [2021-01-06 18:23:04,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12496 to 8570. [2021-01-06 18:23:04,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8570 states. [2021-01-06 18:23:04,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8570 states to 8570 states and 15733 transitions. [2021-01-06 18:23:04,085 INFO L78 Accepts]: Start accepts. Automaton has 8570 states and 15733 transitions. Word has length 82 [2021-01-06 18:23:04,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:04,086 INFO L481 AbstractCegarLoop]: Abstraction has 8570 states and 15733 transitions. [2021-01-06 18:23:04,086 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:23:04,086 INFO L276 IsEmpty]: Start isEmpty. Operand 8570 states and 15733 transitions. [2021-01-06 18:23:04,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:23:04,088 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:04,088 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:04,088 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:23:04,088 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:04,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:04,089 INFO L82 PathProgramCache]: Analyzing trace with hash 2025320236, now seen corresponding path program 1 times [2021-01-06 18:23:04,089 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:04,089 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016504544] [2021-01-06 18:23:04,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:04,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:04,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:04,164 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016504544] [2021-01-06 18:23:04,164 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:04,164 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:23:04,164 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460465883] [2021-01-06 18:23:04,165 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:23:04,165 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:04,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:23:04,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:23:04,166 INFO L87 Difference]: Start difference. First operand 8570 states and 15733 transitions. Second operand 6 states. [2021-01-06 18:23:04,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:04,727 INFO L93 Difference]: Finished difference Result 13762 states and 25138 transitions. [2021-01-06 18:23:04,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:23:04,728 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2021-01-06 18:23:04,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:04,741 INFO L225 Difference]: With dead ends: 13762 [2021-01-06 18:23:04,742 INFO L226 Difference]: Without dead ends: 8585 [2021-01-06 18:23:04,748 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:23:04,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8585 states. [2021-01-06 18:23:05,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8585 to 8570. [2021-01-06 18:23:05,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8570 states. [2021-01-06 18:23:05,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8570 states to 8570 states and 15631 transitions. [2021-01-06 18:23:05,108 INFO L78 Accepts]: Start accepts. Automaton has 8570 states and 15631 transitions. Word has length 82 [2021-01-06 18:23:05,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:05,109 INFO L481 AbstractCegarLoop]: Abstraction has 8570 states and 15631 transitions. [2021-01-06 18:23:05,109 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:23:05,109 INFO L276 IsEmpty]: Start isEmpty. Operand 8570 states and 15631 transitions. [2021-01-06 18:23:05,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-01-06 18:23:05,111 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:05,111 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:05,111 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:23:05,112 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:05,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:05,112 INFO L82 PathProgramCache]: Analyzing trace with hash -667437268, now seen corresponding path program 1 times [2021-01-06 18:23:05,112 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:05,113 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308009842] [2021-01-06 18:23:05,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:05,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:05,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:05,252 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308009842] [2021-01-06 18:23:05,253 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:05,253 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:05,253 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577521269] [2021-01-06 18:23:05,253 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:23:05,253 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:05,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:23:05,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:05,257 INFO L87 Difference]: Start difference. First operand 8570 states and 15631 transitions. Second operand 3 states. [2021-01-06 18:23:06,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:06,067 INFO L93 Difference]: Finished difference Result 23557 states and 43027 transitions. [2021-01-06 18:23:06,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:23:06,068 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2021-01-06 18:23:06,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:06,092 INFO L225 Difference]: With dead ends: 23557 [2021-01-06 18:23:06,092 INFO L226 Difference]: Without dead ends: 16626 [2021-01-06 18:23:06,103 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:06,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16626 states. [2021-01-06 18:23:06,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16626 to 16626. [2021-01-06 18:23:06,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16626 states. [2021-01-06 18:23:06,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16626 states to 16626 states and 30410 transitions. [2021-01-06 18:23:06,945 INFO L78 Accepts]: Start accepts. Automaton has 16626 states and 30410 transitions. Word has length 83 [2021-01-06 18:23:06,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:06,945 INFO L481 AbstractCegarLoop]: Abstraction has 16626 states and 30410 transitions. [2021-01-06 18:23:06,945 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:23:06,946 INFO L276 IsEmpty]: Start isEmpty. Operand 16626 states and 30410 transitions. [2021-01-06 18:23:06,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:23:06,950 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:06,950 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:06,950 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:23:06,950 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:06,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:06,951 INFO L82 PathProgramCache]: Analyzing trace with hash -350142471, now seen corresponding path program 1 times [2021-01-06 18:23:06,951 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:06,951 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168254669] [2021-01-06 18:23:06,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:06,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:07,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:07,047 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168254669] [2021-01-06 18:23:07,047 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:07,047 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:07,047 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136358914] [2021-01-06 18:23:07,048 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:23:07,048 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:07,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:23:07,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:07,048 INFO L87 Difference]: Start difference. First operand 16626 states and 30410 transitions. Second operand 3 states. [2021-01-06 18:23:08,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:08,665 INFO L93 Difference]: Finished difference Result 46282 states and 84611 transitions. [2021-01-06 18:23:08,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:23:08,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2021-01-06 18:23:08,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:08,707 INFO L225 Difference]: With dead ends: 46282 [2021-01-06 18:23:08,707 INFO L226 Difference]: Without dead ends: 32508 [2021-01-06 18:23:08,720 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:08,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32508 states. [2021-01-06 18:23:10,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32508 to 32506. [2021-01-06 18:23:10,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32506 states. [2021-01-06 18:23:10,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32506 states to 32506 states and 59522 transitions. [2021-01-06 18:23:10,238 INFO L78 Accepts]: Start accepts. Automaton has 32506 states and 59522 transitions. Word has length 85 [2021-01-06 18:23:10,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:10,239 INFO L481 AbstractCegarLoop]: Abstraction has 32506 states and 59522 transitions. [2021-01-06 18:23:10,239 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:23:10,239 INFO L276 IsEmpty]: Start isEmpty. Operand 32506 states and 59522 transitions. [2021-01-06 18:23:10,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:23:10,244 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:10,244 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:10,245 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:23:10,245 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:10,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:10,245 INFO L82 PathProgramCache]: Analyzing trace with hash 845900624, now seen corresponding path program 1 times [2021-01-06 18:23:10,246 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:10,246 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160724696] [2021-01-06 18:23:10,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:10,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:10,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:10,315 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160724696] [2021-01-06 18:23:10,315 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:10,315 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:10,316 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884977617] [2021-01-06 18:23:10,316 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:23:10,316 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:10,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:23:10,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:10,317 INFO L87 Difference]: Start difference. First operand 32506 states and 59522 transitions. Second operand 3 states. [2021-01-06 18:23:13,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:13,388 INFO L93 Difference]: Finished difference Result 91237 states and 166830 transitions. [2021-01-06 18:23:13,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:23:13,388 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-01-06 18:23:13,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:13,491 INFO L225 Difference]: With dead ends: 91237 [2021-01-06 18:23:13,492 INFO L226 Difference]: Without dead ends: 63796 [2021-01-06 18:23:13,527 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:13,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63796 states. [2021-01-06 18:23:16,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63796 to 63792. [2021-01-06 18:23:16,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63792 states. [2021-01-06 18:23:17,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63792 states to 63792 states and 116834 transitions. [2021-01-06 18:23:17,058 INFO L78 Accepts]: Start accepts. Automaton has 63792 states and 116834 transitions. Word has length 86 [2021-01-06 18:23:17,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:17,059 INFO L481 AbstractCegarLoop]: Abstraction has 63792 states and 116834 transitions. [2021-01-06 18:23:17,059 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:23:17,059 INFO L276 IsEmpty]: Start isEmpty. Operand 63792 states and 116834 transitions. [2021-01-06 18:23:17,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-01-06 18:23:17,066 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:17,066 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:17,067 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:23:17,067 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:17,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:17,067 INFO L82 PathProgramCache]: Analyzing trace with hash 453133472, now seen corresponding path program 1 times [2021-01-06 18:23:17,068 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:17,068 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912150778] [2021-01-06 18:23:17,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:17,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:17,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:17,284 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912150778] [2021-01-06 18:23:17,284 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:17,284 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:17,284 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881460262] [2021-01-06 18:23:17,284 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:23:17,285 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:17,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:23:17,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:17,285 INFO L87 Difference]: Start difference. First operand 63792 states and 116834 transitions. Second operand 3 states. [2021-01-06 18:23:23,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:23,482 INFO L93 Difference]: Finished difference Result 180140 states and 329335 transitions. [2021-01-06 18:23:23,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:23:23,483 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2021-01-06 18:23:23,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:23,706 INFO L225 Difference]: With dead ends: 180140 [2021-01-06 18:23:23,711 INFO L226 Difference]: Without dead ends: 125412 [2021-01-06 18:23:23,808 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:23,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125412 states. [2021-01-06 18:23:30,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125412 to 125406. [2021-01-06 18:23:30,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125406 states. [2021-01-06 18:23:30,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125406 states to 125406 states and 229614 transitions. [2021-01-06 18:23:30,554 INFO L78 Accepts]: Start accepts. Automaton has 125406 states and 229614 transitions. Word has length 87 [2021-01-06 18:23:30,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:30,554 INFO L481 AbstractCegarLoop]: Abstraction has 125406 states and 229614 transitions. [2021-01-06 18:23:30,554 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:23:30,554 INFO L276 IsEmpty]: Start isEmpty. Operand 125406 states and 229614 transitions. [2021-01-06 18:23:30,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:23:30,561 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:30,561 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:30,561 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:23:30,561 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:30,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:30,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1162253657, now seen corresponding path program 1 times [2021-01-06 18:23:30,562 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:30,562 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291945649] [2021-01-06 18:23:30,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:30,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:30,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:30,646 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291945649] [2021-01-06 18:23:30,646 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:30,646 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:23:30,646 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898436324] [2021-01-06 18:23:30,647 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:23:30,647 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:30,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:23:30,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:30,648 INFO L87 Difference]: Start difference. First operand 125406 states and 229614 transitions. Second operand 3 states. [2021-01-06 18:23:42,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:23:42,370 INFO L93 Difference]: Finished difference Result 355915 states and 650443 transitions. [2021-01-06 18:23:42,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:23:42,371 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2021-01-06 18:23:42,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:23:43,114 INFO L225 Difference]: With dead ends: 355915 [2021-01-06 18:23:43,115 INFO L226 Difference]: Without dead ends: 246711 [2021-01-06 18:23:43,210 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:23:43,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246711 states. [2021-01-06 18:23:55,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246711 to 246703. [2021-01-06 18:23:55,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246703 states. [2021-01-06 18:23:56,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246703 states to 246703 states and 451439 transitions. [2021-01-06 18:23:56,169 INFO L78 Accepts]: Start accepts. Automaton has 246703 states and 451439 transitions. Word has length 88 [2021-01-06 18:23:56,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:23:56,169 INFO L481 AbstractCegarLoop]: Abstraction has 246703 states and 451439 transitions. [2021-01-06 18:23:56,169 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:23:56,169 INFO L276 IsEmpty]: Start isEmpty. Operand 246703 states and 451439 transitions. [2021-01-06 18:23:56,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-01-06 18:23:56,188 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:23:56,188 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:23:56,189 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:23:56,189 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:23:56,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:23:56,189 INFO L82 PathProgramCache]: Analyzing trace with hash -319384466, now seen corresponding path program 1 times [2021-01-06 18:23:56,189 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:23:56,190 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66870446] [2021-01-06 18:23:56,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:23:56,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:23:56,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:23:56,288 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66870446] [2021-01-06 18:23:56,288 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:23:56,288 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:23:56,289 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283548210] [2021-01-06 18:23:56,289 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:23:56,289 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:23:56,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:23:56,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:23:56,290 INFO L87 Difference]: Start difference. First operand 246703 states and 451439 transitions. Second operand 5 states. [2021-01-06 18:24:13,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:13,979 INFO L93 Difference]: Finished difference Result 551862 states and 995296 transitions. [2021-01-06 18:24:13,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:24:13,980 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 110 [2021-01-06 18:24:13,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:14,694 INFO L225 Difference]: With dead ends: 551862 [2021-01-06 18:24:14,694 INFO L226 Difference]: Without dead ends: 305388 [2021-01-06 18:24:14,884 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:24:15,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305388 states. [2021-01-06 18:24:28,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305388 to 247282. [2021-01-06 18:24:28,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247282 states. [2021-01-06 18:24:29,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247282 states to 247282 states and 452018 transitions. [2021-01-06 18:24:29,620 INFO L78 Accepts]: Start accepts. Automaton has 247282 states and 452018 transitions. Word has length 110 [2021-01-06 18:24:29,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:24:29,620 INFO L481 AbstractCegarLoop]: Abstraction has 247282 states and 452018 transitions. [2021-01-06 18:24:29,620 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:24:29,620 INFO L276 IsEmpty]: Start isEmpty. Operand 247282 states and 452018 transitions. [2021-01-06 18:24:29,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2021-01-06 18:24:29,647 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:24:29,647 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:24:29,648 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:24:29,648 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:24:29,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:24:29,648 INFO L82 PathProgramCache]: Analyzing trace with hash 875192135, now seen corresponding path program 1 times [2021-01-06 18:24:29,648 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:24:29,649 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706305934] [2021-01-06 18:24:29,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:24:29,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:24:29,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:24:29,743 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706305934] [2021-01-06 18:24:29,746 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:24:29,746 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:24:29,746 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055415377] [2021-01-06 18:24:29,746 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:24:29,747 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:24:29,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:24:29,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:24:29,747 INFO L87 Difference]: Start difference. First operand 247282 states and 452018 transitions. Second operand 4 states. [2021-01-06 18:24:47,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:24:47,391 INFO L93 Difference]: Finished difference Result 552625 states and 1006166 transitions. [2021-01-06 18:24:47,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:24:47,392 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2021-01-06 18:24:47,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:24:48,321 INFO L225 Difference]: With dead ends: 552625 [2021-01-06 18:24:48,321 INFO L226 Difference]: Without dead ends: 305381 [2021-01-06 18:24:48,518 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:24:48,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305381 states. [2021-01-06 18:25:01,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305381 to 152610. [2021-01-06 18:25:01,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152610 states. [2021-01-06 18:25:02,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152610 states to 152610 states and 277152 transitions. [2021-01-06 18:25:02,049 INFO L78 Accepts]: Start accepts. Automaton has 152610 states and 277152 transitions. Word has length 111 [2021-01-06 18:25:02,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:02,050 INFO L481 AbstractCegarLoop]: Abstraction has 152610 states and 277152 transitions. [2021-01-06 18:25:02,050 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:02,050 INFO L276 IsEmpty]: Start isEmpty. Operand 152610 states and 277152 transitions. [2021-01-06 18:25:02,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2021-01-06 18:25:02,090 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:02,090 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:02,091 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:25:02,091 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:02,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:02,091 INFO L82 PathProgramCache]: Analyzing trace with hash 1626617067, now seen corresponding path program 1 times [2021-01-06 18:25:02,092 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:02,092 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182148992] [2021-01-06 18:25:02,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:02,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:02,213 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:02,214 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182148992] [2021-01-06 18:25:02,214 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:02,214 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:02,214 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700141803] [2021-01-06 18:25:02,215 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:25:02,215 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:02,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:25:02,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:02,216 INFO L87 Difference]: Start difference. First operand 152610 states and 277152 transitions. Second operand 5 states. [2021-01-06 18:25:19,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:19,502 INFO L93 Difference]: Finished difference Result 440579 states and 802949 transitions. [2021-01-06 18:25:19,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:25:19,503 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 173 [2021-01-06 18:25:19,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:20,149 INFO L225 Difference]: With dead ends: 440579 [2021-01-06 18:25:20,149 INFO L226 Difference]: Without dead ends: 288192 [2021-01-06 18:25:20,311 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:25:20,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288192 states. [2021-01-06 18:25:30,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288192 to 152610. [2021-01-06 18:25:30,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152610 states. [2021-01-06 18:25:31,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152610 states to 152610 states and 277024 transitions. [2021-01-06 18:25:31,392 INFO L78 Accepts]: Start accepts. Automaton has 152610 states and 277024 transitions. Word has length 173 [2021-01-06 18:25:31,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:31,392 INFO L481 AbstractCegarLoop]: Abstraction has 152610 states and 277024 transitions. [2021-01-06 18:25:31,392 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:25:31,392 INFO L276 IsEmpty]: Start isEmpty. Operand 152610 states and 277024 transitions. [2021-01-06 18:25:31,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2021-01-06 18:25:31,453 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:31,453 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:31,454 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:25:31,454 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:31,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:31,454 INFO L82 PathProgramCache]: Analyzing trace with hash -1060761497, now seen corresponding path program 1 times [2021-01-06 18:25:31,455 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:31,455 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046947396] [2021-01-06 18:25:31,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:31,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:31,610 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:31,611 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046947396] [2021-01-06 18:25:31,611 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:31,611 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:31,611 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439132481] [2021-01-06 18:25:31,612 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:25:31,612 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:31,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:25:31,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:31,613 INFO L87 Difference]: Start difference. First operand 152610 states and 277024 transitions. Second operand 5 states. [2021-01-06 18:25:49,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:49,156 INFO L93 Difference]: Finished difference Result 439912 states and 801688 transitions. [2021-01-06 18:25:49,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:25:49,157 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 178 [2021-01-06 18:25:49,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:49,798 INFO L225 Difference]: With dead ends: 439912 [2021-01-06 18:25:49,798 INFO L226 Difference]: Without dead ends: 287525 [2021-01-06 18:25:49,962 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:50,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287525 states.