/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec2_product32.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:25:05,405 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:25:05,408 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:25:05,444 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:25:05,445 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:25:05,446 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:25:05,448 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:25:05,450 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:25:05,453 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:25:05,454 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:25:05,456 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:25:05,457 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:25:05,458 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:25:05,461 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:25:05,465 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:25:05,478 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:25:05,481 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:25:05,482 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:25:05,516 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:25:05,519 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:25:05,521 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:25:05,522 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:25:05,524 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:25:05,525 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:25:05,528 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:25:05,529 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:25:05,529 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:25:05,530 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:25:05,531 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:25:05,532 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:25:05,532 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:25:05,533 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:25:05,534 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:25:05,535 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:25:05,536 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:25:05,537 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:25:05,537 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:25:05,538 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:25:05,538 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:25:05,540 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:25:05,541 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:25:05,542 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:25:05,573 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:25:05,573 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:25:05,575 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:25:05,575 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:25:05,576 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:25:05,576 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:25:05,576 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:25:05,576 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:25:05,577 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:25:05,577 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:25:05,577 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:25:05,578 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:25:05,578 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:25:05,578 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:25:05,579 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:25:05,579 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:25:05,579 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:25:05,579 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:25:05,580 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:25:05,580 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:25:05,580 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:25:05,580 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:25:05,581 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:25:05,581 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:25:05,581 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:25:05,581 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:25:05,967 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:25:06,004 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:25:06,009 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:25:06,011 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:25:06,012 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:25:06,014 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec2_product32.cil.c [2021-01-06 18:25:06,103 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/7002df1f9/d52df0b711184962b7b41a2eaaab24ce/FLAG785a6917c [2021-01-06 18:25:07,113 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:25:07,114 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product32.cil.c [2021-01-06 18:25:07,150 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/7002df1f9/d52df0b711184962b7b41a2eaaab24ce/FLAG785a6917c [2021-01-06 18:25:07,205 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/7002df1f9/d52df0b711184962b7b41a2eaaab24ce [2021-01-06 18:25:07,208 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:25:07,212 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:25:07,216 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:25:07,216 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:25:07,221 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:25:07,223 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:25:07" (1/1) ... [2021-01-06 18:25:07,225 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1bb707bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:07, skipping insertion in model container [2021-01-06 18:25:07,225 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:25:07" (1/1) ... [2021-01-06 18:25:07,239 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:25:07,338 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] [2021-01-06 18:25:07,907 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product32.cil.c[39755,39768] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~29,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~30,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~31,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:25:08,098 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:25:08,110 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_spc2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] [2021-01-06 18:25:08,188 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec2_product32.cil.c[39755,39768] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~29,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~30,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~31,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:25:08,246 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:25:08,330 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:25:08,331 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08 WrapperNode [2021-01-06 18:25:08,331 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:25:08,332 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:25:08,333 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:25:08,333 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:25:08,341 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:08,407 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:08,975 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:25:08,979 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:25:08,979 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:25:08,979 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:25:08,990 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:08,990 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,175 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,175 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,515 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,762 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,803 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... [2021-01-06 18:25:09,883 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:25:09,884 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:25:09,884 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:25:09,885 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:25:09,886 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:25:09,988 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:25:09,988 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:25:09,989 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:25:09,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:25:21,996 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:25:21,997 INFO L299 CfgBuilder]: Removed 1709 assume(true) statements. [2021-01-06 18:25:22,009 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:25:22 BoogieIcfgContainer [2021-01-06 18:25:22,010 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:25:22,014 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:25:22,015 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:25:22,019 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:25:22,020 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:25:07" (1/3) ... [2021-01-06 18:25:22,021 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c9ba4f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:25:22, skipping insertion in model container [2021-01-06 18:25:22,021 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:25:08" (2/3) ... [2021-01-06 18:25:22,021 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c9ba4f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:25:22, skipping insertion in model container [2021-01-06 18:25:22,022 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:25:22" (3/3) ... [2021-01-06 18:25:22,024 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec2_product32.cil.c [2021-01-06 18:25:22,031 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:25:22,043 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:25:22,062 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:25:22,134 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:25:22,134 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:25:22,134 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:25:22,134 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:25:22,134 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:25:22,135 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:25:22,135 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:25:22,135 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:25:22,257 INFO L276 IsEmpty]: Start isEmpty. Operand 7188 states. [2021-01-06 18:25:22,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2021-01-06 18:25:22,268 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:22,269 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:22,269 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:22,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:22,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1414304943, now seen corresponding path program 1 times [2021-01-06 18:25:22,286 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:22,286 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283155755] [2021-01-06 18:25:22,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:22,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:22,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:22,771 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283155755] [2021-01-06 18:25:22,771 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:22,772 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:25:22,773 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687641605] [2021-01-06 18:25:22,777 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:25:22,778 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:22,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:25:22,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:25:22,800 INFO L87 Difference]: Start difference. First operand 7188 states. Second operand 3 states. [2021-01-06 18:25:23,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:23,268 INFO L93 Difference]: Finished difference Result 14367 states and 27097 transitions. [2021-01-06 18:25:23,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:25:23,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2021-01-06 18:25:23,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:23,356 INFO L225 Difference]: With dead ends: 14367 [2021-01-06 18:25:23,356 INFO L226 Difference]: Without dead ends: 7184 [2021-01-06 18:25:23,383 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:25:23,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7184 states. [2021-01-06 18:25:23,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7184 to 7184. [2021-01-06 18:25:23,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7184 states. [2021-01-06 18:25:23,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7184 states to 7184 states and 13539 transitions. [2021-01-06 18:25:23,881 INFO L78 Accepts]: Start accepts. Automaton has 7184 states and 13539 transitions. Word has length 27 [2021-01-06 18:25:23,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:23,882 INFO L481 AbstractCegarLoop]: Abstraction has 7184 states and 13539 transitions. [2021-01-06 18:25:23,882 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:25:23,882 INFO L276 IsEmpty]: Start isEmpty. Operand 7184 states and 13539 transitions. [2021-01-06 18:25:23,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-01-06 18:25:23,885 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:23,886 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:23,886 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:25:23,886 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:23,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:23,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1675267835, now seen corresponding path program 1 times [2021-01-06 18:25:23,889 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:23,889 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180066024] [2021-01-06 18:25:23,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:23,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:24,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:24,109 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180066024] [2021-01-06 18:25:24,110 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:24,110 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:25:24,111 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607992155] [2021-01-06 18:25:24,112 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:25:24,113 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:24,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:25:24,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:25:24,114 INFO L87 Difference]: Start difference. First operand 7184 states and 13539 transitions. Second operand 6 states. [2021-01-06 18:25:24,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:24,717 INFO L93 Difference]: Finished difference Result 14319 states and 26994 transitions. [2021-01-06 18:25:24,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:25:24,718 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2021-01-06 18:25:24,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:24,763 INFO L225 Difference]: With dead ends: 14319 [2021-01-06 18:25:24,764 INFO L226 Difference]: Without dead ends: 7178 [2021-01-06 18:25:24,778 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:25:24,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7178 states. [2021-01-06 18:25:25,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7178 to 7178. [2021-01-06 18:25:25,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2021-01-06 18:25:25,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 13526 transitions. [2021-01-06 18:25:25,072 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 13526 transitions. Word has length 34 [2021-01-06 18:25:25,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:25,073 INFO L481 AbstractCegarLoop]: Abstraction has 7178 states and 13526 transitions. [2021-01-06 18:25:25,073 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:25:25,073 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 13526 transitions. [2021-01-06 18:25:25,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2021-01-06 18:25:25,079 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:25,079 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:25,079 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:25:25,082 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:25,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:25,084 INFO L82 PathProgramCache]: Analyzing trace with hash -634445021, now seen corresponding path program 1 times [2021-01-06 18:25:25,085 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:25,085 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402258408] [2021-01-06 18:25:25,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:25,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:25,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:25,204 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402258408] [2021-01-06 18:25:25,204 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:25,205 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:25,205 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411273498] [2021-01-06 18:25:25,206 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:25,206 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:25,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:25,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:25,207 INFO L87 Difference]: Start difference. First operand 7178 states and 13526 transitions. Second operand 4 states. [2021-01-06 18:25:25,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:25,680 INFO L93 Difference]: Finished difference Result 14313 states and 26981 transitions. [2021-01-06 18:25:25,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:25,681 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2021-01-06 18:25:25,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:25,749 INFO L225 Difference]: With dead ends: 14313 [2021-01-06 18:25:25,749 INFO L226 Difference]: Without dead ends: 7178 [2021-01-06 18:25:25,761 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:25,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7178 states. [2021-01-06 18:25:26,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7178 to 7178. [2021-01-06 18:25:26,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2021-01-06 18:25:26,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 13522 transitions. [2021-01-06 18:25:26,077 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 13522 transitions. Word has length 35 [2021-01-06 18:25:26,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:26,085 INFO L481 AbstractCegarLoop]: Abstraction has 7178 states and 13522 transitions. [2021-01-06 18:25:26,085 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:26,086 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 13522 transitions. [2021-01-06 18:25:26,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-01-06 18:25:26,091 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:26,091 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:26,091 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:25:26,091 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:26,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:26,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1252064664, now seen corresponding path program 1 times [2021-01-06 18:25:26,093 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:26,094 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265255739] [2021-01-06 18:25:26,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:26,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:26,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:26,196 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265255739] [2021-01-06 18:25:26,197 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:26,197 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:26,197 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92989401] [2021-01-06 18:25:26,198 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:26,198 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:26,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:26,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:26,200 INFO L87 Difference]: Start difference. First operand 7178 states and 13522 transitions. Second operand 4 states. [2021-01-06 18:25:26,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:26,772 INFO L93 Difference]: Finished difference Result 14313 states and 26977 transitions. [2021-01-06 18:25:26,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:26,773 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-01-06 18:25:26,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:26,796 INFO L225 Difference]: With dead ends: 14313 [2021-01-06 18:25:26,796 INFO L226 Difference]: Without dead ends: 7178 [2021-01-06 18:25:26,810 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:26,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7178 states. [2021-01-06 18:25:27,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7178 to 7178. [2021-01-06 18:25:27,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2021-01-06 18:25:27,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 13518 transitions. [2021-01-06 18:25:27,067 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 13518 transitions. Word has length 36 [2021-01-06 18:25:27,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:27,068 INFO L481 AbstractCegarLoop]: Abstraction has 7178 states and 13518 transitions. [2021-01-06 18:25:27,068 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:27,068 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 13518 transitions. [2021-01-06 18:25:27,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2021-01-06 18:25:27,069 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:27,069 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:27,071 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:25:27,072 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:27,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:27,073 INFO L82 PathProgramCache]: Analyzing trace with hash 1149170824, now seen corresponding path program 1 times [2021-01-06 18:25:27,073 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:27,073 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845665384] [2021-01-06 18:25:27,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:27,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:27,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:27,155 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845665384] [2021-01-06 18:25:27,155 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:27,155 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:27,156 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224528267] [2021-01-06 18:25:27,156 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:27,156 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:27,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:27,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:27,158 INFO L87 Difference]: Start difference. First operand 7178 states and 13518 transitions. Second operand 4 states. [2021-01-06 18:25:27,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:27,531 INFO L93 Difference]: Finished difference Result 14313 states and 26973 transitions. [2021-01-06 18:25:27,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:27,531 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2021-01-06 18:25:27,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:27,555 INFO L225 Difference]: With dead ends: 14313 [2021-01-06 18:25:27,555 INFO L226 Difference]: Without dead ends: 7178 [2021-01-06 18:25:27,569 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:27,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7178 states. [2021-01-06 18:25:27,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7178 to 7178. [2021-01-06 18:25:27,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2021-01-06 18:25:27,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 13514 transitions. [2021-01-06 18:25:27,829 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 13514 transitions. Word has length 37 [2021-01-06 18:25:27,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:27,829 INFO L481 AbstractCegarLoop]: Abstraction has 7178 states and 13514 transitions. [2021-01-06 18:25:27,829 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:27,829 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 13514 transitions. [2021-01-06 18:25:27,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2021-01-06 18:25:27,830 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:27,830 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:27,830 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:25:27,831 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:27,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:27,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1942433528, now seen corresponding path program 1 times [2021-01-06 18:25:27,831 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:27,832 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138109000] [2021-01-06 18:25:27,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:27,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:27,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:27,911 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138109000] [2021-01-06 18:25:27,911 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:27,911 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:27,911 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [342846666] [2021-01-06 18:25:27,912 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:27,912 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:27,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:27,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:27,913 INFO L87 Difference]: Start difference. First operand 7178 states and 13514 transitions. Second operand 4 states. [2021-01-06 18:25:28,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:28,240 INFO L93 Difference]: Finished difference Result 14313 states and 26969 transitions. [2021-01-06 18:25:28,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:28,240 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2021-01-06 18:25:28,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:28,263 INFO L225 Difference]: With dead ends: 14313 [2021-01-06 18:25:28,264 INFO L226 Difference]: Without dead ends: 7157 [2021-01-06 18:25:28,276 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:28,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7157 states. [2021-01-06 18:25:28,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7157 to 7157. [2021-01-06 18:25:28,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7157 states. [2021-01-06 18:25:28,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7157 states to 7157 states and 13480 transitions. [2021-01-06 18:25:28,562 INFO L78 Accepts]: Start accepts. Automaton has 7157 states and 13480 transitions. Word has length 37 [2021-01-06 18:25:28,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:28,562 INFO L481 AbstractCegarLoop]: Abstraction has 7157 states and 13480 transitions. [2021-01-06 18:25:28,562 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:28,563 INFO L276 IsEmpty]: Start isEmpty. Operand 7157 states and 13480 transitions. [2021-01-06 18:25:28,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2021-01-06 18:25:28,564 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:28,564 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:28,564 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:25:28,564 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:28,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:28,570 INFO L82 PathProgramCache]: Analyzing trace with hash -1649332435, now seen corresponding path program 1 times [2021-01-06 18:25:28,570 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:28,571 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660308107] [2021-01-06 18:25:28,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:28,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:28,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:28,684 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660308107] [2021-01-06 18:25:28,685 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:28,685 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:28,686 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698621711] [2021-01-06 18:25:28,686 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:28,686 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:28,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:28,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:28,687 INFO L87 Difference]: Start difference. First operand 7157 states and 13480 transitions. Second operand 4 states. [2021-01-06 18:25:29,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:29,135 INFO L93 Difference]: Finished difference Result 14292 states and 26935 transitions. [2021-01-06 18:25:29,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:29,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2021-01-06 18:25:29,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:29,160 INFO L225 Difference]: With dead ends: 14292 [2021-01-06 18:25:29,161 INFO L226 Difference]: Without dead ends: 7157 [2021-01-06 18:25:29,174 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:29,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7157 states. [2021-01-06 18:25:29,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7157 to 7157. [2021-01-06 18:25:29,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7157 states. [2021-01-06 18:25:29,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7157 states to 7157 states and 13479 transitions. [2021-01-06 18:25:29,433 INFO L78 Accepts]: Start accepts. Automaton has 7157 states and 13479 transitions. Word has length 38 [2021-01-06 18:25:29,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:29,434 INFO L481 AbstractCegarLoop]: Abstraction has 7157 states and 13479 transitions. [2021-01-06 18:25:29,434 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:29,434 INFO L276 IsEmpty]: Start isEmpty. Operand 7157 states and 13479 transitions. [2021-01-06 18:25:29,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2021-01-06 18:25:29,436 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:29,437 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:29,437 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:25:29,437 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:29,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:29,438 INFO L82 PathProgramCache]: Analyzing trace with hash 1863987693, now seen corresponding path program 1 times [2021-01-06 18:25:29,438 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:29,438 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490486197] [2021-01-06 18:25:29,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:29,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:29,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:29,533 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490486197] [2021-01-06 18:25:29,533 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:29,533 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:25:29,533 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631873633] [2021-01-06 18:25:29,535 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:29,535 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:29,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:29,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:29,536 INFO L87 Difference]: Start difference. First operand 7157 states and 13479 transitions. Second operand 4 states. [2021-01-06 18:25:29,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:29,887 INFO L93 Difference]: Finished difference Result 14292 states and 26934 transitions. [2021-01-06 18:25:29,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:29,887 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2021-01-06 18:25:29,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:29,912 INFO L225 Difference]: With dead ends: 14292 [2021-01-06 18:25:29,912 INFO L226 Difference]: Without dead ends: 7157 [2021-01-06 18:25:29,923 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:25:29,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7157 states. [2021-01-06 18:25:30,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7157 to 7157. [2021-01-06 18:25:30,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7157 states. [2021-01-06 18:25:30,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7157 states to 7157 states and 13478 transitions. [2021-01-06 18:25:30,165 INFO L78 Accepts]: Start accepts. Automaton has 7157 states and 13478 transitions. Word has length 39 [2021-01-06 18:25:30,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:30,166 INFO L481 AbstractCegarLoop]: Abstraction has 7157 states and 13478 transitions. [2021-01-06 18:25:30,166 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:30,166 INFO L276 IsEmpty]: Start isEmpty. Operand 7157 states and 13478 transitions. [2021-01-06 18:25:30,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2021-01-06 18:25:30,167 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:30,167 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:30,167 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:25:30,168 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:30,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:30,168 INFO L82 PathProgramCache]: Analyzing trace with hash -819630094, now seen corresponding path program 1 times [2021-01-06 18:25:30,169 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:30,169 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937962604] [2021-01-06 18:25:30,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:30,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:30,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:30,255 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937962604] [2021-01-06 18:25:30,256 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:30,256 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:25:30,257 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745675461] [2021-01-06 18:25:30,257 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:25:30,258 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:30,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:25:30,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:25:30,259 INFO L87 Difference]: Start difference. First operand 7157 states and 13478 transitions. Second operand 7 states. [2021-01-06 18:25:30,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:30,788 INFO L93 Difference]: Finished difference Result 14286 states and 26922 transitions. [2021-01-06 18:25:30,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:25:30,788 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2021-01-06 18:25:30,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:30,812 INFO L225 Difference]: With dead ends: 14286 [2021-01-06 18:25:30,813 INFO L226 Difference]: Without dead ends: 7157 [2021-01-06 18:25:30,826 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:25:30,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7157 states. [2021-01-06 18:25:31,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7157 to 7157. [2021-01-06 18:25:31,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7157 states. [2021-01-06 18:25:31,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7157 states to 7157 states and 13477 transitions. [2021-01-06 18:25:31,157 INFO L78 Accepts]: Start accepts. Automaton has 7157 states and 13477 transitions. Word has length 40 [2021-01-06 18:25:31,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:31,158 INFO L481 AbstractCegarLoop]: Abstraction has 7157 states and 13477 transitions. [2021-01-06 18:25:31,158 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:25:31,158 INFO L276 IsEmpty]: Start isEmpty. Operand 7157 states and 13477 transitions. [2021-01-06 18:25:31,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2021-01-06 18:25:31,159 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:31,160 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:31,160 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:25:31,160 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:31,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:31,161 INFO L82 PathProgramCache]: Analyzing trace with hash 1861414946, now seen corresponding path program 1 times [2021-01-06 18:25:31,161 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:31,161 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54929280] [2021-01-06 18:25:31,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:31,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:31,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:31,263 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54929280] [2021-01-06 18:25:31,263 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:31,264 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:25:31,264 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1691386199] [2021-01-06 18:25:31,264 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:25:31,264 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:31,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:25:31,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:25:31,265 INFO L87 Difference]: Start difference. First operand 7157 states and 13477 transitions. Second operand 3 states. [2021-01-06 18:25:32,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:32,069 INFO L93 Difference]: Finished difference Result 15897 states and 29983 transitions. [2021-01-06 18:25:32,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:25:32,069 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2021-01-06 18:25:32,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:32,105 INFO L225 Difference]: With dead ends: 15897 [2021-01-06 18:25:32,106 INFO L226 Difference]: Without dead ends: 12278 [2021-01-06 18:25:32,114 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:25:32,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12278 states. [2021-01-06 18:25:32,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12278 to 10179. [2021-01-06 18:25:32,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10179 states. [2021-01-06 18:25:32,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10179 states to 10179 states and 19177 transitions. [2021-01-06 18:25:32,510 INFO L78 Accepts]: Start accepts. Automaton has 10179 states and 19177 transitions. Word has length 41 [2021-01-06 18:25:32,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:32,511 INFO L481 AbstractCegarLoop]: Abstraction has 10179 states and 19177 transitions. [2021-01-06 18:25:32,511 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:25:32,511 INFO L276 IsEmpty]: Start isEmpty. Operand 10179 states and 19177 transitions. [2021-01-06 18:25:32,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:25:32,516 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:32,517 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:32,517 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:25:32,517 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:32,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:32,518 INFO L82 PathProgramCache]: Analyzing trace with hash 1944405844, now seen corresponding path program 1 times [2021-01-06 18:25:32,518 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:32,518 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482684955] [2021-01-06 18:25:32,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:32,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:32,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:32,597 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482684955] [2021-01-06 18:25:32,597 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:32,597 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:25:32,597 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288512926] [2021-01-06 18:25:32,598 INFO L461 AbstractCegarLoop]: Interpolant automaton has 8 states [2021-01-06 18:25:32,598 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:32,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-01-06 18:25:32,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:25:32,599 INFO L87 Difference]: Start difference. First operand 10179 states and 19177 transitions. Second operand 8 states. [2021-01-06 18:25:33,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:33,944 INFO L93 Difference]: Finished difference Result 22365 states and 41911 transitions. [2021-01-06 18:25:33,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-01-06 18:25:33,945 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 60 [2021-01-06 18:25:33,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:33,984 INFO L225 Difference]: With dead ends: 22365 [2021-01-06 18:25:33,985 INFO L226 Difference]: Without dead ends: 13452 [2021-01-06 18:25:33,999 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2021-01-06 18:25:34,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13452 states. [2021-01-06 18:25:34,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13452 to 8430. [2021-01-06 18:25:34,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8430 states. [2021-01-06 18:25:34,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8430 states to 8430 states and 15809 transitions. [2021-01-06 18:25:34,439 INFO L78 Accepts]: Start accepts. Automaton has 8430 states and 15809 transitions. Word has length 60 [2021-01-06 18:25:34,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:34,439 INFO L481 AbstractCegarLoop]: Abstraction has 8430 states and 15809 transitions. [2021-01-06 18:25:34,439 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2021-01-06 18:25:34,439 INFO L276 IsEmpty]: Start isEmpty. Operand 8430 states and 15809 transitions. [2021-01-06 18:25:34,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:25:34,442 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:34,442 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:34,443 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:25:34,443 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:34,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:34,443 INFO L82 PathProgramCache]: Analyzing trace with hash 806098474, now seen corresponding path program 1 times [2021-01-06 18:25:34,444 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:34,444 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531092155] [2021-01-06 18:25:34,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:34,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:34,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:34,521 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531092155] [2021-01-06 18:25:34,522 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:34,522 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:25:34,522 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119628707] [2021-01-06 18:25:34,522 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:25:34,523 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:34,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:25:34,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:25:34,523 INFO L87 Difference]: Start difference. First operand 8430 states and 15809 transitions. Second operand 6 states. [2021-01-06 18:25:42,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:42,764 INFO L93 Difference]: Finished difference Result 57552 states and 107562 transitions. [2021-01-06 18:25:42,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:25:42,764 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 61 [2021-01-06 18:25:42,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:42,935 INFO L225 Difference]: With dead ends: 57552 [2021-01-06 18:25:42,935 INFO L226 Difference]: Without dead ends: 49186 [2021-01-06 18:25:42,961 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:25:43,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49186 states. [2021-01-06 18:25:43,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49186 to 8451. [2021-01-06 18:25:43,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8451 states. [2021-01-06 18:25:43,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8451 states to 8451 states and 15830 transitions. [2021-01-06 18:25:43,955 INFO L78 Accepts]: Start accepts. Automaton has 8451 states and 15830 transitions. Word has length 61 [2021-01-06 18:25:43,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:43,955 INFO L481 AbstractCegarLoop]: Abstraction has 8451 states and 15830 transitions. [2021-01-06 18:25:43,955 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:25:43,955 INFO L276 IsEmpty]: Start isEmpty. Operand 8451 states and 15830 transitions. [2021-01-06 18:25:43,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-01-06 18:25:43,959 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:43,959 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:43,959 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:25:43,959 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:43,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:43,960 INFO L82 PathProgramCache]: Analyzing trace with hash -749209650, now seen corresponding path program 1 times [2021-01-06 18:25:43,960 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:43,960 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403842082] [2021-01-06 18:25:43,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:43,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:44,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:44,054 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403842082] [2021-01-06 18:25:44,054 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:44,054 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:25:44,055 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1997507108] [2021-01-06 18:25:44,055 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:44,055 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:44,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:44,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:44,056 INFO L87 Difference]: Start difference. First operand 8451 states and 15830 transitions. Second operand 4 states. [2021-01-06 18:25:47,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:47,927 INFO L93 Difference]: Finished difference Result 22148 states and 41661 transitions. [2021-01-06 18:25:47,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:47,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 62 [2021-01-06 18:25:47,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:47,957 INFO L225 Difference]: With dead ends: 22148 [2021-01-06 18:25:47,958 INFO L226 Difference]: Without dead ends: 13763 [2021-01-06 18:25:47,971 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:47,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13763 states. [2021-01-06 18:25:48,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13763 to 8451. [2021-01-06 18:25:48,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8451 states. [2021-01-06 18:25:48,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8451 states to 8451 states and 15813 transitions. [2021-01-06 18:25:48,572 INFO L78 Accepts]: Start accepts. Automaton has 8451 states and 15813 transitions. Word has length 62 [2021-01-06 18:25:48,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:48,573 INFO L481 AbstractCegarLoop]: Abstraction has 8451 states and 15813 transitions. [2021-01-06 18:25:48,573 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:48,573 INFO L276 IsEmpty]: Start isEmpty. Operand 8451 states and 15813 transitions. [2021-01-06 18:25:48,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-01-06 18:25:48,577 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:48,577 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:48,577 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:25:48,577 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:48,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:48,578 INFO L82 PathProgramCache]: Analyzing trace with hash -216167122, now seen corresponding path program 1 times [2021-01-06 18:25:48,578 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:48,578 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915653387] [2021-01-06 18:25:48,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:48,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:48,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:48,673 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915653387] [2021-01-06 18:25:48,673 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:48,673 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:25:48,673 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367775656] [2021-01-06 18:25:48,674 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:25:48,674 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:48,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:25:48,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:48,675 INFO L87 Difference]: Start difference. First operand 8451 states and 15813 transitions. Second operand 4 states. [2021-01-06 18:25:52,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:25:52,593 INFO L93 Difference]: Finished difference Result 22174 states and 41674 transitions. [2021-01-06 18:25:52,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:25:52,594 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2021-01-06 18:25:52,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:25:52,624 INFO L225 Difference]: With dead ends: 22174 [2021-01-06 18:25:52,625 INFO L226 Difference]: Without dead ends: 13763 [2021-01-06 18:25:52,635 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:25:52,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13763 states. [2021-01-06 18:25:53,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13763 to 8451. [2021-01-06 18:25:53,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8451 states. [2021-01-06 18:25:53,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8451 states to 8451 states and 15796 transitions. [2021-01-06 18:25:53,120 INFO L78 Accepts]: Start accepts. Automaton has 8451 states and 15796 transitions. Word has length 63 [2021-01-06 18:25:53,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:25:53,120 INFO L481 AbstractCegarLoop]: Abstraction has 8451 states and 15796 transitions. [2021-01-06 18:25:53,120 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:25:53,120 INFO L276 IsEmpty]: Start isEmpty. Operand 8451 states and 15796 transitions. [2021-01-06 18:25:53,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-01-06 18:25:53,124 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:25:53,124 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:25:53,124 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:25:53,124 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:25:53,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:25:53,125 INFO L82 PathProgramCache]: Analyzing trace with hash -1716704928, now seen corresponding path program 1 times [2021-01-06 18:25:53,125 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:25:53,125 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967360913] [2021-01-06 18:25:53,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:25:53,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:25:53,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:25:53,197 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967360913] [2021-01-06 18:25:53,197 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:25:53,197 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:25:53,198 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609548465] [2021-01-06 18:25:53,198 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:25:53,198 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:25:53,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:25:53,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:25:53,199 INFO L87 Difference]: Start difference. First operand 8451 states and 15796 transitions. Second operand 6 states. [2021-01-06 18:26:08,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:08,149 INFO L93 Difference]: Finished difference Result 106749 states and 199267 transitions. [2021-01-06 18:26:08,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:26:08,150 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2021-01-06 18:26:08,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:08,531 INFO L225 Difference]: With dead ends: 106749 [2021-01-06 18:26:08,531 INFO L226 Difference]: Without dead ends: 98365 [2021-01-06 18:26:08,608 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:26:08,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98365 states. [2021-01-06 18:26:10,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98365 to 16859. [2021-01-06 18:26:10,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16859 states. [2021-01-06 18:26:10,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16859 states to 16859 states and 31545 transitions. [2021-01-06 18:26:10,514 INFO L78 Accepts]: Start accepts. Automaton has 16859 states and 31545 transitions. Word has length 65 [2021-01-06 18:26:10,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:10,514 INFO L481 AbstractCegarLoop]: Abstraction has 16859 states and 31545 transitions. [2021-01-06 18:26:10,514 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:26:10,514 INFO L276 IsEmpty]: Start isEmpty. Operand 16859 states and 31545 transitions. [2021-01-06 18:26:10,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:26:10,518 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:10,519 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:10,519 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:26:10,519 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:10,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:10,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1057107044, now seen corresponding path program 1 times [2021-01-06 18:26:10,520 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:10,520 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539699792] [2021-01-06 18:26:10,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:10,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:10,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:10,602 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539699792] [2021-01-06 18:26:10,602 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:10,603 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:26:10,603 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547253896] [2021-01-06 18:26:10,603 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:26:10,603 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:10,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:26:10,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:26:10,604 INFO L87 Difference]: Start difference. First operand 16859 states and 31545 transitions. Second operand 6 states. [2021-01-06 18:26:31,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:31,376 INFO L93 Difference]: Finished difference Result 164219 states and 306665 transitions. [2021-01-06 18:26:31,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:26:31,376 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2021-01-06 18:26:31,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:31,844 INFO L225 Difference]: With dead ends: 164219 [2021-01-06 18:26:31,844 INFO L226 Difference]: Without dead ends: 147466 [2021-01-06 18:26:31,943 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:26:32,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147466 states. [2021-01-06 18:26:34,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147466 to 25267. [2021-01-06 18:26:34,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25267 states. [2021-01-06 18:26:34,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25267 states to 25267 states and 47294 transitions. [2021-01-06 18:26:34,251 INFO L78 Accepts]: Start accepts. Automaton has 25267 states and 47294 transitions. Word has length 66 [2021-01-06 18:26:34,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:34,251 INFO L481 AbstractCegarLoop]: Abstraction has 25267 states and 47294 transitions. [2021-01-06 18:26:34,251 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:26:34,251 INFO L276 IsEmpty]: Start isEmpty. Operand 25267 states and 47294 transitions. [2021-01-06 18:26:34,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:26:34,260 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:34,260 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:34,260 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:26:34,260 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:34,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:34,261 INFO L82 PathProgramCache]: Analyzing trace with hash 737154613, now seen corresponding path program 1 times [2021-01-06 18:26:34,261 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:34,261 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567763794] [2021-01-06 18:26:34,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:34,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:34,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:34,329 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1567763794] [2021-01-06 18:26:34,330 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:34,330 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:26:34,330 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [268658712] [2021-01-06 18:26:34,330 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:26:34,331 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:34,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:26:34,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:26:34,332 INFO L87 Difference]: Start difference. First operand 25267 states and 47294 transitions. Second operand 5 states. [2021-01-06 18:26:35,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:35,630 INFO L93 Difference]: Finished difference Result 33690 states and 63057 transitions. [2021-01-06 18:26:35,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:26:35,630 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2021-01-06 18:26:35,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:35,645 INFO L225 Difference]: With dead ends: 33690 [2021-01-06 18:26:35,646 INFO L226 Difference]: Without dead ends: 8448 [2021-01-06 18:26:35,666 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:26:35,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8448 states. [2021-01-06 18:26:36,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8448 to 8448. [2021-01-06 18:26:36,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8448 states. [2021-01-06 18:26:36,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8448 states to 8448 states and 15789 transitions. [2021-01-06 18:26:36,279 INFO L78 Accepts]: Start accepts. Automaton has 8448 states and 15789 transitions. Word has length 66 [2021-01-06 18:26:36,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:36,279 INFO L481 AbstractCegarLoop]: Abstraction has 8448 states and 15789 transitions. [2021-01-06 18:26:36,279 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:26:36,279 INFO L276 IsEmpty]: Start isEmpty. Operand 8448 states and 15789 transitions. [2021-01-06 18:26:36,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-01-06 18:26:36,283 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:36,283 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:36,283 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:26:36,283 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:36,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:36,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1978424955, now seen corresponding path program 1 times [2021-01-06 18:26:36,284 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:36,284 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917664798] [2021-01-06 18:26:36,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:36,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:36,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:36,360 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917664798] [2021-01-06 18:26:36,360 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:36,361 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:26:36,361 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466834160] [2021-01-06 18:26:36,361 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:26:36,361 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:36,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:26:36,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:26:36,362 INFO L87 Difference]: Start difference. First operand 8448 states and 15789 transitions. Second operand 6 states. [2021-01-06 18:26:43,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:43,040 INFO L93 Difference]: Finished difference Result 36899 states and 68938 transitions. [2021-01-06 18:26:43,040 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:26:43,040 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2021-01-06 18:26:43,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:43,077 INFO L225 Difference]: With dead ends: 36899 [2021-01-06 18:26:43,077 INFO L226 Difference]: Without dead ends: 28515 [2021-01-06 18:26:43,091 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2021-01-06 18:26:43,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28515 states. [2021-01-06 18:26:43,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28515 to 8245. [2021-01-06 18:26:43,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8245 states. [2021-01-06 18:26:43,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8245 states to 8245 states and 15446 transitions. [2021-01-06 18:26:43,867 INFO L78 Accepts]: Start accepts. Automaton has 8245 states and 15446 transitions. Word has length 67 [2021-01-06 18:26:43,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:43,868 INFO L481 AbstractCegarLoop]: Abstraction has 8245 states and 15446 transitions. [2021-01-06 18:26:43,868 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:26:43,868 INFO L276 IsEmpty]: Start isEmpty. Operand 8245 states and 15446 transitions. [2021-01-06 18:26:43,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:26:43,871 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:43,871 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:43,871 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:26:43,871 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:43,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:43,872 INFO L82 PathProgramCache]: Analyzing trace with hash 309642937, now seen corresponding path program 1 times [2021-01-06 18:26:43,872 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:43,872 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625282541] [2021-01-06 18:26:43,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:43,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:43,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:43,969 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625282541] [2021-01-06 18:26:43,969 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:43,970 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:26:43,970 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1895191544] [2021-01-06 18:26:43,971 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:26:43,972 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:43,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:26:43,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:26:43,972 INFO L87 Difference]: Start difference. First operand 8245 states and 15446 transitions. Second operand 4 states. [2021-01-06 18:26:48,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:48,001 INFO L93 Difference]: Finished difference Result 21761 states and 40944 transitions. [2021-01-06 18:26:48,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:26:48,002 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2021-01-06 18:26:48,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:48,020 INFO L225 Difference]: With dead ends: 21761 [2021-01-06 18:26:48,020 INFO L226 Difference]: Without dead ends: 13550 [2021-01-06 18:26:48,028 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:26:48,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13550 states. [2021-01-06 18:26:48,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13550 to 8245. [2021-01-06 18:26:48,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8245 states. [2021-01-06 18:26:48,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8245 states to 8245 states and 15429 transitions. [2021-01-06 18:26:48,651 INFO L78 Accepts]: Start accepts. Automaton has 8245 states and 15429 transitions. Word has length 68 [2021-01-06 18:26:48,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:48,651 INFO L481 AbstractCegarLoop]: Abstraction has 8245 states and 15429 transitions. [2021-01-06 18:26:48,652 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:26:48,652 INFO L276 IsEmpty]: Start isEmpty. Operand 8245 states and 15429 transitions. [2021-01-06 18:26:48,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-01-06 18:26:48,655 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:48,655 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:48,655 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:26:48,655 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:48,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:48,656 INFO L82 PathProgramCache]: Analyzing trace with hash -165165347, now seen corresponding path program 1 times [2021-01-06 18:26:48,656 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:48,656 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079614092] [2021-01-06 18:26:48,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:48,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:48,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:48,770 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079614092] [2021-01-06 18:26:48,770 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:48,770 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:26:48,770 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828858031] [2021-01-06 18:26:48,771 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:26:48,771 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:48,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:26:48,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:26:48,772 INFO L87 Difference]: Start difference. First operand 8245 states and 15429 transitions. Second operand 4 states. [2021-01-06 18:26:52,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:52,757 INFO L93 Difference]: Finished difference Result 21761 states and 40911 transitions. [2021-01-06 18:26:52,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:26:52,757 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2021-01-06 18:26:52,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:52,772 INFO L225 Difference]: With dead ends: 21761 [2021-01-06 18:26:52,773 INFO L226 Difference]: Without dead ends: 13550 [2021-01-06 18:26:52,779 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:26:52,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13550 states. [2021-01-06 18:26:53,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13550 to 8245. [2021-01-06 18:26:53,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8245 states. [2021-01-06 18:26:53,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8245 states to 8245 states and 15412 transitions. [2021-01-06 18:26:53,289 INFO L78 Accepts]: Start accepts. Automaton has 8245 states and 15412 transitions. Word has length 70 [2021-01-06 18:26:53,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:53,289 INFO L481 AbstractCegarLoop]: Abstraction has 8245 states and 15412 transitions. [2021-01-06 18:26:53,289 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:26:53,289 INFO L276 IsEmpty]: Start isEmpty. Operand 8245 states and 15412 transitions. [2021-01-06 18:26:53,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-01-06 18:26:53,292 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:53,292 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:53,292 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:26:53,292 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:53,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:53,293 INFO L82 PathProgramCache]: Analyzing trace with hash 285348761, now seen corresponding path program 1 times [2021-01-06 18:26:53,293 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:53,293 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338139556] [2021-01-06 18:26:53,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:53,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:53,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:53,372 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338139556] [2021-01-06 18:26:53,372 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:53,373 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:26:53,373 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776951407] [2021-01-06 18:26:53,373 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:26:53,373 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:53,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:26:53,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:26:53,374 INFO L87 Difference]: Start difference. First operand 8245 states and 15412 transitions. Second operand 6 states. [2021-01-06 18:26:57,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:57,325 INFO L93 Difference]: Finished difference Result 23609 states and 44022 transitions. [2021-01-06 18:26:57,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:26:57,326 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2021-01-06 18:26:57,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:57,345 INFO L225 Difference]: With dead ends: 23609 [2021-01-06 18:26:57,345 INFO L226 Difference]: Without dead ends: 17040 [2021-01-06 18:26:57,352 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:26:57,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17040 states. [2021-01-06 18:26:57,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17040 to 8235. [2021-01-06 18:26:57,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8235 states. [2021-01-06 18:26:57,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8235 states to 8235 states and 15392 transitions. [2021-01-06 18:26:57,977 INFO L78 Accepts]: Start accepts. Automaton has 8235 states and 15392 transitions. Word has length 72 [2021-01-06 18:26:57,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:57,977 INFO L481 AbstractCegarLoop]: Abstraction has 8235 states and 15392 transitions. [2021-01-06 18:26:57,977 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:26:57,977 INFO L276 IsEmpty]: Start isEmpty. Operand 8235 states and 15392 transitions. [2021-01-06 18:26:57,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:26:57,980 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:57,980 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:57,980 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:26:57,980 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:57,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:57,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1077334731, now seen corresponding path program 1 times [2021-01-06 18:26:57,981 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:57,981 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819192468] [2021-01-06 18:26:57,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:58,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:58,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:58,042 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819192468] [2021-01-06 18:26:58,042 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:58,042 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:26:58,042 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161109684] [2021-01-06 18:26:58,043 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:26:58,043 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:58,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:26:58,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:26:58,044 INFO L87 Difference]: Start difference. First operand 8235 states and 15392 transitions. Second operand 3 states. [2021-01-06 18:26:59,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:26:59,030 INFO L93 Difference]: Finished difference Result 19358 states and 36220 transitions. [2021-01-06 18:26:59,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:26:59,031 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2021-01-06 18:26:59,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:26:59,050 INFO L225 Difference]: With dead ends: 19358 [2021-01-06 18:26:59,050 INFO L226 Difference]: Without dead ends: 12420 [2021-01-06 18:26:59,058 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:26:59,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12420 states. [2021-01-06 18:26:59,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12420 to 12405. [2021-01-06 18:26:59,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12405 states. [2021-01-06 18:26:59,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12405 states to 12405 states and 23156 transitions. [2021-01-06 18:26:59,866 INFO L78 Accepts]: Start accepts. Automaton has 12405 states and 23156 transitions. Word has length 78 [2021-01-06 18:26:59,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:26:59,866 INFO L481 AbstractCegarLoop]: Abstraction has 12405 states and 23156 transitions. [2021-01-06 18:26:59,866 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:26:59,866 INFO L276 IsEmpty]: Start isEmpty. Operand 12405 states and 23156 transitions. [2021-01-06 18:26:59,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-01-06 18:26:59,869 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:26:59,869 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:26:59,869 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:26:59,870 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:26:59,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:26:59,870 INFO L82 PathProgramCache]: Analyzing trace with hash 434411579, now seen corresponding path program 1 times [2021-01-06 18:26:59,870 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:26:59,870 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484096704] [2021-01-06 18:26:59,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:26:59,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:26:59,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:26:59,931 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484096704] [2021-01-06 18:26:59,932 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:26:59,932 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:26:59,932 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357389735] [2021-01-06 18:26:59,932 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:26:59,932 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:26:59,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:26:59,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:26:59,933 INFO L87 Difference]: Start difference. First operand 12405 states and 23156 transitions. Second operand 3 states. [2021-01-06 18:27:01,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:27:01,381 INFO L93 Difference]: Finished difference Result 31160 states and 58206 transitions. [2021-01-06 18:27:01,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:27:01,381 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2021-01-06 18:27:01,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:27:01,405 INFO L225 Difference]: With dead ends: 31160 [2021-01-06 18:27:01,406 INFO L226 Difference]: Without dead ends: 20667 [2021-01-06 18:27:01,414 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:01,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20667 states. [2021-01-06 18:27:02,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20667 to 20652. [2021-01-06 18:27:02,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20652 states. [2021-01-06 18:27:02,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20652 states to 20652 states and 38525 transitions. [2021-01-06 18:27:02,712 INFO L78 Accepts]: Start accepts. Automaton has 20652 states and 38525 transitions. Word has length 79 [2021-01-06 18:27:02,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:27:02,712 INFO L481 AbstractCegarLoop]: Abstraction has 20652 states and 38525 transitions. [2021-01-06 18:27:02,712 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:27:02,712 INFO L276 IsEmpty]: Start isEmpty. Operand 20652 states and 38525 transitions. [2021-01-06 18:27:02,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:27:02,715 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:27:02,715 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:27:02,715 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:27:02,715 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:27:02,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:27:02,716 INFO L82 PathProgramCache]: Analyzing trace with hash 1643596582, now seen corresponding path program 1 times [2021-01-06 18:27:02,716 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:27:02,716 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443653379] [2021-01-06 18:27:02,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:27:02,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:27:02,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:27:02,786 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443653379] [2021-01-06 18:27:02,786 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:27:02,786 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:27:02,786 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378775716] [2021-01-06 18:27:02,787 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:27:02,787 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:27:02,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:27:02,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:02,788 INFO L87 Difference]: Start difference. First operand 20652 states and 38525 transitions. Second operand 3 states. [2021-01-06 18:27:05,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:27:05,350 INFO L93 Difference]: Finished difference Result 54578 states and 101835 transitions. [2021-01-06 18:27:05,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:27:05,351 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2021-01-06 18:27:05,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:27:05,408 INFO L225 Difference]: With dead ends: 54578 [2021-01-06 18:27:05,408 INFO L226 Difference]: Without dead ends: 36955 [2021-01-06 18:27:05,428 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:05,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36955 states. [2021-01-06 18:27:07,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36955 to 36940. [2021-01-06 18:27:07,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36940 states. [2021-01-06 18:27:07,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36940 states to 36940 states and 68863 transitions. [2021-01-06 18:27:07,753 INFO L78 Accepts]: Start accepts. Automaton has 36940 states and 68863 transitions. Word has length 80 [2021-01-06 18:27:07,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:27:07,754 INFO L481 AbstractCegarLoop]: Abstraction has 36940 states and 68863 transitions. [2021-01-06 18:27:07,754 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:27:07,754 INFO L276 IsEmpty]: Start isEmpty. Operand 36940 states and 68863 transitions. [2021-01-06 18:27:07,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-01-06 18:27:07,757 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:27:07,758 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:27:07,758 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:27:07,758 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:27:07,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:27:07,758 INFO L82 PathProgramCache]: Analyzing trace with hash 138592246, now seen corresponding path program 1 times [2021-01-06 18:27:07,759 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:27:07,759 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754490539] [2021-01-06 18:27:07,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:27:07,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:27:07,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:27:07,820 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754490539] [2021-01-06 18:27:07,820 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:27:07,820 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:27:07,820 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638948608] [2021-01-06 18:27:07,821 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:27:07,821 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:27:07,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:27:07,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:07,821 INFO L87 Difference]: Start difference. First operand 36940 states and 68863 transitions. Second operand 3 states. [2021-01-06 18:27:12,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:27:12,421 INFO L93 Difference]: Finished difference Result 101002 states and 188244 transitions. [2021-01-06 18:27:12,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:27:12,421 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2021-01-06 18:27:12,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:27:12,517 INFO L225 Difference]: With dead ends: 101002 [2021-01-06 18:27:12,517 INFO L226 Difference]: Without dead ends: 69099 [2021-01-06 18:27:12,550 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:12,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69099 states. [2021-01-06 18:27:16,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69099 to 69084. [2021-01-06 18:27:16,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69084 states. [2021-01-06 18:27:16,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69084 states to 69084 states and 128657 transitions. [2021-01-06 18:27:16,991 INFO L78 Accepts]: Start accepts. Automaton has 69084 states and 128657 transitions. Word has length 81 [2021-01-06 18:27:16,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:27:16,992 INFO L481 AbstractCegarLoop]: Abstraction has 69084 states and 128657 transitions. [2021-01-06 18:27:16,992 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:27:16,992 INFO L276 IsEmpty]: Start isEmpty. Operand 69084 states and 128657 transitions. [2021-01-06 18:27:16,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:27:16,995 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:27:16,995 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:27:16,995 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:27:16,995 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:27:16,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:27:16,996 INFO L82 PathProgramCache]: Analyzing trace with hash 393064321, now seen corresponding path program 1 times [2021-01-06 18:27:16,996 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:27:16,996 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188227138] [2021-01-06 18:27:16,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:27:17,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:27:17,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:27:17,064 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188227138] [2021-01-06 18:27:17,064 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:27:17,064 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:27:17,064 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065892901] [2021-01-06 18:27:17,065 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:27:17,065 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:27:17,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:27:17,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:17,066 INFO L87 Difference]: Start difference. First operand 69084 states and 128657 transitions. Second operand 3 states. [2021-01-06 18:27:25,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:27:25,371 INFO L93 Difference]: Finished difference Result 192986 states and 359201 transitions. [2021-01-06 18:27:25,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:27:25,372 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2021-01-06 18:27:25,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:27:25,615 INFO L225 Difference]: With dead ends: 192986 [2021-01-06 18:27:25,615 INFO L226 Difference]: Without dead ends: 132503 [2021-01-06 18:27:25,672 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:27:25,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132503 states. [2021-01-06 18:27:34,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132503 to 132488. [2021-01-06 18:27:34,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132488 states. [2021-01-06 18:27:34,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132488 states to 132488 states and 246399 transitions. [2021-01-06 18:27:34,528 INFO L78 Accepts]: Start accepts. Automaton has 132488 states and 246399 transitions. Word has length 82 [2021-01-06 18:27:34,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:27:34,528 INFO L481 AbstractCegarLoop]: Abstraction has 132488 states and 246399 transitions. [2021-01-06 18:27:34,528 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:27:34,529 INFO L276 IsEmpty]: Start isEmpty. Operand 132488 states and 246399 transitions. [2021-01-06 18:27:34,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:27:34,532 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:27:34,532 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:27:34,532 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:27:34,532 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:27:34,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:27:34,532 INFO L82 PathProgramCache]: Analyzing trace with hash 259050815, now seen corresponding path program 1 times [2021-01-06 18:27:34,532 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:27:34,533 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528816033] [2021-01-06 18:27:34,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:27:34,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:27:34,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:27:34,631 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1528816033] [2021-01-06 18:27:34,631 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:27:34,632 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:27:34,632 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613253783] [2021-01-06 18:27:34,632 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:27:34,632 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:27:34,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:27:34,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:27:34,633 INFO L87 Difference]: Start difference. First operand 132488 states and 246399 transitions. Second operand 6 states. [2021-01-06 18:28:00,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:28:00,705 INFO L93 Difference]: Finished difference Result 616661 states and 1145220 transitions. [2021-01-06 18:28:00,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-01-06 18:28:00,705 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2021-01-06 18:28:00,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:28:02,127 INFO L225 Difference]: With dead ends: 616661 [2021-01-06 18:28:02,127 INFO L226 Difference]: Without dead ends: 499190 [2021-01-06 18:28:02,399 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:28:02,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499190 states.