/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/systemc/kundu1.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 19:22:17,633 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 19:22:17,636 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 19:22:17,676 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 19:22:17,677 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 19:22:17,681 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 19:22:17,684 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 19:22:17,689 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 19:22:17,693 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 19:22:17,700 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 19:22:17,705 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 19:22:17,707 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 19:22:17,707 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 19:22:17,710 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 19:22:17,712 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 19:22:17,714 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 19:22:17,715 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 19:22:17,719 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 19:22:17,727 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 19:22:17,731 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 19:22:17,735 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 19:22:17,737 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 19:22:17,739 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 19:22:17,742 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 19:22:17,753 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 19:22:17,754 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 19:22:17,754 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 19:22:17,757 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 19:22:17,757 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 19:22:17,760 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 19:22:17,760 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 19:22:17,761 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 19:22:17,763 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 19:22:17,764 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 19:22:17,766 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 19:22:17,766 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 19:22:17,767 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 19:22:17,775 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 19:22:17,775 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 19:22:17,796 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 19:22:17,797 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 19:22:17,800 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 19:22:17,861 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 19:22:17,861 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 19:22:17,863 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 19:22:17,863 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 19:22:17,863 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 19:22:17,864 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 19:22:17,864 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 19:22:17,864 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 19:22:17,864 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 19:22:17,865 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 19:22:17,865 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 19:22:17,865 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 19:22:17,865 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 19:22:17,866 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 19:22:17,866 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 19:22:17,866 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 19:22:17,866 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 19:22:17,867 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 19:22:17,867 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 19:22:17,867 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 19:22:17,867 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 19:22:17,868 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 19:22:17,868 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 19:22:17,868 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 19:22:17,868 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 19:22:17,868 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 19:22:18,243 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 19:22:18,273 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 19:22:18,276 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 19:22:18,278 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 19:22:18,279 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 19:22:18,280 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/kundu1.cil.c [2021-01-06 19:22:18,382 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/29edb9bc9/362c772040f74f80b93eec97b6ae75b9/FLAGab1d36565 [2021-01-06 19:22:18,959 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 19:22:18,959 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c [2021-01-06 19:22:18,977 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/29edb9bc9/362c772040f74f80b93eec97b6ae75b9/FLAGab1d36565 [2021-01-06 19:22:19,280 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/29edb9bc9/362c772040f74f80b93eec97b6ae75b9 [2021-01-06 19:22:19,290 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 19:22:19,294 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 19:22:19,301 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 19:22:19,301 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 19:22:19,306 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 19:22:19,307 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,311 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73e59640 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19, skipping insertion in model container [2021-01-06 19:22:19,311 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,333 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 19:22:19,393 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-06 19:22:19,569 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~data_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~data_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~timer~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~c~1,] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~P_1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~num~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~max_loop~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~timer~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~count~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~1,] [2021-01-06 19:22:19,645 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 19:22:19,665 INFO L203 MainTranslator]: Completed pre-run [2021-01-06 19:22:19,683 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres3~0,] left hand side expression in assignment: lhs: VariableLHS[~data_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~data_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~timer~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~c~1,] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_ev~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~P_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~C_1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~P_1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~num~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~max_loop~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~timer~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~P_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~C_1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~count~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~1,] [2021-01-06 19:22:19,764 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 19:22:19,791 INFO L208 MainTranslator]: Completed translation [2021-01-06 19:22:19,791 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19 WrapperNode [2021-01-06 19:22:19,792 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 19:22:19,793 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 19:22:19,793 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 19:22:19,793 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 19:22:19,805 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,817 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,854 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 19:22:19,855 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 19:22:19,855 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 19:22:19,855 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 19:22:19,902 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,903 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,912 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,913 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,936 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,952 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,956 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... [2021-01-06 19:22:19,960 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 19:22:19,962 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 19:22:19,962 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 19:22:19,962 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 19:22:19,963 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 19:22:20,090 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 19:22:20,091 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 19:22:20,091 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 19:22:20,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 19:22:20,859 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 19:22:20,859 INFO L299 CfgBuilder]: Removed 72 assume(true) statements. [2021-01-06 19:22:20,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:22:20 BoogieIcfgContainer [2021-01-06 19:22:20,862 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 19:22:20,864 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 19:22:20,864 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 19:22:20,868 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 19:22:20,869 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 07:22:19" (1/3) ... [2021-01-06 19:22:20,870 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c5edb84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 07:22:20, skipping insertion in model container [2021-01-06 19:22:20,870 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:22:19" (2/3) ... [2021-01-06 19:22:20,871 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c5edb84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 07:22:20, skipping insertion in model container [2021-01-06 19:22:20,871 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:22:20" (3/3) ... [2021-01-06 19:22:20,873 INFO L111 eAbstractionObserver]: Analyzing ICFG kundu1.cil.c [2021-01-06 19:22:20,880 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 19:22:20,886 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2021-01-06 19:22:20,907 INFO L253 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-01-06 19:22:20,938 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 19:22:20,938 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 19:22:20,938 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 19:22:20,939 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 19:22:20,939 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 19:22:20,939 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 19:22:20,939 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 19:22:20,939 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 19:22:20,959 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states. [2021-01-06 19:22:20,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-01-06 19:22:20,967 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:20,968 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:20,968 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:20,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:20,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1913091172, now seen corresponding path program 1 times [2021-01-06 19:22:20,986 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:20,987 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942617027] [2021-01-06 19:22:20,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:21,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:21,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:21,184 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942617027] [2021-01-06 19:22:21,185 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:21,185 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:21,186 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852253518] [2021-01-06 19:22:21,191 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:21,191 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:21,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:21,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:21,209 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 3 states. [2021-01-06 19:22:21,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:21,271 INFO L93 Difference]: Finished difference Result 228 states and 346 transitions. [2021-01-06 19:22:21,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:21,274 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2021-01-06 19:22:21,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:21,286 INFO L225 Difference]: With dead ends: 228 [2021-01-06 19:22:21,287 INFO L226 Difference]: Without dead ends: 112 [2021-01-06 19:22:21,291 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:21,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2021-01-06 19:22:21,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2021-01-06 19:22:21,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2021-01-06 19:22:21,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 162 transitions. [2021-01-06 19:22:21,343 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 162 transitions. Word has length 33 [2021-01-06 19:22:21,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:21,343 INFO L481 AbstractCegarLoop]: Abstraction has 112 states and 162 transitions. [2021-01-06 19:22:21,344 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:21,344 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 162 transitions. [2021-01-06 19:22:21,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-01-06 19:22:21,346 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:21,346 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:21,346 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 19:22:21,347 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:21,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:21,348 INFO L82 PathProgramCache]: Analyzing trace with hash 526887778, now seen corresponding path program 1 times [2021-01-06 19:22:21,348 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:21,349 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143375755] [2021-01-06 19:22:21,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:21,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:21,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:21,436 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143375755] [2021-01-06 19:22:21,436 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:21,437 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:21,437 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172491971] [2021-01-06 19:22:21,438 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:21,443 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:21,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:21,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:21,444 INFO L87 Difference]: Start difference. First operand 112 states and 162 transitions. Second operand 3 states. [2021-01-06 19:22:21,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:21,538 INFO L93 Difference]: Finished difference Result 304 states and 439 transitions. [2021-01-06 19:22:21,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:21,539 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2021-01-06 19:22:21,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:21,542 INFO L225 Difference]: With dead ends: 304 [2021-01-06 19:22:21,543 INFO L226 Difference]: Without dead ends: 199 [2021-01-06 19:22:21,544 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:21,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2021-01-06 19:22:21,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 189. [2021-01-06 19:22:21,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2021-01-06 19:22:21,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 273 transitions. [2021-01-06 19:22:21,583 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 273 transitions. Word has length 33 [2021-01-06 19:22:21,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:21,584 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 273 transitions. [2021-01-06 19:22:21,584 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:21,584 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 273 transitions. [2021-01-06 19:22:21,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-01-06 19:22:21,586 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:21,586 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:21,586 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 19:22:21,587 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:21,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:21,588 INFO L82 PathProgramCache]: Analyzing trace with hash -1145629853, now seen corresponding path program 1 times [2021-01-06 19:22:21,588 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:21,588 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670278124] [2021-01-06 19:22:21,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:21,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:21,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:21,676 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670278124] [2021-01-06 19:22:21,676 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:21,677 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:21,677 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409762670] [2021-01-06 19:22:21,678 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:21,678 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:21,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:21,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:21,681 INFO L87 Difference]: Start difference. First operand 189 states and 273 transitions. Second operand 5 states. [2021-01-06 19:22:21,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:21,884 INFO L93 Difference]: Finished difference Result 591 states and 861 transitions. [2021-01-06 19:22:21,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:22:21,885 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2021-01-06 19:22:21,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:21,891 INFO L225 Difference]: With dead ends: 591 [2021-01-06 19:22:21,891 INFO L226 Difference]: Without dead ends: 413 [2021-01-06 19:22:21,893 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:22:21,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2021-01-06 19:22:21,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 195. [2021-01-06 19:22:21,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2021-01-06 19:22:21,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 276 transitions. [2021-01-06 19:22:21,999 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 276 transitions. Word has length 33 [2021-01-06 19:22:21,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:21,999 INFO L481 AbstractCegarLoop]: Abstraction has 195 states and 276 transitions. [2021-01-06 19:22:22,000 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:22,000 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 276 transitions. [2021-01-06 19:22:22,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-01-06 19:22:22,003 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:22,004 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:22,004 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 19:22:22,004 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:22,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:22,005 INFO L82 PathProgramCache]: Analyzing trace with hash 1343899109, now seen corresponding path program 1 times [2021-01-06 19:22:22,006 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:22,006 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860980801] [2021-01-06 19:22:22,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:22,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:22,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:22,137 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860980801] [2021-01-06 19:22:22,138 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:22,140 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:22,141 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053290244] [2021-01-06 19:22:22,141 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:22:22,142 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:22,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:22:22,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:22:22,146 INFO L87 Difference]: Start difference. First operand 195 states and 276 transitions. Second operand 4 states. [2021-01-06 19:22:22,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:22,393 INFO L93 Difference]: Finished difference Result 621 states and 872 transitions. [2021-01-06 19:22:22,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 19:22:22,394 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2021-01-06 19:22:22,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:22,398 INFO L225 Difference]: With dead ends: 621 [2021-01-06 19:22:22,399 INFO L226 Difference]: Without dead ends: 439 [2021-01-06 19:22:22,401 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:22,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2021-01-06 19:22:22,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 333. [2021-01-06 19:22:22,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2021-01-06 19:22:22,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 464 transitions. [2021-01-06 19:22:22,470 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 464 transitions. Word has length 33 [2021-01-06 19:22:22,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:22,471 INFO L481 AbstractCegarLoop]: Abstraction has 333 states and 464 transitions. [2021-01-06 19:22:22,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:22:22,471 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 464 transitions. [2021-01-06 19:22:22,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-01-06 19:22:22,472 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:22,472 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:22,473 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 19:22:22,473 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:22,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:22,474 INFO L82 PathProgramCache]: Analyzing trace with hash -1179728243, now seen corresponding path program 1 times [2021-01-06 19:22:22,474 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:22,475 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315886927] [2021-01-06 19:22:22,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:22,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:22,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:22,538 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315886927] [2021-01-06 19:22:22,538 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:22,538 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:22,538 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449458111] [2021-01-06 19:22:22,539 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:22,539 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:22,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:22,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:22,541 INFO L87 Difference]: Start difference. First operand 333 states and 464 transitions. Second operand 5 states. [2021-01-06 19:22:22,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:22,713 INFO L93 Difference]: Finished difference Result 1126 states and 1579 transitions. [2021-01-06 19:22:22,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:22:22,715 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2021-01-06 19:22:22,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:22,720 INFO L225 Difference]: With dead ends: 1126 [2021-01-06 19:22:22,721 INFO L226 Difference]: Without dead ends: 812 [2021-01-06 19:22:22,728 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:22:22,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2021-01-06 19:22:22,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 360. [2021-01-06 19:22:22,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2021-01-06 19:22:22,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 491 transitions. [2021-01-06 19:22:22,774 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 491 transitions. Word has length 34 [2021-01-06 19:22:22,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:22,775 INFO L481 AbstractCegarLoop]: Abstraction has 360 states and 491 transitions. [2021-01-06 19:22:22,775 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:22,775 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 491 transitions. [2021-01-06 19:22:22,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-01-06 19:22:22,784 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:22,784 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:22,784 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 19:22:22,784 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:22,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:22,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1526891151, now seen corresponding path program 1 times [2021-01-06 19:22:22,788 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:22,788 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210431545] [2021-01-06 19:22:22,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:22,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:22,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:22,925 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210431545] [2021-01-06 19:22:22,925 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:22,926 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:22,926 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220065419] [2021-01-06 19:22:22,926 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:22:22,927 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:22,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:22:22,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:22:22,928 INFO L87 Difference]: Start difference. First operand 360 states and 491 transitions. Second operand 4 states. [2021-01-06 19:22:23,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:23,110 INFO L93 Difference]: Finished difference Result 1662 states and 2286 transitions. [2021-01-06 19:22:23,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:23,111 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2021-01-06 19:22:23,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:23,120 INFO L225 Difference]: With dead ends: 1662 [2021-01-06 19:22:23,120 INFO L226 Difference]: Without dead ends: 1324 [2021-01-06 19:22:23,122 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:23,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1324 states. [2021-01-06 19:22:23,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1324 to 674. [2021-01-06 19:22:23,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 674 states. [2021-01-06 19:22:23,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 923 transitions. [2021-01-06 19:22:23,194 INFO L78 Accepts]: Start accepts. Automaton has 674 states and 923 transitions. Word has length 34 [2021-01-06 19:22:23,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:23,196 INFO L481 AbstractCegarLoop]: Abstraction has 674 states and 923 transitions. [2021-01-06 19:22:23,196 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:22:23,197 INFO L276 IsEmpty]: Start isEmpty. Operand 674 states and 923 transitions. [2021-01-06 19:22:23,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2021-01-06 19:22:23,201 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:23,201 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:23,201 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 19:22:23,201 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:23,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:23,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1026068075, now seen corresponding path program 1 times [2021-01-06 19:22:23,211 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:23,212 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388188569] [2021-01-06 19:22:23,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:23,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:23,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:23,343 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388188569] [2021-01-06 19:22:23,344 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:23,344 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:23,345 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401525866] [2021-01-06 19:22:23,345 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:23,345 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:23,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:23,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:23,347 INFO L87 Difference]: Start difference. First operand 674 states and 923 transitions. Second operand 5 states. [2021-01-06 19:22:23,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:23,489 INFO L93 Difference]: Finished difference Result 1497 states and 2054 transitions. [2021-01-06 19:22:23,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:23,490 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2021-01-06 19:22:23,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:23,495 INFO L225 Difference]: With dead ends: 1497 [2021-01-06 19:22:23,496 INFO L226 Difference]: Without dead ends: 845 [2021-01-06 19:22:23,498 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:23,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 845 states. [2021-01-06 19:22:23,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 845 to 837. [2021-01-06 19:22:23,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 837 states. [2021-01-06 19:22:23,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 837 states to 837 states and 1144 transitions. [2021-01-06 19:22:23,572 INFO L78 Accepts]: Start accepts. Automaton has 837 states and 1144 transitions. Word has length 41 [2021-01-06 19:22:23,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:23,572 INFO L481 AbstractCegarLoop]: Abstraction has 837 states and 1144 transitions. [2021-01-06 19:22:23,572 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:23,572 INFO L276 IsEmpty]: Start isEmpty. Operand 837 states and 1144 transitions. [2021-01-06 19:22:23,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-01-06 19:22:23,573 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:23,573 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:23,574 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 19:22:23,574 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:23,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:23,574 INFO L82 PathProgramCache]: Analyzing trace with hash -305826283, now seen corresponding path program 1 times [2021-01-06 19:22:23,575 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:23,575 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941984492] [2021-01-06 19:22:23,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:23,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:23,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:23,669 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941984492] [2021-01-06 19:22:23,669 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:23,670 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 19:22:23,671 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977914077] [2021-01-06 19:22:23,673 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 19:22:23,673 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:23,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 19:22:23,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-01-06 19:22:23,675 INFO L87 Difference]: Start difference. First operand 837 states and 1144 transitions. Second operand 6 states. [2021-01-06 19:22:24,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:24,053 INFO L93 Difference]: Finished difference Result 3287 states and 4502 transitions. [2021-01-06 19:22:24,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 19:22:24,053 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2021-01-06 19:22:24,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:24,070 INFO L225 Difference]: With dead ends: 3287 [2021-01-06 19:22:24,070 INFO L226 Difference]: Without dead ends: 2472 [2021-01-06 19:22:24,074 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2021-01-06 19:22:24,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2472 states. [2021-01-06 19:22:24,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2472 to 1321. [2021-01-06 19:22:24,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1321 states. [2021-01-06 19:22:24,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1806 transitions. [2021-01-06 19:22:24,246 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1806 transitions. Word has length 44 [2021-01-06 19:22:24,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:24,247 INFO L481 AbstractCegarLoop]: Abstraction has 1321 states and 1806 transitions. [2021-01-06 19:22:24,247 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 19:22:24,249 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1806 transitions. [2021-01-06 19:22:24,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-01-06 19:22:24,251 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:24,251 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:24,252 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 19:22:24,253 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:24,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:24,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1702134670, now seen corresponding path program 1 times [2021-01-06 19:22:24,256 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:24,256 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552696105] [2021-01-06 19:22:24,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:24,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:24,333 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 19:22:24,337 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552696105] [2021-01-06 19:22:24,338 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:24,338 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:24,339 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781407559] [2021-01-06 19:22:24,339 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:24,340 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:24,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:24,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:24,342 INFO L87 Difference]: Start difference. First operand 1321 states and 1806 transitions. Second operand 3 states. [2021-01-06 19:22:24,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:24,614 INFO L93 Difference]: Finished difference Result 3798 states and 5147 transitions. [2021-01-06 19:22:24,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:24,616 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2021-01-06 19:22:24,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:24,631 INFO L225 Difference]: With dead ends: 3798 [2021-01-06 19:22:24,631 INFO L226 Difference]: Without dead ends: 2499 [2021-01-06 19:22:24,634 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:24,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2499 states. [2021-01-06 19:22:24,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2499 to 2495. [2021-01-06 19:22:24,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2495 states. [2021-01-06 19:22:24,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2495 states to 2495 states and 3301 transitions. [2021-01-06 19:22:24,943 INFO L78 Accepts]: Start accepts. Automaton has 2495 states and 3301 transitions. Word has length 46 [2021-01-06 19:22:24,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:24,943 INFO L481 AbstractCegarLoop]: Abstraction has 2495 states and 3301 transitions. [2021-01-06 19:22:24,943 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:24,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2495 states and 3301 transitions. [2021-01-06 19:22:24,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-01-06 19:22:24,945 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:24,945 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:24,945 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 19:22:24,945 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:24,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:24,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1664931104, now seen corresponding path program 1 times [2021-01-06 19:22:24,946 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:24,947 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112336996] [2021-01-06 19:22:24,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:24,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:25,033 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:25,034 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112336996] [2021-01-06 19:22:25,034 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:25,034 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:25,035 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177645981] [2021-01-06 19:22:25,035 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:22:25,035 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:25,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:22:25,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:22:25,039 INFO L87 Difference]: Start difference. First operand 2495 states and 3301 transitions. Second operand 4 states. [2021-01-06 19:22:25,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:25,686 INFO L93 Difference]: Finished difference Result 9142 states and 11944 transitions. [2021-01-06 19:22:25,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:25,686 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 48 [2021-01-06 19:22:25,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:25,725 INFO L225 Difference]: With dead ends: 9142 [2021-01-06 19:22:25,725 INFO L226 Difference]: Without dead ends: 6671 [2021-01-06 19:22:25,730 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:25,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6671 states. [2021-01-06 19:22:26,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6671 to 5850. [2021-01-06 19:22:26,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5850 states. [2021-01-06 19:22:26,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7499 transitions. [2021-01-06 19:22:26,224 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7499 transitions. Word has length 48 [2021-01-06 19:22:26,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:26,225 INFO L481 AbstractCegarLoop]: Abstraction has 5850 states and 7499 transitions. [2021-01-06 19:22:26,225 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:22:26,225 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7499 transitions. [2021-01-06 19:22:26,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-01-06 19:22:26,226 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:26,227 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:26,227 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 19:22:26,227 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:26,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:26,228 INFO L82 PathProgramCache]: Analyzing trace with hash 403090641, now seen corresponding path program 1 times [2021-01-06 19:22:26,228 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:26,228 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125367165] [2021-01-06 19:22:26,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:26,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:26,268 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:26,269 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125367165] [2021-01-06 19:22:26,269 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:26,269 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:26,270 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205905640] [2021-01-06 19:22:26,270 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:26,270 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:26,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:26,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:26,271 INFO L87 Difference]: Start difference. First operand 5850 states and 7499 transitions. Second operand 3 states. [2021-01-06 19:22:26,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:26,822 INFO L93 Difference]: Finished difference Result 11044 states and 14195 transitions. [2021-01-06 19:22:26,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:26,823 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2021-01-06 19:22:26,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:26,859 INFO L225 Difference]: With dead ends: 11044 [2021-01-06 19:22:26,859 INFO L226 Difference]: Without dead ends: 5852 [2021-01-06 19:22:26,871 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:26,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5852 states. [2021-01-06 19:22:27,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5852 to 5850. [2021-01-06 19:22:27,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5850 states. [2021-01-06 19:22:27,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7394 transitions. [2021-01-06 19:22:27,418 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7394 transitions. Word has length 48 [2021-01-06 19:22:27,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:27,420 INFO L481 AbstractCegarLoop]: Abstraction has 5850 states and 7394 transitions. [2021-01-06 19:22:27,420 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:27,420 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7394 transitions. [2021-01-06 19:22:27,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 19:22:27,421 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:27,421 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:27,422 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 19:22:27,422 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:27,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:27,422 INFO L82 PathProgramCache]: Analyzing trace with hash 57108908, now seen corresponding path program 1 times [2021-01-06 19:22:27,423 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:27,423 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880956173] [2021-01-06 19:22:27,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:27,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:27,496 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:27,496 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880956173] [2021-01-06 19:22:27,497 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:27,497 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:27,497 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834811599] [2021-01-06 19:22:27,497 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:22:27,498 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:27,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:22:27,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:22:27,498 INFO L87 Difference]: Start difference. First operand 5850 states and 7394 transitions. Second operand 4 states. [2021-01-06 19:22:28,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:28,033 INFO L93 Difference]: Finished difference Result 10947 states and 13872 transitions. [2021-01-06 19:22:28,034 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:28,034 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 19:22:28,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:28,058 INFO L225 Difference]: With dead ends: 10947 [2021-01-06 19:22:28,059 INFO L226 Difference]: Without dead ends: 5013 [2021-01-06 19:22:28,067 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:28,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5013 states. [2021-01-06 19:22:28,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5013 to 4814. [2021-01-06 19:22:28,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4814 states. [2021-01-06 19:22:28,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4814 states to 4814 states and 5985 transitions. [2021-01-06 19:22:28,574 INFO L78 Accepts]: Start accepts. Automaton has 4814 states and 5985 transitions. Word has length 49 [2021-01-06 19:22:28,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:28,574 INFO L481 AbstractCegarLoop]: Abstraction has 4814 states and 5985 transitions. [2021-01-06 19:22:28,574 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:22:28,574 INFO L276 IsEmpty]: Start isEmpty. Operand 4814 states and 5985 transitions. [2021-01-06 19:22:28,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-01-06 19:22:28,578 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:28,578 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:28,579 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 19:22:28,579 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:28,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:28,580 INFO L82 PathProgramCache]: Analyzing trace with hash 652914839, now seen corresponding path program 1 times [2021-01-06 19:22:28,580 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:28,580 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296350085] [2021-01-06 19:22:28,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:28,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:28,638 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 19:22:28,639 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296350085] [2021-01-06 19:22:28,639 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:28,639 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:28,639 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667014127] [2021-01-06 19:22:28,640 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:28,640 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:28,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:28,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:28,641 INFO L87 Difference]: Start difference. First operand 4814 states and 5985 transitions. Second operand 5 states. [2021-01-06 19:22:29,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:29,104 INFO L93 Difference]: Finished difference Result 8526 states and 10629 transitions. [2021-01-06 19:22:29,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 19:22:29,105 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2021-01-06 19:22:29,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:29,115 INFO L225 Difference]: With dead ends: 8526 [2021-01-06 19:22:29,115 INFO L226 Difference]: Without dead ends: 3744 [2021-01-06 19:22:29,123 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 19:22:29,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2021-01-06 19:22:29,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3233. [2021-01-06 19:22:29,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3233 states. [2021-01-06 19:22:29,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3233 states to 3233 states and 4035 transitions. [2021-01-06 19:22:29,421 INFO L78 Accepts]: Start accepts. Automaton has 3233 states and 4035 transitions. Word has length 83 [2021-01-06 19:22:29,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:29,422 INFO L481 AbstractCegarLoop]: Abstraction has 3233 states and 4035 transitions. [2021-01-06 19:22:29,422 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:29,422 INFO L276 IsEmpty]: Start isEmpty. Operand 3233 states and 4035 transitions. [2021-01-06 19:22:29,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 19:22:29,433 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:29,433 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:29,434 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 19:22:29,434 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:29,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:29,434 INFO L82 PathProgramCache]: Analyzing trace with hash 994874622, now seen corresponding path program 1 times [2021-01-06 19:22:29,435 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:29,435 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228225989] [2021-01-06 19:22:29,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:29,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:29,465 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-01-06 19:22:29,465 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228225989] [2021-01-06 19:22:29,465 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:29,466 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:29,466 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360279126] [2021-01-06 19:22:29,466 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:29,466 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:29,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:29,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:29,467 INFO L87 Difference]: Start difference. First operand 3233 states and 4035 transitions. Second operand 3 states. [2021-01-06 19:22:29,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:29,701 INFO L93 Difference]: Finished difference Result 3481 states and 4330 transitions. [2021-01-06 19:22:29,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:29,702 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-01-06 19:22:29,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:29,722 INFO L225 Difference]: With dead ends: 3481 [2021-01-06 19:22:29,723 INFO L226 Difference]: Without dead ends: 3217 [2021-01-06 19:22:29,726 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:29,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3217 states. [2021-01-06 19:22:29,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3217 to 3217. [2021-01-06 19:22:29,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3217 states. [2021-01-06 19:22:30,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3217 states to 3217 states and 4018 transitions. [2021-01-06 19:22:30,006 INFO L78 Accepts]: Start accepts. Automaton has 3217 states and 4018 transitions. Word has length 86 [2021-01-06 19:22:30,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:30,006 INFO L481 AbstractCegarLoop]: Abstraction has 3217 states and 4018 transitions. [2021-01-06 19:22:30,006 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:30,006 INFO L276 IsEmpty]: Start isEmpty. Operand 3217 states and 4018 transitions. [2021-01-06 19:22:30,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-01-06 19:22:30,009 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:30,010 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:30,010 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 19:22:30,010 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:30,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:30,011 INFO L82 PathProgramCache]: Analyzing trace with hash -684103662, now seen corresponding path program 1 times [2021-01-06 19:22:30,011 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:30,011 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273969496] [2021-01-06 19:22:30,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:30,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:30,083 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:30,083 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273969496] [2021-01-06 19:22:30,084 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:30,084 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:30,084 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473161378] [2021-01-06 19:22:30,085 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:30,085 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:30,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:30,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:30,086 INFO L87 Difference]: Start difference. First operand 3217 states and 4018 transitions. Second operand 3 states. [2021-01-06 19:22:30,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:30,334 INFO L93 Difference]: Finished difference Result 3591 states and 4462 transitions. [2021-01-06 19:22:30,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:30,335 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2021-01-06 19:22:30,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:30,343 INFO L225 Difference]: With dead ends: 3591 [2021-01-06 19:22:30,344 INFO L226 Difference]: Without dead ends: 3202 [2021-01-06 19:22:30,346 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:30,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3202 states. [2021-01-06 19:22:30,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3202 to 3195. [2021-01-06 19:22:30,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3195 states. [2021-01-06 19:22:30,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3195 states to 3195 states and 3992 transitions. [2021-01-06 19:22:30,632 INFO L78 Accepts]: Start accepts. Automaton has 3195 states and 3992 transitions. Word has length 89 [2021-01-06 19:22:30,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:30,632 INFO L481 AbstractCegarLoop]: Abstraction has 3195 states and 3992 transitions. [2021-01-06 19:22:30,632 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:30,632 INFO L276 IsEmpty]: Start isEmpty. Operand 3195 states and 3992 transitions. [2021-01-06 19:22:30,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-01-06 19:22:30,635 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:30,636 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:30,636 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 19:22:30,636 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:30,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:30,637 INFO L82 PathProgramCache]: Analyzing trace with hash -1261043826, now seen corresponding path program 1 times [2021-01-06 19:22:30,637 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:30,637 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869709505] [2021-01-06 19:22:30,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:30,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:30,715 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:30,716 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869709505] [2021-01-06 19:22:30,718 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:30,718 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:30,718 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727846738] [2021-01-06 19:22:30,720 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:30,720 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:30,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:30,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:30,721 INFO L87 Difference]: Start difference. First operand 3195 states and 3992 transitions. Second operand 5 states. [2021-01-06 19:22:31,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:31,047 INFO L93 Difference]: Finished difference Result 6859 states and 8520 transitions. [2021-01-06 19:22:31,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:31,048 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2021-01-06 19:22:31,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:31,056 INFO L225 Difference]: With dead ends: 6859 [2021-01-06 19:22:31,056 INFO L226 Difference]: Without dead ends: 3724 [2021-01-06 19:22:31,063 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 19:22:31,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3724 states. [2021-01-06 19:22:31,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3724 to 3073. [2021-01-06 19:22:31,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3073 states. [2021-01-06 19:22:31,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3073 states to 3073 states and 3805 transitions. [2021-01-06 19:22:31,315 INFO L78 Accepts]: Start accepts. Automaton has 3073 states and 3805 transitions. Word has length 95 [2021-01-06 19:22:31,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:31,316 INFO L481 AbstractCegarLoop]: Abstraction has 3073 states and 3805 transitions. [2021-01-06 19:22:31,316 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:31,316 INFO L276 IsEmpty]: Start isEmpty. Operand 3073 states and 3805 transitions. [2021-01-06 19:22:31,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-01-06 19:22:31,319 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:31,320 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:31,320 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 19:22:31,320 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:31,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:31,321 INFO L82 PathProgramCache]: Analyzing trace with hash -666432318, now seen corresponding path program 1 times [2021-01-06 19:22:31,321 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:31,321 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435573326] [2021-01-06 19:22:31,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:31,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:31,392 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2021-01-06 19:22:31,393 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435573326] [2021-01-06 19:22:31,393 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:31,393 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:31,394 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866584865] [2021-01-06 19:22:31,394 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:31,394 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:31,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:31,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:31,395 INFO L87 Difference]: Start difference. First operand 3073 states and 3805 transitions. Second operand 5 states. [2021-01-06 19:22:31,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:31,658 INFO L93 Difference]: Finished difference Result 5583 states and 6899 transitions. [2021-01-06 19:22:31,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 19:22:31,659 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2021-01-06 19:22:31,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:31,662 INFO L225 Difference]: With dead ends: 5583 [2021-01-06 19:22:31,662 INFO L226 Difference]: Without dead ends: 2208 [2021-01-06 19:22:31,668 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 19:22:31,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2208 states. [2021-01-06 19:22:31,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2208 to 2050. [2021-01-06 19:22:31,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2050 states. [2021-01-06 19:22:31,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2050 states to 2050 states and 2515 transitions. [2021-01-06 19:22:31,860 INFO L78 Accepts]: Start accepts. Automaton has 2050 states and 2515 transitions. Word has length 98 [2021-01-06 19:22:31,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:31,860 INFO L481 AbstractCegarLoop]: Abstraction has 2050 states and 2515 transitions. [2021-01-06 19:22:31,860 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:31,861 INFO L276 IsEmpty]: Start isEmpty. Operand 2050 states and 2515 transitions. [2021-01-06 19:22:31,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2021-01-06 19:22:31,863 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:31,864 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:31,864 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 19:22:31,864 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:31,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:31,865 INFO L82 PathProgramCache]: Analyzing trace with hash -165994237, now seen corresponding path program 1 times [2021-01-06 19:22:31,865 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:31,865 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758620711] [2021-01-06 19:22:31,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:31,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:31,916 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:31,917 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1758620711] [2021-01-06 19:22:31,917 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:31,917 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:31,917 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605730698] [2021-01-06 19:22:31,918 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:31,918 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:31,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:31,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:31,919 INFO L87 Difference]: Start difference. First operand 2050 states and 2515 transitions. Second operand 3 states. [2021-01-06 19:22:32,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:32,111 INFO L93 Difference]: Finished difference Result 3786 states and 4676 transitions. [2021-01-06 19:22:32,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:32,112 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2021-01-06 19:22:32,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:32,115 INFO L225 Difference]: With dead ends: 3786 [2021-01-06 19:22:32,115 INFO L226 Difference]: Without dead ends: 1796 [2021-01-06 19:22:32,119 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:32,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1796 states. [2021-01-06 19:22:32,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1796 to 1793. [2021-01-06 19:22:32,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2021-01-06 19:22:32,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2167 transitions. [2021-01-06 19:22:32,305 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2167 transitions. Word has length 111 [2021-01-06 19:22:32,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:32,306 INFO L481 AbstractCegarLoop]: Abstraction has 1793 states and 2167 transitions. [2021-01-06 19:22:32,306 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:32,306 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2167 transitions. [2021-01-06 19:22:32,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-01-06 19:22:32,309 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:32,309 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:32,309 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 19:22:32,309 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:32,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:32,310 INFO L82 PathProgramCache]: Analyzing trace with hash -896834660, now seen corresponding path program 1 times [2021-01-06 19:22:32,310 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:32,310 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740064670] [2021-01-06 19:22:32,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:32,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:32,421 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:32,422 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740064670] [2021-01-06 19:22:32,422 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:32,422 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:22:32,423 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069065309] [2021-01-06 19:22:32,423 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:32,423 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:32,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:32,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:32,424 INFO L87 Difference]: Start difference. First operand 1793 states and 2167 transitions. Second operand 5 states. [2021-01-06 19:22:32,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:32,738 INFO L93 Difference]: Finished difference Result 3489 states and 4203 transitions. [2021-01-06 19:22:32,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:32,740 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 113 [2021-01-06 19:22:32,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:32,746 INFO L225 Difference]: With dead ends: 3489 [2021-01-06 19:22:32,746 INFO L226 Difference]: Without dead ends: 1757 [2021-01-06 19:22:32,749 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 19:22:32,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1757 states. [2021-01-06 19:22:32,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1757 to 1618. [2021-01-06 19:22:32,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2021-01-06 19:22:32,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 1932 transitions. [2021-01-06 19:22:32,933 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 1932 transitions. Word has length 113 [2021-01-06 19:22:32,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:32,933 INFO L481 AbstractCegarLoop]: Abstraction has 1618 states and 1932 transitions. [2021-01-06 19:22:32,933 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:32,933 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 1932 transitions. [2021-01-06 19:22:32,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-01-06 19:22:32,936 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:32,936 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:32,936 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 19:22:32,937 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:32,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:32,937 INFO L82 PathProgramCache]: Analyzing trace with hash -1105184803, now seen corresponding path program 1 times [2021-01-06 19:22:32,938 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:32,938 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341048364] [2021-01-06 19:22:32,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:32,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:33,036 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:22:33,036 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341048364] [2021-01-06 19:22:33,037 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:33,037 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:33,037 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497415668] [2021-01-06 19:22:33,037 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:33,037 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:33,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:33,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:33,038 INFO L87 Difference]: Start difference. First operand 1618 states and 1932 transitions. Second operand 3 states. [2021-01-06 19:22:33,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:33,220 INFO L93 Difference]: Finished difference Result 3212 states and 3849 transitions. [2021-01-06 19:22:33,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:33,221 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2021-01-06 19:22:33,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:33,225 INFO L225 Difference]: With dead ends: 3212 [2021-01-06 19:22:33,225 INFO L226 Difference]: Without dead ends: 1655 [2021-01-06 19:22:33,228 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:33,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1655 states. [2021-01-06 19:22:33,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1655 to 1646. [2021-01-06 19:22:33,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1646 states. [2021-01-06 19:22:33,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1646 states to 1646 states and 1934 transitions. [2021-01-06 19:22:33,376 INFO L78 Accepts]: Start accepts. Automaton has 1646 states and 1934 transitions. Word has length 113 [2021-01-06 19:22:33,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:33,376 INFO L481 AbstractCegarLoop]: Abstraction has 1646 states and 1934 transitions. [2021-01-06 19:22:33,377 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:33,377 INFO L276 IsEmpty]: Start isEmpty. Operand 1646 states and 1934 transitions. [2021-01-06 19:22:33,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-01-06 19:22:33,379 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:33,379 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:33,379 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 19:22:33,379 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:33,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:33,380 INFO L82 PathProgramCache]: Analyzing trace with hash 1508765653, now seen corresponding path program 1 times [2021-01-06 19:22:33,381 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:33,381 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296923759] [2021-01-06 19:22:33,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:33,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:33,441 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:33,441 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296923759] [2021-01-06 19:22:33,441 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:33,441 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:33,443 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150110373] [2021-01-06 19:22:33,444 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:33,444 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:33,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:33,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:33,445 INFO L87 Difference]: Start difference. First operand 1646 states and 1934 transitions. Second operand 5 states. [2021-01-06 19:22:33,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:33,650 INFO L93 Difference]: Finished difference Result 3439 states and 4013 transitions. [2021-01-06 19:22:33,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:22:33,651 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2021-01-06 19:22:33,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:33,655 INFO L225 Difference]: With dead ends: 3439 [2021-01-06 19:22:33,655 INFO L226 Difference]: Without dead ends: 1854 [2021-01-06 19:22:33,657 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:22:33,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1854 states. [2021-01-06 19:22:33,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1854 to 1621. [2021-01-06 19:22:33,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1621 states. [2021-01-06 19:22:33,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1621 states to 1621 states and 1874 transitions. [2021-01-06 19:22:33,788 INFO L78 Accepts]: Start accepts. Automaton has 1621 states and 1874 transitions. Word has length 114 [2021-01-06 19:22:33,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:33,788 INFO L481 AbstractCegarLoop]: Abstraction has 1621 states and 1874 transitions. [2021-01-06 19:22:33,788 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:33,788 INFO L276 IsEmpty]: Start isEmpty. Operand 1621 states and 1874 transitions. [2021-01-06 19:22:33,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-01-06 19:22:33,790 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:33,790 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:33,791 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 19:22:33,791 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:33,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:33,791 INFO L82 PathProgramCache]: Analyzing trace with hash 2018238743, now seen corresponding path program 1 times [2021-01-06 19:22:33,791 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:33,792 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933625234] [2021-01-06 19:22:33,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:33,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:33,858 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:33,858 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933625234] [2021-01-06 19:22:33,859 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:33,859 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:22:33,859 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345689642] [2021-01-06 19:22:33,859 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:33,859 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:33,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:33,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:33,860 INFO L87 Difference]: Start difference. First operand 1621 states and 1874 transitions. Second operand 5 states. [2021-01-06 19:22:34,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:34,223 INFO L93 Difference]: Finished difference Result 4536 states and 5247 transitions. [2021-01-06 19:22:34,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 19:22:34,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2021-01-06 19:22:34,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:34,229 INFO L225 Difference]: With dead ends: 4536 [2021-01-06 19:22:34,230 INFO L226 Difference]: Without dead ends: 2976 [2021-01-06 19:22:34,233 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 19:22:34,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2976 states. [2021-01-06 19:22:34,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2976 to 1623. [2021-01-06 19:22:34,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1623 states. [2021-01-06 19:22:34,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1623 states to 1623 states and 1872 transitions. [2021-01-06 19:22:34,359 INFO L78 Accepts]: Start accepts. Automaton has 1623 states and 1872 transitions. Word has length 114 [2021-01-06 19:22:34,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:34,360 INFO L481 AbstractCegarLoop]: Abstraction has 1623 states and 1872 transitions. [2021-01-06 19:22:34,360 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:34,360 INFO L276 IsEmpty]: Start isEmpty. Operand 1623 states and 1872 transitions. [2021-01-06 19:22:34,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-01-06 19:22:34,362 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:34,362 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:34,363 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 19:22:34,363 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:34,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:34,363 INFO L82 PathProgramCache]: Analyzing trace with hash -29964582, now seen corresponding path program 1 times [2021-01-06 19:22:34,363 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:34,364 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740308090] [2021-01-06 19:22:34,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:34,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:34,426 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-01-06 19:22:34,427 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740308090] [2021-01-06 19:22:34,427 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:22:34,427 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:22:34,427 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136834363] [2021-01-06 19:22:34,427 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:22:34,428 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:34,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:22:34,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:34,428 INFO L87 Difference]: Start difference. First operand 1623 states and 1872 transitions. Second operand 3 states. [2021-01-06 19:22:34,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:34,574 INFO L93 Difference]: Finished difference Result 2877 states and 3320 transitions. [2021-01-06 19:22:34,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:22:34,575 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2021-01-06 19:22:34,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:34,577 INFO L225 Difference]: With dead ends: 2877 [2021-01-06 19:22:34,578 INFO L226 Difference]: Without dead ends: 1315 [2021-01-06 19:22:34,580 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:22:34,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1315 states. [2021-01-06 19:22:34,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1315 to 1207. [2021-01-06 19:22:34,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1207 states. [2021-01-06 19:22:34,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1207 states to 1207 states and 1370 transitions. [2021-01-06 19:22:34,669 INFO L78 Accepts]: Start accepts. Automaton has 1207 states and 1370 transitions. Word has length 116 [2021-01-06 19:22:34,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:34,669 INFO L481 AbstractCegarLoop]: Abstraction has 1207 states and 1370 transitions. [2021-01-06 19:22:34,670 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:22:34,670 INFO L276 IsEmpty]: Start isEmpty. Operand 1207 states and 1370 transitions. [2021-01-06 19:22:34,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-01-06 19:22:34,671 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:34,672 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:34,672 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 19:22:34,672 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:34,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:34,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1919382230, now seen corresponding path program 1 times [2021-01-06 19:22:34,673 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:34,673 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478268676] [2021-01-06 19:22:34,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:34,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:34,768 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-01-06 19:22:34,768 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478268676] [2021-01-06 19:22:34,769 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1598013666] [2021-01-06 19:22:34,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-01-06 19:22:34,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:22:34,894 INFO L263 TraceCheckSpWp]: Trace formula consists of 373 conjuncts, 9 conjunts are in the unsatisfiable core [2021-01-06 19:22:34,904 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-01-06 19:22:35,188 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-01-06 19:22:35,189 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-01-06 19:22:35,189 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2021-01-06 19:22:35,189 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413862945] [2021-01-06 19:22:35,190 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:22:35,190 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:22:35,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:22:35,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:22:35,191 INFO L87 Difference]: Start difference. First operand 1207 states and 1370 transitions. Second operand 5 states. [2021-01-06 19:22:35,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:22:35,505 INFO L93 Difference]: Finished difference Result 2872 states and 3266 transitions. [2021-01-06 19:22:35,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 19:22:35,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 118 [2021-01-06 19:22:35,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:22:35,510 INFO L225 Difference]: With dead ends: 2872 [2021-01-06 19:22:35,510 INFO L226 Difference]: Without dead ends: 2094 [2021-01-06 19:22:35,512 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:22:35,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2021-01-06 19:22:35,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 1322. [2021-01-06 19:22:35,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1322 states. [2021-01-06 19:22:35,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1322 states to 1322 states and 1497 transitions. [2021-01-06 19:22:35,681 INFO L78 Accepts]: Start accepts. Automaton has 1322 states and 1497 transitions. Word has length 118 [2021-01-06 19:22:35,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:22:35,682 INFO L481 AbstractCegarLoop]: Abstraction has 1322 states and 1497 transitions. [2021-01-06 19:22:35,682 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:22:35,682 INFO L276 IsEmpty]: Start isEmpty. Operand 1322 states and 1497 transitions. [2021-01-06 19:22:35,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2021-01-06 19:22:35,684 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:22:35,685 INFO L422 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:22:35,898 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2021-01-06 19:22:35,898 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:22:35,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:22:35,900 INFO L82 PathProgramCache]: Analyzing trace with hash 1404970223, now seen corresponding path program 1 times [2021-01-06 19:22:35,900 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:22:35,900 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065126038] [2021-01-06 19:22:35,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:22:35,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-06 19:22:35,925 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-06 19:22:35,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-06 19:22:35,952 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-06 19:22:36,032 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-06 19:22:36,032 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2021-01-06 19:22:36,032 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 19:22:36,259 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.01 07:22:36 BoogieIcfgContainer [2021-01-06 19:22:36,259 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-06 19:22:36,260 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-01-06 19:22:36,260 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-01-06 19:22:36,260 INFO L275 PluginConnector]: Witness Printer initialized [2021-01-06 19:22:36,261 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:22:20" (3/4) ... [2021-01-06 19:22:36,263 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-01-06 19:22:36,505 INFO L141 WitnessManager]: Wrote witness to /storage/repos/svcomp/c/systemc/kundu1.cil.c-witness.graphml [2021-01-06 19:22:36,506 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-01-06 19:22:36,508 INFO L168 Benchmark]: Toolchain (without parser) took 17213.21 ms. Allocated memory was 161.5 MB in the beginning and 1.1 GB in the end (delta: 908.1 MB). Free memory was 119.0 MB in the beginning and 475.5 MB in the end (delta: -356.6 MB). Peak memory consumption was 552.1 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,508 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 161.5 MB. Free memory is still 135.9 MB. There was no memory consumed. Max. memory is 8.0 GB. [2021-01-06 19:22:36,509 INFO L168 Benchmark]: CACSL2BoogieTranslator took 491.05 ms. Allocated memory is still 161.5 MB. Free memory was 118.8 MB in the beginning and 132.4 MB in the end (delta: -13.6 MB). Peak memory consumption was 5.0 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,510 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.96 ms. Allocated memory is still 161.5 MB. Free memory was 131.9 MB in the beginning and 129.8 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,510 INFO L168 Benchmark]: Boogie Preprocessor took 105.87 ms. Allocated memory is still 161.5 MB. Free memory was 129.8 MB in the beginning and 143.3 MB in the end (delta: -13.5 MB). Peak memory consumption was 1.0 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,510 INFO L168 Benchmark]: RCFGBuilder took 900.50 ms. Allocated memory is still 161.5 MB. Free memory was 143.3 MB in the beginning and 108.7 MB in the end (delta: 34.6 MB). Peak memory consumption was 34.6 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,511 INFO L168 Benchmark]: TraceAbstraction took 15395.61 ms. Allocated memory was 161.5 MB in the beginning and 1.1 GB in the end (delta: 908.1 MB). Free memory was 108.1 MB in the beginning and 503.8 MB in the end (delta: -395.7 MB). Peak memory consumption was 513.4 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,511 INFO L168 Benchmark]: Witness Printer took 245.60 ms. Allocated memory is still 1.1 GB. Free memory was 503.8 MB in the beginning and 475.5 MB in the end (delta: 28.3 MB). Peak memory consumption was 28.3 MB. Max. memory is 8.0 GB. [2021-01-06 19:22:36,513 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 161.5 MB. Free memory is still 135.9 MB. There was no memory consumed. Max. memory is 8.0 GB. * CACSL2BoogieTranslator took 491.05 ms. Allocated memory is still 161.5 MB. Free memory was 118.8 MB in the beginning and 132.4 MB in the end (delta: -13.6 MB). Peak memory consumption was 5.0 MB. Max. memory is 8.0 GB. * Boogie Procedure Inliner took 60.96 ms. Allocated memory is still 161.5 MB. Free memory was 131.9 MB in the beginning and 129.8 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 8.0 GB. * Boogie Preprocessor took 105.87 ms. Allocated memory is still 161.5 MB. Free memory was 129.8 MB in the beginning and 143.3 MB in the end (delta: -13.5 MB). Peak memory consumption was 1.0 MB. Max. memory is 8.0 GB. * RCFGBuilder took 900.50 ms. Allocated memory is still 161.5 MB. Free memory was 143.3 MB in the beginning and 108.7 MB in the end (delta: 34.6 MB). Peak memory consumption was 34.6 MB. Max. memory is 8.0 GB. * TraceAbstraction took 15395.61 ms. Allocated memory was 161.5 MB in the beginning and 1.1 GB in the end (delta: 908.1 MB). Free memory was 108.1 MB in the beginning and 503.8 MB in the end (delta: -395.7 MB). Peak memory consumption was 513.4 MB. Max. memory is 8.0 GB. * Witness Printer took 245.60 ms. Allocated memory is still 1.1 GB. Free memory was 503.8 MB in the beginning and 475.5 MB in the end (delta: 28.3 MB). Peak memory consumption was 28.3 MB. Max. memory is 8.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int max_loop ; [L18] int num ; [L19] int i ; [L20] int e ; [L21] int timer ; [L22] char data_0 ; [L23] char data_1 ; [L66] int P_1_pc; [L67] int P_1_st ; [L68] int P_1_i ; [L69] int P_1_ev ; [L124] int C_1_pc ; [L125] int C_1_st ; [L126] int C_1_i ; [L127] int C_1_ev ; [L128] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L492] int count ; [L493] int __retres2 ; [L497] num = 0 [L498] i = 0 [L499] max_loop = 2 [L501] timer = 0 [L502] P_1_pc = 0 [L503] C_1_pc = 0 [L505] count = 0 [L485] P_1_i = 1 [L486] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L423] int kernel_st ; [L424] int tmp ; [L425] int tmp___0 ; [L429] kernel_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L228] COND TRUE (int )P_1_i == 1 [L229] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L233] COND TRUE (int )C_1_i == 1 [L234] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L109] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L191] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L437] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L296] COND TRUE (int )C_1_st == 0 [L298] tmp___1 = __VERIFIER_nondet_int() [L300] COND TRUE \read(tmp___1) [L302] C_1_st = 1 [L130] char c ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L133] COND TRUE (int )C_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L150] COND TRUE num == 0 [L151] timer = 1 [L152] i += 1 [L153] C_1_pc = 1 [L154] C_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L74] COND TRUE (int )P_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L51] COND TRUE i___0 == 0 [L52] data_0 = c VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND TRUE i___0 == 1 [L55] data_1 = c VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND FALSE !(i___0 == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L11] reach_error() VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 117 locations, 3 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 15.0s, OverallIterations: 25, TraceHistogramMax: 6, AutomataDifference: 7.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 4726 SDtfs, 6233 SDslu, 6768 SDs, 0 SdLazy, 720 SolverSat, 180 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 253 GetRequests, 174 SyntacticMatches, 3 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5850occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.8s AutomataMinimizationTime, 24 MinimizatonAttempts, 7565 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 2034 NumberOfCodeBlocks, 2034 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1819 ConstructedInterpolants, 0 QuantifiedInterpolants, 406730 SizeOfPredicates, 3 NumberOfNonLiveVariables, 373 ConjunctsInSsa, 9 ConjunctsInUnsatCore, 25 InterpolantComputations, 23 PerfectInterpolantSequences, 404/474 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...