/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/systemc/transmitter.03.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 19:30:02,833 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 19:30:02,836 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 19:30:02,888 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 19:30:02,888 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 19:30:02,892 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 19:30:02,909 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 19:30:02,914 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 19:30:02,917 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 19:30:02,922 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 19:30:02,926 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 19:30:02,928 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 19:30:02,928 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 19:30:02,931 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 19:30:02,933 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 19:30:02,935 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 19:30:02,936 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 19:30:02,939 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 19:30:02,946 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 19:30:02,954 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 19:30:02,956 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 19:30:02,958 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 19:30:02,959 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 19:30:02,962 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 19:30:02,970 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 19:30:02,971 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 19:30:02,971 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 19:30:02,974 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 19:30:02,974 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 19:30:02,975 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 19:30:02,976 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 19:30:02,976 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 19:30:02,979 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 19:30:02,979 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 19:30:02,980 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 19:30:02,981 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 19:30:02,981 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 19:30:02,988 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 19:30:02,989 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 19:30:02,990 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 19:30:02,991 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 19:30:02,996 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 19:30:03,044 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 19:30:03,045 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 19:30:03,049 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 19:30:03,050 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 19:30:03,050 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 19:30:03,050 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 19:30:03,050 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 19:30:03,050 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 19:30:03,051 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 19:30:03,051 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 19:30:03,052 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 19:30:03,052 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 19:30:03,052 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 19:30:03,053 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 19:30:03,053 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 19:30:03,053 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 19:30:03,053 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 19:30:03,053 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 19:30:03,054 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 19:30:03,054 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 19:30:03,054 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 19:30:03,054 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 19:30:03,054 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 19:30:03,055 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 19:30:03,055 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 19:30:03,055 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 19:30:03,443 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 19:30:03,482 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 19:30:03,485 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 19:30:03,486 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 19:30:03,487 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 19:30:03,488 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/transmitter.03.cil.c [2021-01-06 19:30:03,571 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/5b08d8473/da9cdf1661064ca1b72bcb6abf80bc2a/FLAGcb17ed545 [2021-01-06 19:30:04,194 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 19:30:04,195 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/transmitter.03.cil.c [2021-01-06 19:30:04,207 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/5b08d8473/da9cdf1661064ca1b72bcb6abf80bc2a/FLAGcb17ed545 [2021-01-06 19:30:04,559 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/5b08d8473/da9cdf1661064ca1b72bcb6abf80bc2a [2021-01-06 19:30:04,565 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 19:30:04,569 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 19:30:04,573 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 19:30:04,573 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 19:30:04,578 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 19:30:04,579 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 07:30:04" (1/1) ... [2021-01-06 19:30:04,581 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f2e21cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:04, skipping insertion in model container [2021-01-06 19:30:04,582 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 07:30:04" (1/1) ... [2021-01-06 19:30:04,590 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 19:30:04,658 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-06 19:30:04,799 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/transmitter.03.cil.c[401,414] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~3,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~3,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_1~0,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_2~0,] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_3~0,] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_4~0,] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~5,] [2021-01-06 19:30:04,904 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 19:30:04,916 INFO L203 MainTranslator]: Completed pre-run [2021-01-06 19:30:04,931 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/systemc/transmitter.03.cil.c[401,414] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_pc~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~3,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~3,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_1~0,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_2~0,] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_3~0,] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp_ndt_4~0,] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~m_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~t1_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~t2_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~t3_st~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~M_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T1_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T2_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~T3_E~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~E_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~m_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t1_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t2_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~t3_i~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~__retres2~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~kernel_st~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~__retres1~5,] [2021-01-06 19:30:04,974 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 19:30:05,000 INFO L208 MainTranslator]: Completed translation [2021-01-06 19:30:05,000 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05 WrapperNode [2021-01-06 19:30:05,001 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 19:30:05,002 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 19:30:05,002 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 19:30:05,002 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 19:30:05,012 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,023 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,075 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 19:30:05,076 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 19:30:05,076 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 19:30:05,076 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 19:30:05,087 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,088 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,093 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,093 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,107 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,123 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,130 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... [2021-01-06 19:30:05,146 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 19:30:05,148 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 19:30:05,148 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 19:30:05,151 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 19:30:05,152 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 19:30:05,302 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 19:30:05,303 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 19:30:05,304 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 19:30:05,304 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 19:30:06,706 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 19:30:06,706 INFO L299 CfgBuilder]: Removed 119 assume(true) statements. [2021-01-06 19:30:06,709 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:30:06 BoogieIcfgContainer [2021-01-06 19:30:06,709 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 19:30:06,711 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 19:30:06,711 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 19:30:06,716 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 19:30:06,716 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 07:30:04" (1/3) ... [2021-01-06 19:30:06,717 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36fc68c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 07:30:06, skipping insertion in model container [2021-01-06 19:30:06,717 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 07:30:05" (2/3) ... [2021-01-06 19:30:06,718 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36fc68c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 07:30:06, skipping insertion in model container [2021-01-06 19:30:06,718 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:30:06" (3/3) ... [2021-01-06 19:30:06,720 INFO L111 eAbstractionObserver]: Analyzing ICFG transmitter.03.cil.c [2021-01-06 19:30:06,727 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 19:30:06,736 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2021-01-06 19:30:06,756 INFO L253 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-01-06 19:30:06,787 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 19:30:06,788 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 19:30:06,788 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 19:30:06,788 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 19:30:06,788 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 19:30:06,788 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 19:30:06,789 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 19:30:06,789 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 19:30:06,823 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states. [2021-01-06 19:30:06,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:06,834 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:06,835 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:06,836 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:06,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:06,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1838342379, now seen corresponding path program 1 times [2021-01-06 19:30:06,852 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:06,852 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966181720] [2021-01-06 19:30:06,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:06,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:07,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:07,084 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966181720] [2021-01-06 19:30:07,085 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:07,085 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:07,087 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843497413] [2021-01-06 19:30:07,093 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:07,094 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:07,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:07,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,114 INFO L87 Difference]: Start difference. First operand 276 states. Second operand 3 states. [2021-01-06 19:30:07,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:07,195 INFO L93 Difference]: Finished difference Result 547 states and 857 transitions. [2021-01-06 19:30:07,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:07,197 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:07,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:07,216 INFO L225 Difference]: With dead ends: 547 [2021-01-06 19:30:07,217 INFO L226 Difference]: Without dead ends: 272 [2021-01-06 19:30:07,222 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2021-01-06 19:30:07,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 272. [2021-01-06 19:30:07,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2021-01-06 19:30:07,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 412 transitions. [2021-01-06 19:30:07,303 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 412 transitions. Word has length 61 [2021-01-06 19:30:07,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:07,304 INFO L481 AbstractCegarLoop]: Abstraction has 272 states and 412 transitions. [2021-01-06 19:30:07,304 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:07,304 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 412 transitions. [2021-01-06 19:30:07,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:07,307 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:07,307 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:07,308 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 19:30:07,308 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:07,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:07,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1195707667, now seen corresponding path program 1 times [2021-01-06 19:30:07,310 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:07,310 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160727474] [2021-01-06 19:30:07,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:07,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:07,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:07,447 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160727474] [2021-01-06 19:30:07,448 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:07,448 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:07,449 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37683189] [2021-01-06 19:30:07,451 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:07,452 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:07,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:07,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,454 INFO L87 Difference]: Start difference. First operand 272 states and 412 transitions. Second operand 3 states. [2021-01-06 19:30:07,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:07,610 INFO L93 Difference]: Finished difference Result 730 states and 1104 transitions. [2021-01-06 19:30:07,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:07,611 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:07,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:07,620 INFO L225 Difference]: With dead ends: 730 [2021-01-06 19:30:07,620 INFO L226 Difference]: Without dead ends: 466 [2021-01-06 19:30:07,626 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2021-01-06 19:30:07,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 464. [2021-01-06 19:30:07,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:07,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 694 transitions. [2021-01-06 19:30:07,695 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 694 transitions. Word has length 61 [2021-01-06 19:30:07,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:07,696 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 694 transitions. [2021-01-06 19:30:07,696 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:07,697 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 694 transitions. [2021-01-06 19:30:07,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:07,706 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:07,707 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:07,707 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 19:30:07,708 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:07,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:07,711 INFO L82 PathProgramCache]: Analyzing trace with hash 266288339, now seen corresponding path program 1 times [2021-01-06 19:30:07,711 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:07,713 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200309739] [2021-01-06 19:30:07,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:07,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:07,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:07,790 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [200309739] [2021-01-06 19:30:07,790 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:07,791 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:07,791 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375101418] [2021-01-06 19:30:07,791 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:07,792 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:07,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:07,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,797 INFO L87 Difference]: Start difference. First operand 464 states and 694 transitions. Second operand 3 states. [2021-01-06 19:30:07,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:07,843 INFO L93 Difference]: Finished difference Result 919 states and 1375 transitions. [2021-01-06 19:30:07,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:07,844 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:07,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:07,847 INFO L225 Difference]: With dead ends: 919 [2021-01-06 19:30:07,847 INFO L226 Difference]: Without dead ends: 464 [2021-01-06 19:30:07,849 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-01-06 19:30:07,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-01-06 19:30:07,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:07,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 686 transitions. [2021-01-06 19:30:07,875 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 686 transitions. Word has length 61 [2021-01-06 19:30:07,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:07,876 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 686 transitions. [2021-01-06 19:30:07,876 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:07,876 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 686 transitions. [2021-01-06 19:30:07,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:07,877 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:07,878 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:07,878 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 19:30:07,878 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:07,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:07,879 INFO L82 PathProgramCache]: Analyzing trace with hash 710189013, now seen corresponding path program 1 times [2021-01-06 19:30:07,879 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:07,880 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266117786] [2021-01-06 19:30:07,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:07,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:07,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:07,936 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266117786] [2021-01-06 19:30:07,937 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:07,937 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:07,937 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016262719] [2021-01-06 19:30:07,938 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:07,938 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:07,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:07,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,939 INFO L87 Difference]: Start difference. First operand 464 states and 686 transitions. Second operand 3 states. [2021-01-06 19:30:07,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:07,975 INFO L93 Difference]: Finished difference Result 918 states and 1358 transitions. [2021-01-06 19:30:07,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:07,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:07,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:07,979 INFO L225 Difference]: With dead ends: 918 [2021-01-06 19:30:07,979 INFO L226 Difference]: Without dead ends: 464 [2021-01-06 19:30:07,981 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:07,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-01-06 19:30:08,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-01-06 19:30:08,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:08,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 678 transitions. [2021-01-06 19:30:08,002 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 678 transitions. Word has length 61 [2021-01-06 19:30:08,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:08,002 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 678 transitions. [2021-01-06 19:30:08,003 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:08,003 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 678 transitions. [2021-01-06 19:30:08,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:08,003 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:08,004 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:08,004 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 19:30:08,004 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:08,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:08,005 INFO L82 PathProgramCache]: Analyzing trace with hash -1623736427, now seen corresponding path program 1 times [2021-01-06 19:30:08,005 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:08,005 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785563615] [2021-01-06 19:30:08,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:08,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:08,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:08,053 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785563615] [2021-01-06 19:30:08,053 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:08,053 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:08,053 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714279372] [2021-01-06 19:30:08,054 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:08,054 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:08,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:08,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,055 INFO L87 Difference]: Start difference. First operand 464 states and 678 transitions. Second operand 3 states. [2021-01-06 19:30:08,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:08,097 INFO L93 Difference]: Finished difference Result 917 states and 1341 transitions. [2021-01-06 19:30:08,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:08,097 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:08,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:08,100 INFO L225 Difference]: With dead ends: 917 [2021-01-06 19:30:08,101 INFO L226 Difference]: Without dead ends: 464 [2021-01-06 19:30:08,102 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-01-06 19:30:08,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-01-06 19:30:08,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:08,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 670 transitions. [2021-01-06 19:30:08,127 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 670 transitions. Word has length 61 [2021-01-06 19:30:08,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:08,128 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 670 transitions. [2021-01-06 19:30:08,128 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:08,128 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 670 transitions. [2021-01-06 19:30:08,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:08,129 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:08,129 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:08,129 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 19:30:08,129 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:08,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:08,130 INFO L82 PathProgramCache]: Analyzing trace with hash -175003691, now seen corresponding path program 1 times [2021-01-06 19:30:08,130 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:08,131 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741442543] [2021-01-06 19:30:08,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:08,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:08,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:08,186 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741442543] [2021-01-06 19:30:08,186 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:08,186 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:08,186 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1680710461] [2021-01-06 19:30:08,187 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:08,187 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:08,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:08,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,188 INFO L87 Difference]: Start difference. First operand 464 states and 670 transitions. Second operand 3 states. [2021-01-06 19:30:08,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:08,268 INFO L93 Difference]: Finished difference Result 916 states and 1324 transitions. [2021-01-06 19:30:08,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:08,269 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:08,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:08,271 INFO L225 Difference]: With dead ends: 916 [2021-01-06 19:30:08,272 INFO L226 Difference]: Without dead ends: 464 [2021-01-06 19:30:08,273 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-01-06 19:30:08,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-01-06 19:30:08,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:08,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 654 transitions. [2021-01-06 19:30:08,297 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 654 transitions. Word has length 61 [2021-01-06 19:30:08,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:08,297 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 654 transitions. [2021-01-06 19:30:08,297 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:08,297 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 654 transitions. [2021-01-06 19:30:08,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:08,298 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:08,298 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:08,299 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 19:30:08,299 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:08,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:08,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1945036492, now seen corresponding path program 1 times [2021-01-06 19:30:08,300 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:08,300 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020358515] [2021-01-06 19:30:08,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:08,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:08,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:08,345 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020358515] [2021-01-06 19:30:08,345 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:08,345 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:08,345 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58746367] [2021-01-06 19:30:08,346 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:08,346 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:08,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:08,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,347 INFO L87 Difference]: Start difference. First operand 464 states and 654 transitions. Second operand 3 states. [2021-01-06 19:30:08,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:08,430 INFO L93 Difference]: Finished difference Result 914 states and 1289 transitions. [2021-01-06 19:30:08,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:08,430 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:08,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:08,433 INFO L225 Difference]: With dead ends: 914 [2021-01-06 19:30:08,433 INFO L226 Difference]: Without dead ends: 464 [2021-01-06 19:30:08,435 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:08,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-01-06 19:30:08,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-01-06 19:30:08,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-01-06 19:30:08,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 638 transitions. [2021-01-06 19:30:08,468 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 638 transitions. Word has length 61 [2021-01-06 19:30:08,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:08,469 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 638 transitions. [2021-01-06 19:30:08,469 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:08,469 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 638 transitions. [2021-01-06 19:30:08,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:08,470 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:08,470 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:08,470 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 19:30:08,471 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:08,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:08,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1902661357, now seen corresponding path program 1 times [2021-01-06 19:30:08,473 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:08,473 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786778331] [2021-01-06 19:30:08,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:08,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:08,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:08,540 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786778331] [2021-01-06 19:30:08,540 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:08,541 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:30:08,541 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644493091] [2021-01-06 19:30:08,541 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:30:08,541 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:08,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:30:08,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:08,542 INFO L87 Difference]: Start difference. First operand 464 states and 638 transitions. Second operand 5 states. [2021-01-06 19:30:08,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:08,761 INFO L93 Difference]: Finished difference Result 1468 states and 2029 transitions. [2021-01-06 19:30:08,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:30:08,762 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-01-06 19:30:08,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:08,769 INFO L225 Difference]: With dead ends: 1468 [2021-01-06 19:30:08,770 INFO L226 Difference]: Without dead ends: 1025 [2021-01-06 19:30:08,772 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:30:08,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1025 states. [2021-01-06 19:30:08,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1025 to 479. [2021-01-06 19:30:08,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 479 states. [2021-01-06 19:30:08,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 648 transitions. [2021-01-06 19:30:08,818 INFO L78 Accepts]: Start accepts. Automaton has 479 states and 648 transitions. Word has length 61 [2021-01-06 19:30:08,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:08,819 INFO L481 AbstractCegarLoop]: Abstraction has 479 states and 648 transitions. [2021-01-06 19:30:08,819 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:30:08,819 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 648 transitions. [2021-01-06 19:30:08,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:08,820 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:08,820 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:08,820 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 19:30:08,820 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:08,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:08,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1654514863, now seen corresponding path program 1 times [2021-01-06 19:30:08,822 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:08,822 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770655515] [2021-01-06 19:30:08,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:08,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:08,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:08,868 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770655515] [2021-01-06 19:30:08,869 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:08,869 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:30:08,869 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570704299] [2021-01-06 19:30:08,870 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:30:08,870 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:08,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:30:08,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:08,871 INFO L87 Difference]: Start difference. First operand 479 states and 648 transitions. Second operand 5 states. [2021-01-06 19:30:09,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:09,061 INFO L93 Difference]: Finished difference Result 1256 states and 1713 transitions. [2021-01-06 19:30:09,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:30:09,062 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-01-06 19:30:09,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:09,067 INFO L225 Difference]: With dead ends: 1256 [2021-01-06 19:30:09,067 INFO L226 Difference]: Without dead ends: 805 [2021-01-06 19:30:09,068 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:30:09,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 805 states. [2021-01-06 19:30:09,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 805 to 485. [2021-01-06 19:30:09,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 485 states. [2021-01-06 19:30:09,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 646 transitions. [2021-01-06 19:30:09,113 INFO L78 Accepts]: Start accepts. Automaton has 485 states and 646 transitions. Word has length 61 [2021-01-06 19:30:09,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:09,113 INFO L481 AbstractCegarLoop]: Abstraction has 485 states and 646 transitions. [2021-01-06 19:30:09,113 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:30:09,114 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 646 transitions. [2021-01-06 19:30:09,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:09,114 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:09,115 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:09,115 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 19:30:09,115 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:09,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:09,116 INFO L82 PathProgramCache]: Analyzing trace with hash -2048881649, now seen corresponding path program 1 times [2021-01-06 19:30:09,116 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:09,116 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210602690] [2021-01-06 19:30:09,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:09,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:09,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:09,166 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210602690] [2021-01-06 19:30:09,166 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:09,166 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:30:09,167 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451028321] [2021-01-06 19:30:09,167 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:30:09,167 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:09,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:30:09,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:09,168 INFO L87 Difference]: Start difference. First operand 485 states and 646 transitions. Second operand 5 states. [2021-01-06 19:30:09,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:09,409 INFO L93 Difference]: Finished difference Result 1610 states and 2151 transitions. [2021-01-06 19:30:09,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:30:09,410 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-01-06 19:30:09,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:09,417 INFO L225 Difference]: With dead ends: 1610 [2021-01-06 19:30:09,417 INFO L226 Difference]: Without dead ends: 1160 [2021-01-06 19:30:09,419 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:30:09,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1160 states. [2021-01-06 19:30:09,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1160 to 515. [2021-01-06 19:30:09,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 515 states. [2021-01-06 19:30:09,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 515 states to 515 states and 676 transitions. [2021-01-06 19:30:09,482 INFO L78 Accepts]: Start accepts. Automaton has 515 states and 676 transitions. Word has length 61 [2021-01-06 19:30:09,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:09,482 INFO L481 AbstractCegarLoop]: Abstraction has 515 states and 676 transitions. [2021-01-06 19:30:09,482 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:30:09,482 INFO L276 IsEmpty]: Start isEmpty. Operand 515 states and 676 transitions. [2021-01-06 19:30:09,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:09,483 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:09,483 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:09,484 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 19:30:09,484 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:09,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:09,484 INFO L82 PathProgramCache]: Analyzing trace with hash -2026249395, now seen corresponding path program 1 times [2021-01-06 19:30:09,485 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:09,485 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480476384] [2021-01-06 19:30:09,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:09,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:09,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:09,534 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480476384] [2021-01-06 19:30:09,534 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:09,535 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 19:30:09,535 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120044027] [2021-01-06 19:30:09,535 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 19:30:09,535 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:09,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 19:30:09,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:09,536 INFO L87 Difference]: Start difference. First operand 515 states and 676 transitions. Second operand 5 states. [2021-01-06 19:30:09,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:09,771 INFO L93 Difference]: Finished difference Result 1397 states and 1850 transitions. [2021-01-06 19:30:09,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 19:30:09,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-01-06 19:30:09,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:09,779 INFO L225 Difference]: With dead ends: 1397 [2021-01-06 19:30:09,779 INFO L226 Difference]: Without dead ends: 927 [2021-01-06 19:30:09,781 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 19:30:09,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 927 states. [2021-01-06 19:30:09,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 927 to 521. [2021-01-06 19:30:09,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states. [2021-01-06 19:30:09,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 674 transitions. [2021-01-06 19:30:09,852 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 674 transitions. Word has length 61 [2021-01-06 19:30:09,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:09,852 INFO L481 AbstractCegarLoop]: Abstraction has 521 states and 674 transitions. [2021-01-06 19:30:09,852 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 19:30:09,853 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 674 transitions. [2021-01-06 19:30:09,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:09,853 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:09,853 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:09,854 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 19:30:09,854 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:09,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:09,854 INFO L82 PathProgramCache]: Analyzing trace with hash 2134704395, now seen corresponding path program 1 times [2021-01-06 19:30:09,855 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:09,855 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722662609] [2021-01-06 19:30:09,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:09,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:09,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:09,941 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722662609] [2021-01-06 19:30:09,942 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:09,943 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:09,943 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [957289947] [2021-01-06 19:30:09,943 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:09,943 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:09,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:09,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:09,944 INFO L87 Difference]: Start difference. First operand 521 states and 674 transitions. Second operand 3 states. [2021-01-06 19:30:10,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:10,038 INFO L93 Difference]: Finished difference Result 1005 states and 1299 transitions. [2021-01-06 19:30:10,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:10,038 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:10,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:10,042 INFO L225 Difference]: With dead ends: 1005 [2021-01-06 19:30:10,042 INFO L226 Difference]: Without dead ends: 497 [2021-01-06 19:30:10,046 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2021-01-06 19:30:10,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2021-01-06 19:30:10,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2021-01-06 19:30:10,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 626 transitions. [2021-01-06 19:30:10,100 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 626 transitions. Word has length 61 [2021-01-06 19:30:10,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:10,100 INFO L481 AbstractCegarLoop]: Abstraction has 497 states and 626 transitions. [2021-01-06 19:30:10,100 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:10,100 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 626 transitions. [2021-01-06 19:30:10,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 19:30:10,101 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:10,101 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:10,102 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 19:30:10,102 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:10,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:10,102 INFO L82 PathProgramCache]: Analyzing trace with hash 140559689, now seen corresponding path program 1 times [2021-01-06 19:30:10,103 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:10,103 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686532085] [2021-01-06 19:30:10,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:10,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:10,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:10,164 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686532085] [2021-01-06 19:30:10,164 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:10,164 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:10,164 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340376945] [2021-01-06 19:30:10,165 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:10,165 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:10,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:10,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,166 INFO L87 Difference]: Start difference. First operand 497 states and 626 transitions. Second operand 3 states. [2021-01-06 19:30:10,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:10,350 INFO L93 Difference]: Finished difference Result 1368 states and 1714 transitions. [2021-01-06 19:30:10,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:10,351 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 19:30:10,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:10,357 INFO L225 Difference]: With dead ends: 1368 [2021-01-06 19:30:10,357 INFO L226 Difference]: Without dead ends: 920 [2021-01-06 19:30:10,364 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 920 states. [2021-01-06 19:30:10,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 920 to 891. [2021-01-06 19:30:10,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 891 states. [2021-01-06 19:30:10,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 891 states to 891 states and 1103 transitions. [2021-01-06 19:30:10,468 INFO L78 Accepts]: Start accepts. Automaton has 891 states and 1103 transitions. Word has length 61 [2021-01-06 19:30:10,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:10,470 INFO L481 AbstractCegarLoop]: Abstraction has 891 states and 1103 transitions. [2021-01-06 19:30:10,470 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:10,470 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 1103 transitions. [2021-01-06 19:30:10,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-01-06 19:30:10,473 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:10,473 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:10,474 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 19:30:10,474 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:10,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:10,474 INFO L82 PathProgramCache]: Analyzing trace with hash 327530686, now seen corresponding path program 1 times [2021-01-06 19:30:10,475 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:10,475 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767814435] [2021-01-06 19:30:10,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:10,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:10,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:10,539 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767814435] [2021-01-06 19:30:10,540 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:10,540 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:10,540 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779256440] [2021-01-06 19:30:10,540 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:10,541 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:10,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:10,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,542 INFO L87 Difference]: Start difference. First operand 891 states and 1103 transitions. Second operand 3 states. [2021-01-06 19:30:10,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:10,724 INFO L93 Difference]: Finished difference Result 2319 states and 2877 transitions. [2021-01-06 19:30:10,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:10,725 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2021-01-06 19:30:10,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:10,734 INFO L225 Difference]: With dead ends: 2319 [2021-01-06 19:30:10,734 INFO L226 Difference]: Without dead ends: 1522 [2021-01-06 19:30:10,737 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1522 states. [2021-01-06 19:30:10,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1522 to 1520. [2021-01-06 19:30:10,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1520 states. [2021-01-06 19:30:10,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1520 states to 1520 states and 1870 transitions. [2021-01-06 19:30:10,929 INFO L78 Accepts]: Start accepts. Automaton has 1520 states and 1870 transitions. Word has length 62 [2021-01-06 19:30:10,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:10,930 INFO L481 AbstractCegarLoop]: Abstraction has 1520 states and 1870 transitions. [2021-01-06 19:30:10,930 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:10,930 INFO L276 IsEmpty]: Start isEmpty. Operand 1520 states and 1870 transitions. [2021-01-06 19:30:10,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-01-06 19:30:10,931 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:10,931 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:10,931 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 19:30:10,932 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:10,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:10,932 INFO L82 PathProgramCache]: Analyzing trace with hash -479572275, now seen corresponding path program 1 times [2021-01-06 19:30:10,932 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:10,933 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860240875] [2021-01-06 19:30:10,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:10,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:10,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:10,983 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860240875] [2021-01-06 19:30:10,983 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:10,983 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:10,984 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946666198] [2021-01-06 19:30:10,984 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:10,984 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:10,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:10,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:10,986 INFO L87 Difference]: Start difference. First operand 1520 states and 1870 transitions. Second operand 3 states. [2021-01-06 19:30:11,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:11,281 INFO L93 Difference]: Finished difference Result 4144 states and 5092 transitions. [2021-01-06 19:30:11,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:11,282 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2021-01-06 19:30:11,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:11,296 INFO L225 Difference]: With dead ends: 4144 [2021-01-06 19:30:11,296 INFO L226 Difference]: Without dead ends: 2718 [2021-01-06 19:30:11,301 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:11,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2718 states. [2021-01-06 19:30:11,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2718 to 2716. [2021-01-06 19:30:11,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2716 states. [2021-01-06 19:30:11,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2716 states to 2716 states and 3314 transitions. [2021-01-06 19:30:11,584 INFO L78 Accepts]: Start accepts. Automaton has 2716 states and 3314 transitions. Word has length 63 [2021-01-06 19:30:11,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:11,585 INFO L481 AbstractCegarLoop]: Abstraction has 2716 states and 3314 transitions. [2021-01-06 19:30:11,585 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:11,585 INFO L276 IsEmpty]: Start isEmpty. Operand 2716 states and 3314 transitions. [2021-01-06 19:30:11,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-01-06 19:30:11,587 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:11,587 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:11,587 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 19:30:11,587 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:11,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:11,588 INFO L82 PathProgramCache]: Analyzing trace with hash -45843189, now seen corresponding path program 1 times [2021-01-06 19:30:11,588 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:11,588 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135641619] [2021-01-06 19:30:11,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:11,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:11,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:11,621 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1135641619] [2021-01-06 19:30:11,623 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:11,624 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:11,624 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279915680] [2021-01-06 19:30:11,624 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:11,625 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:11,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:11,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:11,625 INFO L87 Difference]: Start difference. First operand 2716 states and 3314 transitions. Second operand 3 states. [2021-01-06 19:30:11,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:11,898 INFO L93 Difference]: Finished difference Result 5252 states and 6425 transitions. [2021-01-06 19:30:11,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:11,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2021-01-06 19:30:11,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:11,911 INFO L225 Difference]: With dead ends: 5252 [2021-01-06 19:30:11,911 INFO L226 Difference]: Without dead ends: 2630 [2021-01-06 19:30:11,916 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:11,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2630 states. [2021-01-06 19:30:12,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2630 to 2630. [2021-01-06 19:30:12,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2630 states. [2021-01-06 19:30:12,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2630 states to 2630 states and 3216 transitions. [2021-01-06 19:30:12,136 INFO L78 Accepts]: Start accepts. Automaton has 2630 states and 3216 transitions. Word has length 63 [2021-01-06 19:30:12,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:12,136 INFO L481 AbstractCegarLoop]: Abstraction has 2630 states and 3216 transitions. [2021-01-06 19:30:12,136 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:12,136 INFO L276 IsEmpty]: Start isEmpty. Operand 2630 states and 3216 transitions. [2021-01-06 19:30:12,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-01-06 19:30:12,137 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:12,138 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:12,138 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 19:30:12,138 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:12,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:12,139 INFO L82 PathProgramCache]: Analyzing trace with hash -709022745, now seen corresponding path program 1 times [2021-01-06 19:30:12,139 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:12,139 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291182104] [2021-01-06 19:30:12,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:12,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:12,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:12,187 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291182104] [2021-01-06 19:30:12,187 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:12,188 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:12,189 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855537199] [2021-01-06 19:30:12,189 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:12,190 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:12,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:12,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:12,191 INFO L87 Difference]: Start difference. First operand 2630 states and 3216 transitions. Second operand 3 states. [2021-01-06 19:30:12,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:12,687 INFO L93 Difference]: Finished difference Result 7634 states and 9339 transitions. [2021-01-06 19:30:12,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:12,688 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2021-01-06 19:30:12,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:12,713 INFO L225 Difference]: With dead ends: 7634 [2021-01-06 19:30:12,714 INFO L226 Difference]: Without dead ends: 5074 [2021-01-06 19:30:12,720 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:12,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5074 states. [2021-01-06 19:30:13,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5074 to 5042. [2021-01-06 19:30:13,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5042 states. [2021-01-06 19:30:13,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5042 states to 5042 states and 6106 transitions. [2021-01-06 19:30:13,099 INFO L78 Accepts]: Start accepts. Automaton has 5042 states and 6106 transitions. Word has length 64 [2021-01-06 19:30:13,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:13,099 INFO L481 AbstractCegarLoop]: Abstraction has 5042 states and 6106 transitions. [2021-01-06 19:30:13,100 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:13,100 INFO L276 IsEmpty]: Start isEmpty. Operand 5042 states and 6106 transitions. [2021-01-06 19:30:13,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-01-06 19:30:13,103 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:13,103 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:13,103 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 19:30:13,104 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:13,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:13,104 INFO L82 PathProgramCache]: Analyzing trace with hash -1717276157, now seen corresponding path program 1 times [2021-01-06 19:30:13,105 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:13,105 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5623163] [2021-01-06 19:30:13,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:13,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:13,191 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:13,192 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5623163] [2021-01-06 19:30:13,192 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:13,192 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:30:13,193 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738156942] [2021-01-06 19:30:13,193 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:30:13,193 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:13,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:30:13,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:30:13,194 INFO L87 Difference]: Start difference. First operand 5042 states and 6106 transitions. Second operand 4 states. [2021-01-06 19:30:14,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:14,153 INFO L93 Difference]: Finished difference Result 14910 states and 18027 transitions. [2021-01-06 19:30:14,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:30:14,154 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2021-01-06 19:30:14,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:14,214 INFO L225 Difference]: With dead ends: 14910 [2021-01-06 19:30:14,214 INFO L226 Difference]: Without dead ends: 7496 [2021-01-06 19:30:14,226 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:14,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7496 states. [2021-01-06 19:30:14,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7496 to 7496. [2021-01-06 19:30:14,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7496 states. [2021-01-06 19:30:15,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7496 states to 7496 states and 9042 transitions. [2021-01-06 19:30:15,007 INFO L78 Accepts]: Start accepts. Automaton has 7496 states and 9042 transitions. Word has length 81 [2021-01-06 19:30:15,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:15,008 INFO L481 AbstractCegarLoop]: Abstraction has 7496 states and 9042 transitions. [2021-01-06 19:30:15,008 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:30:15,008 INFO L276 IsEmpty]: Start isEmpty. Operand 7496 states and 9042 transitions. [2021-01-06 19:30:15,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-01-06 19:30:15,013 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:15,014 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:15,014 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 19:30:15,014 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:15,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:15,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1115959489, now seen corresponding path program 1 times [2021-01-06 19:30:15,015 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:15,017 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985206613] [2021-01-06 19:30:15,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:15,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:15,091 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-01-06 19:30:15,092 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985206613] [2021-01-06 19:30:15,092 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:15,092 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:15,093 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915536098] [2021-01-06 19:30:15,094 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:15,094 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:15,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:15,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:15,095 INFO L87 Difference]: Start difference. First operand 7496 states and 9042 transitions. Second operand 3 states. [2021-01-06 19:30:16,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:16,054 INFO L93 Difference]: Finished difference Result 17102 states and 20603 transitions. [2021-01-06 19:30:16,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:16,054 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 110 [2021-01-06 19:30:16,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:16,079 INFO L225 Difference]: With dead ends: 17102 [2021-01-06 19:30:16,079 INFO L226 Difference]: Without dead ends: 9662 [2021-01-06 19:30:16,089 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:16,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9662 states. [2021-01-06 19:30:16,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9662 to 9614. [2021-01-06 19:30:16,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9614 states. [2021-01-06 19:30:16,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9614 states to 9614 states and 11518 transitions. [2021-01-06 19:30:16,895 INFO L78 Accepts]: Start accepts. Automaton has 9614 states and 11518 transitions. Word has length 110 [2021-01-06 19:30:16,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:16,895 INFO L481 AbstractCegarLoop]: Abstraction has 9614 states and 11518 transitions. [2021-01-06 19:30:16,896 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:16,896 INFO L276 IsEmpty]: Start isEmpty. Operand 9614 states and 11518 transitions. [2021-01-06 19:30:16,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-01-06 19:30:16,902 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:16,903 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:16,903 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 19:30:16,903 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:16,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:16,904 INFO L82 PathProgramCache]: Analyzing trace with hash 577449217, now seen corresponding path program 1 times [2021-01-06 19:30:16,904 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:16,904 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006561523] [2021-01-06 19:30:16,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:16,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:16,965 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:16,966 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006561523] [2021-01-06 19:30:16,966 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:16,966 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:30:16,966 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849262671] [2021-01-06 19:30:16,967 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:30:16,967 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:16,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:30:16,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:30:16,968 INFO L87 Difference]: Start difference. First operand 9614 states and 11518 transitions. Second operand 4 states. [2021-01-06 19:30:17,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:17,701 INFO L93 Difference]: Finished difference Result 17020 states and 20462 transitions. [2021-01-06 19:30:17,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:30:17,702 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2021-01-06 19:30:17,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:17,725 INFO L225 Difference]: With dead ends: 17020 [2021-01-06 19:30:17,726 INFO L226 Difference]: Without dead ends: 9616 [2021-01-06 19:30:17,737 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:17,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9616 states. [2021-01-06 19:30:18,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9616 to 9614. [2021-01-06 19:30:18,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9614 states. [2021-01-06 19:30:18,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9614 states to 9614 states and 11476 transitions. [2021-01-06 19:30:18,429 INFO L78 Accepts]: Start accepts. Automaton has 9614 states and 11476 transitions. Word has length 113 [2021-01-06 19:30:18,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:18,430 INFO L481 AbstractCegarLoop]: Abstraction has 9614 states and 11476 transitions. [2021-01-06 19:30:18,430 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:30:18,430 INFO L276 IsEmpty]: Start isEmpty. Operand 9614 states and 11476 transitions. [2021-01-06 19:30:18,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-01-06 19:30:18,438 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:18,439 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:18,439 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 19:30:18,439 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:18,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:18,440 INFO L82 PathProgramCache]: Analyzing trace with hash 163247736, now seen corresponding path program 1 times [2021-01-06 19:30:18,440 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:18,440 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347483753] [2021-01-06 19:30:18,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:18,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:18,495 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2021-01-06 19:30:18,495 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347483753] [2021-01-06 19:30:18,496 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:18,496 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 19:30:18,496 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138781348] [2021-01-06 19:30:18,496 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:18,497 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:18,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:18,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:18,497 INFO L87 Difference]: Start difference. First operand 9614 states and 11476 transitions. Second operand 3 states. [2021-01-06 19:30:19,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:19,434 INFO L93 Difference]: Finished difference Result 21076 states and 25107 transitions. [2021-01-06 19:30:19,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:19,435 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 142 [2021-01-06 19:30:19,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:19,462 INFO L225 Difference]: With dead ends: 21076 [2021-01-06 19:30:19,463 INFO L226 Difference]: Without dead ends: 11504 [2021-01-06 19:30:19,476 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:19,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11504 states. [2021-01-06 19:30:20,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11504 to 11440. [2021-01-06 19:30:20,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-01-06 19:30:20,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13564 transitions. [2021-01-06 19:30:20,296 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13564 transitions. Word has length 142 [2021-01-06 19:30:20,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:20,297 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13564 transitions. [2021-01-06 19:30:20,297 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:20,297 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13564 transitions. [2021-01-06 19:30:20,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-01-06 19:30:20,308 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:20,309 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:20,309 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 19:30:20,309 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:20,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:20,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1331585155, now seen corresponding path program 1 times [2021-01-06 19:30:20,310 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:20,310 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293822245] [2021-01-06 19:30:20,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:20,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:20,365 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:20,365 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293822245] [2021-01-06 19:30:20,365 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:20,366 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 19:30:20,366 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137738810] [2021-01-06 19:30:20,366 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 19:30:20,366 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:20,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 19:30:20,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 19:30:20,367 INFO L87 Difference]: Start difference. First operand 11440 states and 13564 transitions. Second operand 4 states. [2021-01-06 19:30:21,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:21,015 INFO L93 Difference]: Finished difference Result 20966 states and 24946 transitions. [2021-01-06 19:30:21,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 19:30:21,016 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2021-01-06 19:30:21,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:21,042 INFO L225 Difference]: With dead ends: 20966 [2021-01-06 19:30:21,042 INFO L226 Difference]: Without dead ends: 11442 [2021-01-06 19:30:21,056 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 19:30:21,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11442 states. [2021-01-06 19:30:21,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11442 to 11440. [2021-01-06 19:30:21,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-01-06 19:30:21,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13484 transitions. [2021-01-06 19:30:21,959 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13484 transitions. Word has length 145 [2021-01-06 19:30:21,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:21,960 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13484 transitions. [2021-01-06 19:30:21,960 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 19:30:21,960 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13484 transitions. [2021-01-06 19:30:21,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2021-01-06 19:30:21,974 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:21,974 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:21,974 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 19:30:21,975 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:21,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:21,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1031093230, now seen corresponding path program 1 times [2021-01-06 19:30:21,976 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:21,976 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728410333] [2021-01-06 19:30:21,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:21,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:22,053 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:22,053 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1728410333] [2021-01-06 19:30:22,054 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:22,054 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:22,054 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470586271] [2021-01-06 19:30:22,055 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:22,055 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:22,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:22,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:22,056 INFO L87 Difference]: Start difference. First operand 11440 states and 13484 transitions. Second operand 3 states. [2021-01-06 19:30:22,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:22,773 INFO L93 Difference]: Finished difference Result 19782 states and 23399 transitions. [2021-01-06 19:30:22,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:22,774 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 174 [2021-01-06 19:30:22,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:22,799 INFO L225 Difference]: With dead ends: 19782 [2021-01-06 19:30:22,799 INFO L226 Difference]: Without dead ends: 11472 [2021-01-06 19:30:22,813 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:22,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11472 states. [2021-01-06 19:30:23,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11472 to 11440. [2021-01-06 19:30:23,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-01-06 19:30:23,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13276 transitions. [2021-01-06 19:30:23,599 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13276 transitions. Word has length 174 [2021-01-06 19:30:23,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:23,600 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13276 transitions. [2021-01-06 19:30:23,600 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:23,600 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13276 transitions. [2021-01-06 19:30:23,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2021-01-06 19:30:23,613 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:23,613 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:23,613 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 19:30:23,614 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:23,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:23,614 INFO L82 PathProgramCache]: Analyzing trace with hash 807546521, now seen corresponding path program 1 times [2021-01-06 19:30:23,615 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:23,615 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220880163] [2021-01-06 19:30:23,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:23,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:23,693 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:23,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220880163] [2021-01-06 19:30:23,694 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:23,694 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:23,694 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747854479] [2021-01-06 19:30:23,695 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:23,695 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:23,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:23,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:23,696 INFO L87 Difference]: Start difference. First operand 11440 states and 13276 transitions. Second operand 3 states. [2021-01-06 19:30:24,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:24,435 INFO L93 Difference]: Finished difference Result 18390 states and 21415 transitions. [2021-01-06 19:30:24,436 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:24,436 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 176 [2021-01-06 19:30:24,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:24,456 INFO L225 Difference]: With dead ends: 18390 [2021-01-06 19:30:24,457 INFO L226 Difference]: Without dead ends: 11440 [2021-01-06 19:30:24,467 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:24,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11440 states. [2021-01-06 19:30:25,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11440 to 11410. [2021-01-06 19:30:25,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11410 states. [2021-01-06 19:30:25,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11410 states to 11410 states and 13082 transitions. [2021-01-06 19:30:25,171 INFO L78 Accepts]: Start accepts. Automaton has 11410 states and 13082 transitions. Word has length 176 [2021-01-06 19:30:25,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:25,171 INFO L481 AbstractCegarLoop]: Abstraction has 11410 states and 13082 transitions. [2021-01-06 19:30:25,171 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:25,171 INFO L276 IsEmpty]: Start isEmpty. Operand 11410 states and 13082 transitions. [2021-01-06 19:30:25,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2021-01-06 19:30:25,182 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:25,182 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:25,182 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 19:30:25,182 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:25,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:25,183 INFO L82 PathProgramCache]: Analyzing trace with hash 251088387, now seen corresponding path program 1 times [2021-01-06 19:30:25,183 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:25,183 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052137035] [2021-01-06 19:30:25,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:25,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:25,239 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-01-06 19:30:25,239 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052137035] [2021-01-06 19:30:25,239 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:25,239 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:25,239 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985843584] [2021-01-06 19:30:25,240 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:25,240 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:25,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:25,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:25,241 INFO L87 Difference]: Start difference. First operand 11410 states and 13082 transitions. Second operand 3 states. [2021-01-06 19:30:25,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:25,831 INFO L93 Difference]: Finished difference Result 22664 states and 25781 transitions. [2021-01-06 19:30:25,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:25,831 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 178 [2021-01-06 19:30:25,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:25,839 INFO L225 Difference]: With dead ends: 22664 [2021-01-06 19:30:25,840 INFO L226 Difference]: Without dead ends: 6788 [2021-01-06 19:30:25,850 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:25,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6788 states. [2021-01-06 19:30:26,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6788 to 6580. [2021-01-06 19:30:26,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6580 states. [2021-01-06 19:30:26,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6580 states to 6580 states and 7246 transitions. [2021-01-06 19:30:26,560 INFO L78 Accepts]: Start accepts. Automaton has 6580 states and 7246 transitions. Word has length 178 [2021-01-06 19:30:26,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:26,563 INFO L481 AbstractCegarLoop]: Abstraction has 6580 states and 7246 transitions. [2021-01-06 19:30:26,563 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:26,563 INFO L276 IsEmpty]: Start isEmpty. Operand 6580 states and 7246 transitions. [2021-01-06 19:30:26,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2021-01-06 19:30:26,572 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:26,572 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:26,572 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 19:30:26,573 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:26,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:26,573 INFO L82 PathProgramCache]: Analyzing trace with hash -32931800, now seen corresponding path program 1 times [2021-01-06 19:30:26,573 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:26,573 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711835727] [2021-01-06 19:30:26,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:26,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 19:30:26,745 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 19:30:26,745 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711835727] [2021-01-06 19:30:26,746 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 19:30:26,746 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 19:30:26,746 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859088317] [2021-01-06 19:30:26,747 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 19:30:26,747 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 19:30:26,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 19:30:26,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:26,748 INFO L87 Difference]: Start difference. First operand 6580 states and 7246 transitions. Second operand 3 states. [2021-01-06 19:30:27,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 19:30:27,222 INFO L93 Difference]: Finished difference Result 11554 states and 12749 transitions. [2021-01-06 19:30:27,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 19:30:27,223 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2021-01-06 19:30:27,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 19:30:27,230 INFO L225 Difference]: With dead ends: 11554 [2021-01-06 19:30:27,230 INFO L226 Difference]: Without dead ends: 6580 [2021-01-06 19:30:27,234 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 19:30:27,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6580 states. [2021-01-06 19:30:27,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6580 to 6580. [2021-01-06 19:30:27,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6580 states. [2021-01-06 19:30:27,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6580 states to 6580 states and 7168 transitions. [2021-01-06 19:30:27,795 INFO L78 Accepts]: Start accepts. Automaton has 6580 states and 7168 transitions. Word has length 180 [2021-01-06 19:30:27,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 19:30:27,796 INFO L481 AbstractCegarLoop]: Abstraction has 6580 states and 7168 transitions. [2021-01-06 19:30:27,796 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 19:30:27,796 INFO L276 IsEmpty]: Start isEmpty. Operand 6580 states and 7168 transitions. [2021-01-06 19:30:27,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2021-01-06 19:30:27,805 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 19:30:27,805 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 19:30:27,805 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 19:30:27,805 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 19:30:27,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 19:30:27,806 INFO L82 PathProgramCache]: Analyzing trace with hash 1382104249, now seen corresponding path program 1 times [2021-01-06 19:30:27,806 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 19:30:27,806 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908526500] [2021-01-06 19:30:27,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 19:30:27,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-06 19:30:27,839 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-06 19:30:27,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-06 19:30:27,872 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-06 19:30:27,985 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-06 19:30:27,985 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2021-01-06 19:30:27,986 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 19:30:28,176 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.01 07:30:28 BoogieIcfgContainer [2021-01-06 19:30:28,176 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-06 19:30:28,177 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-01-06 19:30:28,177 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-01-06 19:30:28,177 INFO L275 PluginConnector]: Witness Printer initialized [2021-01-06 19:30:28,178 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 07:30:06" (3/4) ... [2021-01-06 19:30:28,180 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-01-06 19:30:28,373 INFO L141 WitnessManager]: Wrote witness to /storage/repos/svcomp/c/systemc/transmitter.03.cil.c-witness.graphml [2021-01-06 19:30:28,374 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-01-06 19:30:28,376 INFO L168 Benchmark]: Toolchain (without parser) took 23807.96 ms. Allocated memory was 164.6 MB in the beginning and 2.3 GB in the end (delta: 2.2 GB). Free memory was 140.4 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 811.5 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,377 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 164.6 MB. Free memory is still 135.8 MB. There was no memory consumed. Max. memory is 8.0 GB. [2021-01-06 19:30:28,379 INFO L168 Benchmark]: CACSL2BoogieTranslator took 427.89 ms. Allocated memory is still 164.6 MB. Free memory was 140.2 MB in the beginning and 125.3 MB in the end (delta: 14.9 MB). Peak memory consumption was 14.7 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,379 INFO L168 Benchmark]: Boogie Procedure Inliner took 73.37 ms. Allocated memory is still 164.6 MB. Free memory was 125.3 MB in the beginning and 121.8 MB in the end (delta: 3.6 MB). Peak memory consumption was 3.1 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,379 INFO L168 Benchmark]: Boogie Preprocessor took 70.61 ms. Allocated memory is still 164.6 MB. Free memory was 121.8 MB in the beginning and 118.8 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.1 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,380 INFO L168 Benchmark]: RCFGBuilder took 1561.77 ms. Allocated memory is still 164.6 MB. Free memory was 118.8 MB in the beginning and 87.5 MB in the end (delta: 31.3 MB). Peak memory consumption was 30.8 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,381 INFO L168 Benchmark]: TraceAbstraction took 21465.28 ms. Allocated memory was 164.6 MB in the beginning and 2.3 GB in the end (delta: 2.2 GB). Free memory was 86.9 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 729.3 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,381 INFO L168 Benchmark]: Witness Printer took 196.91 ms. Allocated memory is still 2.3 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 28.8 MB). Peak memory consumption was 28.3 MB. Max. memory is 8.0 GB. [2021-01-06 19:30:28,386 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 164.6 MB. Free memory is still 135.8 MB. There was no memory consumed. Max. memory is 8.0 GB. * CACSL2BoogieTranslator took 427.89 ms. Allocated memory is still 164.6 MB. Free memory was 140.2 MB in the beginning and 125.3 MB in the end (delta: 14.9 MB). Peak memory consumption was 14.7 MB. Max. memory is 8.0 GB. * Boogie Procedure Inliner took 73.37 ms. Allocated memory is still 164.6 MB. Free memory was 125.3 MB in the beginning and 121.8 MB in the end (delta: 3.6 MB). Peak memory consumption was 3.1 MB. Max. memory is 8.0 GB. * Boogie Preprocessor took 70.61 ms. Allocated memory is still 164.6 MB. Free memory was 121.8 MB in the beginning and 118.8 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.1 MB. Max. memory is 8.0 GB. * RCFGBuilder took 1561.77 ms. Allocated memory is still 164.6 MB. Free memory was 118.8 MB in the beginning and 87.5 MB in the end (delta: 31.3 MB). Peak memory consumption was 30.8 MB. Max. memory is 8.0 GB. * TraceAbstraction took 21465.28 ms. Allocated memory was 164.6 MB in the beginning and 2.3 GB in the end (delta: 2.2 GB). Free memory was 86.9 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 729.3 MB. Max. memory is 8.0 GB. * Witness Printer took 196.91 ms. Allocated memory is still 2.3 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 28.8 MB). Peak memory consumption was 28.3 MB. Max. memory is 8.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 13]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int m_pc = 0; [L18] int t1_pc = 0; [L19] int t2_pc = 0; [L20] int t3_pc = 0; [L21] int m_st ; [L22] int t1_st ; [L23] int t2_st ; [L24] int t3_st ; [L25] int m_i ; [L26] int t1_i ; [L27] int t2_i ; [L28] int t3_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int E_1 = 2; [L34] int E_2 = 2; [L35] int E_3 = 2; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L689] int __retres1 ; [L602] m_i = 1 [L603] t1_i = 1 [L604] t2_i = 1 [L605] t3_i = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L630] int kernel_st ; [L631] int tmp ; [L632] int tmp___0 ; [L636] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L273] COND TRUE m_i == 1 [L274] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L278] COND TRUE t1_i == 1 [L279] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L283] COND TRUE t2_i == 1 [L284] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L288] COND TRUE t3_i == 1 [L289] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L410] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L415] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L420] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L425] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L430] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L435] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L440] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L189] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L199] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L201] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L205] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L208] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L218] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L220] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L224] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L227] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L237] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L239] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L243] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L246] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L256] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L258] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L453] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L458] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L463] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L468] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L473] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L478] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L483] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L644] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L647] kernel_st = 1 [L329] int tmp ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L333] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L298] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L301] COND TRUE m_st == 0 [L302] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L324] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L336] tmp = exists_runnable_thread() [L338] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L343] COND TRUE m_st == 0 [L344] int tmp_ndt_1; [L345] tmp_ndt_1 = __VERIFIER_nondet_int() [L346] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L357] COND TRUE t1_st == 0 [L358] int tmp_ndt_2; [L359] tmp_ndt_2 = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp_ndt_2) [L362] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L86] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L97] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L99] t1_pc = 1 [L100] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L371] COND TRUE t2_st == 0 [L372] int tmp_ndt_3; [L373] tmp_ndt_3 = __VERIFIER_nondet_int() [L374] COND TRUE \read(tmp_ndt_3) [L376] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L121] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L132] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L134] t2_pc = 1 [L135] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L385] COND TRUE t3_st == 0 [L386] int tmp_ndt_4; [L387] tmp_ndt_4 = __VERIFIER_nondet_int() [L388] COND TRUE \read(tmp_ndt_4) [L390] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L156] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L167] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L169] t3_pc = 1 [L170] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L333] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L298] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L301] COND TRUE m_st == 0 [L302] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L324] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L336] tmp = exists_runnable_thread() [L338] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L343] COND TRUE m_st == 0 [L344] int tmp_ndt_1; [L345] tmp_ndt_1 = __VERIFIER_nondet_int() [L346] COND TRUE \read(tmp_ndt_1) [L348] m_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L45] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L56] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L59] E_1 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND TRUE E_1 == 1 [L210] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND TRUE \read(tmp___0) [L511] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L61] E_1 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L64] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L66] m_pc = 1 [L67] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L357] COND TRUE t1_st == 0 [L358] int tmp_ndt_2; [L359] tmp_ndt_2 = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp_ndt_2) [L362] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L86] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L89] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L105] E_2 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L190] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND TRUE E_2 == 1 [L229] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND TRUE \read(tmp___1) [L519] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L107] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L97] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L99] t1_pc = 1 [L100] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L371] COND TRUE t2_st == 0 [L372] int tmp_ndt_3; [L373] tmp_ndt_3 = __VERIFIER_nondet_int() [L374] COND TRUE \read(tmp_ndt_3) [L376] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L121] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L124] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L140] E_3 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L190] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND TRUE E_3 == 1 [L248] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND TRUE \read(tmp___2) [L527] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L142] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L132] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L134] t2_pc = 1 [L135] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L385] COND TRUE t3_st == 0 [L386] int tmp_ndt_4; [L387] tmp_ndt_4 = __VERIFIER_nondet_int() [L388] COND TRUE \read(tmp_ndt_4) [L390] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L156] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L159] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L13] reach_error() VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 276 locations, 1 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 21.2s, OverallIterations: 27, TraceHistogramMax: 2, AutomataDifference: 10.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 10841 SDtfs, 11167 SDslu, 8647 SDs, 0 SdLazy, 600 SolverSat, 245 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 93 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11440occurred in iteration=21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 2370 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 2526 NumberOfCodeBlocks, 2526 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 2318 ConstructedInterpolants, 0 QuantifiedInterpolants, 405898 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 171/171 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...