extern void abort(void); extern void __assert_fail(const char *, const char *, unsigned int, const char *) __attribute__ ((__nothrow__ , __leaf__)) __attribute__ ((__noreturn__)); void reach_error() { __assert_fail("0", "drivers--gpu--drm--i915--i915.ko_082.3c4fdcf.39_7a.cil_true-unreach-call.i", 3, "reach_error"); } /* Generated by CIL v. 1.5.1 */ /* print_CIL_Input is false */ typedef __builtin_va_list __gnuc_va_list[1U]; typedef __gnuc_va_list va_list[1U]; typedef unsigned int __kernel_mode_t; typedef unsigned long __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; typedef unsigned long __kernel_size_t; typedef long __kernel_ssize_t; typedef long __kernel_time_t; typedef long __kernel_clock_t; typedef int __kernel_timer_t; typedef int __kernel_clockid_t; typedef long long __kernel_loff_t; typedef __kernel_uid_t __kernel_uid32_t; typedef __kernel_gid_t __kernel_gid32_t; typedef signed char __s8; typedef short __s16; typedef unsigned short __u16; typedef int __s32; typedef unsigned int __u32; typedef long long __s64; typedef unsigned long long __u64; typedef signed char s8; typedef unsigned char u8; typedef unsigned short u16; typedef int s32; typedef unsigned int u32; typedef long long s64; typedef unsigned long long u64; typedef unsigned short umode_t; typedef u64 dma_addr_t; typedef __u32 __kernel_dev_t; typedef __kernel_dev_t dev_t; typedef __kernel_mode_t mode_t; typedef __kernel_nlink_t nlink_t; typedef __kernel_off_t off_t; typedef __kernel_pid_t pid_t; typedef __kernel_timer_t timer_t; typedef __kernel_clockid_t clockid_t; typedef _Bool bool; typedef __kernel_uid32_t uid_t; typedef __kernel_gid32_t gid_t; typedef __kernel_loff_t loff_t; typedef __kernel_size_t size_t; typedef __kernel_ssize_t ssize_t; typedef __kernel_time_t time_t; typedef __kernel_clock_t clock_t; typedef __u32 uint32_t; typedef __u64 uint64_t; typedef unsigned long sector_t; typedef unsigned long blkcnt_t; typedef unsigned int gfp_t; typedef unsigned int fmode_t; typedef u64 phys_addr_t; typedef phys_addr_t resource_size_t; struct module; struct bug_entry { unsigned long bug_addr ; char const *file ; unsigned short line ; unsigned short flags ; }; struct completion; struct pt_regs; struct pid; struct timespec; struct compat_timespec; struct __anonstruct_ldv_1569_4 { unsigned long arg0 ; unsigned long arg1 ; unsigned long arg2 ; unsigned long arg3 ; }; struct __anonstruct_futex_5 { u32 *uaddr ; u32 val ; u32 flags ; u32 bitset ; u64 time ; }; struct __anonstruct_nanosleep_6 { clockid_t index ; struct timespec *rmtp ; struct compat_timespec *compat_rmtp ; u64 expires ; }; struct pollfd; struct __anonstruct_poll_7 { struct pollfd *ufds ; int nfds ; int has_timeout ; unsigned long tv_sec ; unsigned long tv_nsec ; }; union __anonunion_ldv_1591_3 { struct __anonstruct_ldv_1569_4 ldv_1569 ; struct __anonstruct_futex_5 futex ; struct __anonstruct_nanosleep_6 nanosleep ; struct __anonstruct_poll_7 poll ; }; struct restart_block { long (*fn)(struct restart_block * ) ; union __anonunion_ldv_1591_3 ldv_1591 ; }; typedef unsigned long pgdval_t; typedef unsigned long pgprotval_t; struct page; struct __anonstruct_pgd_t_9 { pgdval_t pgd ; }; typedef struct __anonstruct_pgd_t_9 pgd_t; struct __anonstruct_pgprot_t_10 { pgprotval_t pgprot ; }; typedef struct __anonstruct_pgprot_t_10 pgprot_t; struct __anonstruct_ldv_1703_14 { unsigned int a ; unsigned int b ; }; struct __anonstruct_ldv_1718_15 { u16 limit0 ; u16 base0 ; unsigned char base1 ; unsigned char type : 4 ; unsigned char s : 1 ; unsigned char dpl : 2 ; unsigned char p : 1 ; unsigned char limit : 4 ; unsigned char avl : 1 ; unsigned char l : 1 ; unsigned char d : 1 ; unsigned char g : 1 ; unsigned char base2 ; }; union __anonunion_ldv_1719_13 { struct __anonstruct_ldv_1703_14 ldv_1703 ; struct __anonstruct_ldv_1718_15 ldv_1718 ; }; struct desc_struct { union __anonunion_ldv_1719_13 ldv_1719 ; }; struct cpumask { unsigned long bits[1U] ; }; typedef struct cpumask cpumask_t; struct thread_struct; struct mm_struct; struct raw_spinlock; struct task_struct; struct exec_domain; struct pt_regs { unsigned long r15 ; unsigned long r14 ; unsigned long r13 ; unsigned long r12 ; unsigned long bp ; unsigned long bx ; unsigned long r11 ; unsigned long r10 ; unsigned long r9 ; unsigned long r8 ; unsigned long ax ; unsigned long cx ; unsigned long dx ; unsigned long si ; unsigned long di ; unsigned long orig_ax ; unsigned long ip ; unsigned long cs ; unsigned long flags ; unsigned long sp ; unsigned long ss ; }; struct info { long ___orig_eip ; long ___ebx ; long ___ecx ; long ___edx ; long ___esi ; long ___edi ; long ___ebp ; long ___eax ; long ___ds ; long ___es ; long ___fs ; long ___orig_eax ; long ___eip ; long ___cs ; long ___eflags ; long ___esp ; long ___ss ; long ___vm86_es ; long ___vm86_ds ; long ___vm86_fs ; long ___vm86_gs ; }; struct map_segment; struct exec_domain { char const *name ; void (*handler)(int , struct pt_regs * ) ; unsigned char pers_low ; unsigned char pers_high ; unsigned long *signal_map ; unsigned long *signal_invmap ; struct map_segment *err_map ; struct map_segment *socktype_map ; struct map_segment *sockopt_map ; struct map_segment *af_map ; struct module *module ; struct exec_domain *next ; }; struct i387_fsave_struct { u32 cwd ; u32 swd ; u32 twd ; u32 fip ; u32 fcs ; u32 foo ; u32 fos ; u32 st_space[20U] ; u32 status ; }; struct __anonstruct_ldv_4559_18 { u64 rip ; u64 rdp ; }; struct __anonstruct_ldv_4565_19 { u32 fip ; u32 fcs ; u32 foo ; u32 fos ; }; union __anonunion_ldv_4566_17 { struct __anonstruct_ldv_4559_18 ldv_4559 ; struct __anonstruct_ldv_4565_19 ldv_4565 ; }; union __anonunion_ldv_4575_20 { u32 padding1[12U] ; u32 sw_reserved[12U] ; }; struct i387_fxsave_struct { u16 cwd ; u16 swd ; u16 twd ; u16 fop ; union __anonunion_ldv_4566_17 ldv_4566 ; u32 mxcsr ; u32 mxcsr_mask ; u32 st_space[32U] ; u32 xmm_space[64U] ; u32 padding[12U] ; union __anonunion_ldv_4575_20 ldv_4575 ; }; struct i387_soft_struct { u32 cwd ; u32 swd ; u32 twd ; u32 fip ; u32 fcs ; u32 foo ; u32 fos ; u32 st_space[20U] ; u8 ftop ; u8 changed ; u8 lookahead ; u8 no_update ; u8 rm ; u8 alimit ; struct info *info ; u32 entry_eip ; }; struct xsave_hdr_struct { u64 xstate_bv ; u64 reserved1[2U] ; u64 reserved2[5U] ; }; struct xsave_struct { struct i387_fxsave_struct i387 ; struct xsave_hdr_struct xsave_hdr ; }; union thread_xstate { struct i387_fsave_struct fsave ; struct i387_fxsave_struct fxsave ; struct i387_soft_struct soft ; struct xsave_struct xsave ; }; struct kmem_cache; struct thread_struct { struct desc_struct tls_array[3U] ; unsigned long sp0 ; unsigned long sp ; unsigned long usersp ; unsigned short es ; unsigned short ds ; unsigned short fsindex ; unsigned short gsindex ; unsigned long ip ; unsigned long fs ; unsigned long gs ; unsigned long debugreg0 ; unsigned long debugreg1 ; unsigned long debugreg2 ; unsigned long debugreg3 ; unsigned long debugreg6 ; unsigned long debugreg7 ; unsigned long cr2 ; unsigned long trap_no ; unsigned long error_code ; union thread_xstate *xstate ; unsigned long *io_bitmap_ptr ; unsigned long iopl ; unsigned int io_bitmap_max ; unsigned long debugctlmsr ; }; struct __anonstruct_mm_segment_t_21 { unsigned long seg ; }; typedef struct __anonstruct_mm_segment_t_21 mm_segment_t; struct thread_info { struct task_struct *task ; struct exec_domain *exec_domain ; unsigned long flags ; __u32 status ; __u32 cpu ; int preempt_count ; mm_segment_t addr_limit ; struct restart_block restart_block ; void *sysenter_return ; }; struct list_head { struct list_head *next ; struct list_head *prev ; }; struct hlist_node; struct hlist_head { struct hlist_node *first ; }; struct hlist_node { struct hlist_node *next ; struct hlist_node **pprev ; }; struct raw_spinlock { unsigned int slock ; }; typedef struct raw_spinlock raw_spinlock_t; struct __anonstruct_raw_rwlock_t_22 { unsigned int lock ; }; typedef struct __anonstruct_raw_rwlock_t_22 raw_rwlock_t; struct lockdep_map; struct stack_trace { unsigned int nr_entries ; unsigned int max_entries ; unsigned long *entries ; int skip ; }; struct lockdep_subclass_key { char __one_byte ; }; struct lock_class_key { struct lockdep_subclass_key subkeys[8U] ; }; struct lock_class { struct list_head hash_entry ; struct list_head lock_entry ; struct lockdep_subclass_key *key ; unsigned int subclass ; unsigned int dep_gen_id ; unsigned long usage_mask ; struct stack_trace usage_traces[9U] ; struct list_head locks_after ; struct list_head locks_before ; unsigned int version ; unsigned long ops ; char const *name ; int name_version ; unsigned long contention_point[4U] ; }; struct lockdep_map { struct lock_class_key *key ; struct lock_class *class_cache ; char const *name ; int cpu ; }; struct held_lock { u64 prev_chain_key ; unsigned long acquire_ip ; struct lockdep_map *instance ; struct lockdep_map *nest_lock ; u64 waittime_stamp ; u64 holdtime_stamp ; unsigned short class_idx : 13 ; unsigned char irq_context : 2 ; unsigned char trylock : 1 ; unsigned char read : 2 ; unsigned char check : 2 ; unsigned char hardirqs_off : 1 ; }; struct __anonstruct_spinlock_t_23 { raw_spinlock_t raw_lock ; unsigned int magic ; unsigned int owner_cpu ; void *owner ; struct lockdep_map dep_map ; }; typedef struct __anonstruct_spinlock_t_23 spinlock_t; struct __anonstruct_rwlock_t_24 { raw_rwlock_t raw_lock ; unsigned int magic ; unsigned int owner_cpu ; void *owner ; struct lockdep_map dep_map ; }; typedef struct __anonstruct_rwlock_t_24 rwlock_t; struct __anonstruct_atomic_t_25 { int counter ; }; typedef struct __anonstruct_atomic_t_25 atomic_t; struct __anonstruct_atomic64_t_26 { long counter ; }; typedef struct __anonstruct_atomic64_t_26 atomic64_t; typedef atomic64_t atomic_long_t; struct timespec { time_t tv_sec ; long tv_nsec ; }; struct kstat { u64 ino ; dev_t dev ; umode_t mode ; unsigned int nlink ; uid_t uid ; gid_t gid ; dev_t rdev ; loff_t size ; struct timespec atime ; struct timespec mtime ; struct timespec ctime ; unsigned long blksize ; unsigned long long blocks ; }; struct __wait_queue; typedef struct __wait_queue wait_queue_t; struct __wait_queue { unsigned int flags ; void *private ; int (*func)(wait_queue_t * , unsigned int , int , void * ) ; struct list_head task_list ; }; struct __wait_queue_head { spinlock_t lock ; struct list_head task_list ; }; typedef struct __wait_queue_head wait_queue_head_t; struct __anonstruct_nodemask_t_28 { unsigned long bits[1U] ; }; typedef struct __anonstruct_nodemask_t_28 nodemask_t; struct mutex { atomic_t count ; spinlock_t wait_lock ; struct list_head wait_list ; struct thread_info *owner ; char const *name ; void *magic ; struct lockdep_map dep_map ; }; struct mutex_waiter { struct list_head list ; struct task_struct *task ; struct mutex *lock ; void *magic ; }; struct rw_semaphore; struct rw_semaphore { __s32 activity ; spinlock_t wait_lock ; struct list_head wait_list ; struct lockdep_map dep_map ; }; struct file; struct device; struct pm_message { int event ; }; typedef struct pm_message pm_message_t; struct pm_ops { int (*prepare)(struct device * ) ; void (*complete)(struct device * ) ; int (*suspend)(struct device * ) ; int (*resume)(struct device * ) ; int (*freeze)(struct device * ) ; int (*thaw)(struct device * ) ; int (*poweroff)(struct device * ) ; int (*restore)(struct device * ) ; }; struct pm_ext_ops { struct pm_ops base ; int (*suspend_noirq)(struct device * ) ; int (*resume_noirq)(struct device * ) ; int (*freeze_noirq)(struct device * ) ; int (*thaw_noirq)(struct device * ) ; int (*poweroff_noirq)(struct device * ) ; int (*restore_noirq)(struct device * ) ; }; enum dpm_state { DPM_INVALID = 0, DPM_ON = 1, DPM_PREPARING = 2, DPM_RESUMING = 3, DPM_SUSPENDING = 4, DPM_OFF = 5, DPM_OFF_IRQ = 6 } ; struct dev_pm_info { pm_message_t power_state ; unsigned char can_wakeup : 1 ; unsigned char should_wakeup : 1 ; enum dpm_state status ; struct list_head entry ; }; struct __anonstruct_mm_context_t_76 { void *ldt ; int size ; struct mutex lock ; void *vdso ; }; typedef struct __anonstruct_mm_context_t_76 mm_context_t; struct pci_bus; struct vm_area_struct; struct key; typedef __u64 Elf64_Addr; typedef __u16 Elf64_Half; typedef __u32 Elf64_Word; typedef __u64 Elf64_Xword; struct elf64_sym { Elf64_Word st_name ; unsigned char st_info ; unsigned char st_other ; Elf64_Half st_shndx ; Elf64_Addr st_value ; Elf64_Xword st_size ; }; typedef struct elf64_sym Elf64_Sym; struct kobject; struct attribute { char const *name ; struct module *owner ; mode_t mode ; }; struct attribute_group { char const *name ; mode_t (*is_visible)(struct kobject * , struct attribute * , int ) ; struct attribute **attrs ; }; struct bin_attribute { struct attribute attr ; size_t size ; void *private ; ssize_t (*read)(struct kobject * , struct bin_attribute * , char * , loff_t , size_t ) ; ssize_t (*write)(struct kobject * , struct bin_attribute * , char * , loff_t , size_t ) ; int (*mmap)(struct kobject * , struct bin_attribute * , struct vm_area_struct * ) ; }; struct sysfs_ops { ssize_t (*show)(struct kobject * , struct attribute * , char * ) ; ssize_t (*store)(struct kobject * , struct attribute * , char const * , size_t ) ; }; struct sysfs_dirent; struct kref { atomic_t refcount ; }; struct kset; struct kobj_type; struct kobject { char const *name ; struct list_head entry ; struct kobject *parent ; struct kset *kset ; struct kobj_type *ktype ; struct sysfs_dirent *sd ; struct kref kref ; unsigned char state_initialized : 1 ; unsigned char state_in_sysfs : 1 ; unsigned char state_add_uevent_sent : 1 ; unsigned char state_remove_uevent_sent : 1 ; }; struct kobj_type { void (*release)(struct kobject * ) ; struct sysfs_ops *sysfs_ops ; struct attribute **default_attrs ; }; struct kobj_uevent_env { char *envp[32U] ; int envp_idx ; char buf[2048U] ; int buflen ; }; struct kset_uevent_ops { int (*filter)(struct kset * , struct kobject * ) ; char const *(*name)(struct kset * , struct kobject * ) ; int (*uevent)(struct kset * , struct kobject * , struct kobj_uevent_env * ) ; }; struct kset { struct list_head list ; spinlock_t list_lock ; struct kobject kobj ; struct kset_uevent_ops *uevent_ops ; }; struct marker; typedef void marker_probe_func(void * , void * , char const * , va_list * ); struct marker_probe_closure { marker_probe_func *func ; void *probe_private ; }; struct marker { char const *name ; char const *format ; char state ; char ptype ; void (*call)(struct marker const * , void * , ...) ; struct marker_probe_closure single ; struct marker_probe_closure *multi ; }; typedef unsigned long long cycles_t; union ktime { s64 tv64 ; }; typedef union ktime ktime_t; struct tvec_base; struct timer_list { struct list_head entry ; unsigned long expires ; void (*function)(unsigned long ) ; unsigned long data ; struct tvec_base *base ; void *start_site ; char start_comm[16U] ; int start_pid ; }; struct hrtimer; enum hrtimer_restart; struct work_struct; struct work_struct { atomic_long_t data ; struct list_head entry ; void (*func)(struct work_struct * ) ; struct lockdep_map lockdep_map ; }; struct delayed_work { struct work_struct work ; struct timer_list timer ; }; struct kmem_cache_cpu { void **freelist ; struct page *page ; int node ; unsigned int offset ; unsigned int objsize ; unsigned int stat[18U] ; }; struct kmem_cache_node { spinlock_t list_lock ; unsigned long nr_partial ; unsigned long min_partial ; struct list_head partial ; atomic_long_t nr_slabs ; atomic_long_t total_objects ; struct list_head full ; }; struct kmem_cache_order_objects { unsigned long x ; }; struct kmem_cache { unsigned long flags ; int size ; int objsize ; int offset ; struct kmem_cache_order_objects oo ; struct kmem_cache_node local_node ; struct kmem_cache_order_objects max ; struct kmem_cache_order_objects min ; gfp_t allocflags ; int refcount ; void (*ctor)(void * ) ; int inuse ; int align ; char const *name ; struct list_head list ; struct kobject kobj ; int remote_node_defrag_ratio ; struct kmem_cache_node *node[64U] ; struct kmem_cache_cpu *cpu_slab[8U] ; }; struct completion { unsigned int done ; wait_queue_head_t wait ; }; struct rcu_head { struct rcu_head *next ; void (*func)(struct rcu_head * ) ; }; struct tracepoint; struct tracepoint { char const *name ; int state ; void **funcs ; }; struct __anonstruct_local_t_87 { atomic_long_t a ; }; typedef struct __anonstruct_local_t_87 local_t; struct mod_arch_specific { }; struct kernel_symbol { unsigned long value ; char const *name ; }; struct module_attribute { struct attribute attr ; ssize_t (*show)(struct module_attribute * , struct module * , char * ) ; ssize_t (*store)(struct module_attribute * , struct module * , char const * , size_t ) ; void (*setup)(struct module * , char const * ) ; int (*test)(struct module * ) ; void (*free)(struct module * ) ; }; struct module_param_attrs; struct module_kobject { struct kobject kobj ; struct module *mod ; struct kobject *drivers_dir ; struct module_param_attrs *mp ; }; struct exception_table_entry; struct module_ref { local_t count ; }; enum module_state { MODULE_STATE_LIVE = 0, MODULE_STATE_COMING = 1, MODULE_STATE_GOING = 2 } ; struct module_sect_attrs; struct module_notes_attrs; struct module { enum module_state state ; struct list_head list ; char name[56U] ; struct module_kobject mkobj ; struct module_attribute *modinfo_attrs ; char const *version ; char const *srcversion ; struct kobject *holders_dir ; struct kernel_symbol const *syms ; unsigned long const *crcs ; unsigned int num_syms ; unsigned int num_gpl_syms ; struct kernel_symbol const *gpl_syms ; unsigned long const *gpl_crcs ; struct kernel_symbol const *unused_syms ; unsigned long const *unused_crcs ; unsigned int num_unused_syms ; unsigned int num_unused_gpl_syms ; struct kernel_symbol const *unused_gpl_syms ; unsigned long const *unused_gpl_crcs ; struct kernel_symbol const *gpl_future_syms ; unsigned long const *gpl_future_crcs ; unsigned int num_gpl_future_syms ; unsigned int num_exentries ; struct exception_table_entry *extable ; int (*init)(void) ; void *module_init ; void *module_core ; unsigned int init_size ; unsigned int core_size ; unsigned int init_text_size ; unsigned int core_text_size ; void *unwind_info ; struct mod_arch_specific arch ; unsigned int taints ; unsigned int num_bugs ; struct list_head bug_list ; struct bug_entry *bug_table ; Elf64_Sym *symtab ; unsigned int num_symtab ; char *strtab ; struct module_sect_attrs *sect_attrs ; struct module_notes_attrs *notes_attrs ; void *percpu ; char *args ; struct marker *markers ; unsigned int num_markers ; struct tracepoint *tracepoints ; unsigned int num_tracepoints ; struct list_head modules_which_use_me ; struct task_struct *waiter ; void (*exit)(void) ; struct module_ref ref[8U] ; }; struct device_driver; struct file_operations; struct nameidata; struct path; struct vfsmount; struct qstr { unsigned int hash ; unsigned int len ; unsigned char const *name ; }; struct dcookie_struct; struct inode; union __anonunion_d_u_88 { struct list_head d_child ; struct rcu_head d_rcu ; }; struct dentry_operations; struct super_block; struct dentry { atomic_t d_count ; unsigned int d_flags ; spinlock_t d_lock ; struct inode *d_inode ; struct hlist_node d_hash ; struct dentry *d_parent ; struct qstr d_name ; struct list_head d_lru ; union __anonunion_d_u_88 d_u ; struct list_head d_subdirs ; struct list_head d_alias ; unsigned long d_time ; struct dentry_operations *d_op ; struct super_block *d_sb ; void *d_fsdata ; struct dcookie_struct *d_cookie ; int d_mounted ; unsigned char d_iname[36U] ; }; struct dentry_operations { int (*d_revalidate)(struct dentry * , struct nameidata * ) ; int (*d_hash)(struct dentry * , struct qstr * ) ; int (*d_compare)(struct dentry * , struct qstr * , struct qstr * ) ; int (*d_delete)(struct dentry * ) ; void (*d_release)(struct dentry * ) ; void (*d_iput)(struct dentry * , struct inode * ) ; char *(*d_dname)(struct dentry * , char * , int ) ; }; struct path { struct vfsmount *mnt ; struct dentry *dentry ; }; struct radix_tree_node; struct radix_tree_root { unsigned int height ; gfp_t gfp_mask ; struct radix_tree_node *rnode ; }; struct prio_tree_node; struct raw_prio_tree_node { struct prio_tree_node *left ; struct prio_tree_node *right ; struct prio_tree_node *parent ; }; struct prio_tree_node { struct prio_tree_node *left ; struct prio_tree_node *right ; struct prio_tree_node *parent ; unsigned long start ; unsigned long last ; }; struct prio_tree_root { struct prio_tree_node *prio_tree_node ; unsigned short index_bits ; unsigned short raw ; }; enum pid_type { PIDTYPE_PID = 0, PIDTYPE_PGID = 1, PIDTYPE_SID = 2, PIDTYPE_MAX = 3 } ; struct pid_namespace; struct upid { int nr ; struct pid_namespace *ns ; struct hlist_node pid_chain ; }; struct pid { atomic_t count ; unsigned int level ; struct hlist_head tasks[3U] ; struct rcu_head rcu ; struct upid numbers[1U] ; }; struct pid_link { struct hlist_node node ; struct pid *pid ; }; struct kernel_cap_struct { __u32 cap[2U] ; }; typedef struct kernel_cap_struct kernel_cap_t; struct semaphore { spinlock_t lock ; unsigned int count ; struct list_head wait_list ; }; struct fiemap_extent { __u64 fe_logical ; __u64 fe_physical ; __u64 fe_length ; __u64 fe_reserved64[2U] ; __u32 fe_flags ; __u32 fe_reserved[3U] ; }; struct export_operations; struct iovec; struct kiocb; struct pipe_inode_info; struct poll_table_struct; struct kstatfs; struct iattr { unsigned int ia_valid ; umode_t ia_mode ; uid_t ia_uid ; gid_t ia_gid ; loff_t ia_size ; struct timespec ia_atime ; struct timespec ia_mtime ; struct timespec ia_ctime ; struct file *ia_file ; }; struct if_dqblk { __u64 dqb_bhardlimit ; __u64 dqb_bsoftlimit ; __u64 dqb_curspace ; __u64 dqb_ihardlimit ; __u64 dqb_isoftlimit ; __u64 dqb_curinodes ; __u64 dqb_btime ; __u64 dqb_itime ; __u32 dqb_valid ; }; struct if_dqinfo { __u64 dqi_bgrace ; __u64 dqi_igrace ; __u32 dqi_flags ; __u32 dqi_valid ; }; struct fs_disk_quota { __s8 d_version ; __s8 d_flags ; __u16 d_fieldmask ; __u32 d_id ; __u64 d_blk_hardlimit ; __u64 d_blk_softlimit ; __u64 d_ino_hardlimit ; __u64 d_ino_softlimit ; __u64 d_bcount ; __u64 d_icount ; __s32 d_itimer ; __s32 d_btimer ; __u16 d_iwarns ; __u16 d_bwarns ; __s32 d_padding2 ; __u64 d_rtb_hardlimit ; __u64 d_rtb_softlimit ; __u64 d_rtbcount ; __s32 d_rtbtimer ; __u16 d_rtbwarns ; __s16 d_padding3 ; char d_padding4[8U] ; }; struct fs_qfilestat { __u64 qfs_ino ; __u64 qfs_nblks ; __u32 qfs_nextents ; }; typedef struct fs_qfilestat fs_qfilestat_t; struct fs_quota_stat { __s8 qs_version ; __u16 qs_flags ; __s8 qs_pad ; fs_qfilestat_t qs_uquota ; fs_qfilestat_t qs_gquota ; __u32 qs_incoredqs ; __s32 qs_btimelimit ; __s32 qs_itimelimit ; __s32 qs_rtbtimelimit ; __u16 qs_bwarnlimit ; __u16 qs_iwarnlimit ; }; struct v1_mem_dqinfo { }; struct v2_mem_dqinfo { unsigned int dqi_blocks ; unsigned int dqi_free_blk ; unsigned int dqi_free_entry ; }; typedef __kernel_uid32_t qid_t; typedef __u64 qsize_t; struct mem_dqblk { __u32 dqb_bhardlimit ; __u32 dqb_bsoftlimit ; qsize_t dqb_curspace ; __u32 dqb_ihardlimit ; __u32 dqb_isoftlimit ; __u32 dqb_curinodes ; time_t dqb_btime ; time_t dqb_itime ; }; struct quota_format_type; union __anonunion_u_90 { struct v1_mem_dqinfo v1_i ; struct v2_mem_dqinfo v2_i ; }; struct mem_dqinfo { struct quota_format_type *dqi_format ; int dqi_fmt_id ; struct list_head dqi_dirty_list ; unsigned long dqi_flags ; unsigned int dqi_bgrace ; unsigned int dqi_igrace ; qsize_t dqi_maxblimit ; qsize_t dqi_maxilimit ; union __anonunion_u_90 u ; }; struct dquot { struct hlist_node dq_hash ; struct list_head dq_inuse ; struct list_head dq_free ; struct list_head dq_dirty ; struct mutex dq_lock ; atomic_t dq_count ; wait_queue_head_t dq_wait_unused ; struct super_block *dq_sb ; unsigned int dq_id ; loff_t dq_off ; unsigned long dq_flags ; short dq_type ; struct mem_dqblk dq_dqb ; }; struct quota_format_ops { int (*check_quota_file)(struct super_block * , int ) ; int (*read_file_info)(struct super_block * , int ) ; int (*write_file_info)(struct super_block * , int ) ; int (*free_file_info)(struct super_block * , int ) ; int (*read_dqblk)(struct dquot * ) ; int (*commit_dqblk)(struct dquot * ) ; int (*release_dqblk)(struct dquot * ) ; }; struct dquot_operations { int (*initialize)(struct inode * , int ) ; int (*drop)(struct inode * ) ; int (*alloc_space)(struct inode * , qsize_t , int ) ; int (*alloc_inode)(struct inode const * , unsigned long ) ; int (*free_space)(struct inode * , qsize_t ) ; int (*free_inode)(struct inode const * , unsigned long ) ; int (*transfer)(struct inode * , struct iattr * ) ; int (*write_dquot)(struct dquot * ) ; int (*acquire_dquot)(struct dquot * ) ; int (*release_dquot)(struct dquot * ) ; int (*mark_dirty)(struct dquot * ) ; int (*write_info)(struct super_block * , int ) ; }; struct quotactl_ops { int (*quota_on)(struct super_block * , int , int , char * , int ) ; int (*quota_off)(struct super_block * , int , int ) ; int (*quota_sync)(struct super_block * , int ) ; int (*get_info)(struct super_block * , int , struct if_dqinfo * ) ; int (*set_info)(struct super_block * , int , struct if_dqinfo * ) ; int (*get_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ; int (*set_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ; int (*get_xstate)(struct super_block * , struct fs_quota_stat * ) ; int (*set_xstate)(struct super_block * , unsigned int , int ) ; int (*get_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ; int (*set_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ; }; struct quota_format_type { int qf_fmt_id ; struct quota_format_ops *qf_ops ; struct module *qf_owner ; struct quota_format_type *qf_next ; }; struct quota_info { unsigned int flags ; struct mutex dqio_mutex ; struct mutex dqonoff_mutex ; struct rw_semaphore dqptr_sem ; struct inode *files[2U] ; struct mem_dqinfo info[2U] ; struct quota_format_ops *ops[2U] ; }; struct address_space; struct writeback_control; union __anonunion_arg_92 { char *buf ; void *data ; }; struct __anonstruct_read_descriptor_t_91 { size_t written ; size_t count ; union __anonunion_arg_92 arg ; int error ; }; typedef struct __anonstruct_read_descriptor_t_91 read_descriptor_t; struct address_space_operations { int (*writepage)(struct page * , struct writeback_control * ) ; int (*readpage)(struct file * , struct page * ) ; void (*sync_page)(struct page * ) ; int (*writepages)(struct address_space * , struct writeback_control * ) ; int (*set_page_dirty)(struct page * ) ; int (*readpages)(struct file * , struct address_space * , struct list_head * , unsigned int ) ; int (*write_begin)(struct file * , struct address_space * , loff_t , unsigned int , unsigned int , struct page ** , void ** ) ; int (*write_end)(struct file * , struct address_space * , loff_t , unsigned int , unsigned int , struct page * , void * ) ; sector_t (*bmap)(struct address_space * , sector_t ) ; void (*invalidatepage)(struct page * , unsigned long ) ; int (*releasepage)(struct page * , gfp_t ) ; ssize_t (*direct_IO)(int , struct kiocb * , struct iovec const * , loff_t , unsigned long ) ; int (*get_xip_mem)(struct address_space * , unsigned long , int , void ** , unsigned long * ) ; int (*migratepage)(struct address_space * , struct page * , struct page * ) ; int (*launder_page)(struct page * ) ; int (*is_partially_uptodate)(struct page * , read_descriptor_t * , unsigned long ) ; }; struct backing_dev_info; struct address_space { struct inode *host ; struct radix_tree_root page_tree ; spinlock_t tree_lock ; unsigned int i_mmap_writable ; struct prio_tree_root i_mmap ; struct list_head i_mmap_nonlinear ; spinlock_t i_mmap_lock ; unsigned int truncate_count ; unsigned long nrpages ; unsigned long writeback_index ; struct address_space_operations const *a_ops ; unsigned long flags ; struct backing_dev_info *backing_dev_info ; spinlock_t private_lock ; struct list_head private_list ; struct address_space *assoc_mapping ; }; struct hd_struct; struct gendisk; struct block_device { dev_t bd_dev ; struct inode *bd_inode ; int bd_openers ; struct mutex bd_mutex ; struct semaphore bd_mount_sem ; struct list_head bd_inodes ; void *bd_holder ; int bd_holders ; struct list_head bd_holder_list ; struct block_device *bd_contains ; unsigned int bd_block_size ; struct hd_struct *bd_part ; unsigned int bd_part_count ; int bd_invalidated ; struct gendisk *bd_disk ; struct list_head bd_list ; struct backing_dev_info *bd_inode_backing_dev_info ; unsigned long bd_private ; }; struct inode_operations; struct file_lock; struct cdev; union __anonunion_ldv_11089_93 { struct pipe_inode_info *i_pipe ; struct block_device *i_bdev ; struct cdev *i_cdev ; }; struct dnotify_struct; struct inode { struct hlist_node i_hash ; struct list_head i_list ; struct list_head i_sb_list ; struct list_head i_dentry ; unsigned long i_ino ; atomic_t i_count ; unsigned int i_nlink ; uid_t i_uid ; gid_t i_gid ; dev_t i_rdev ; u64 i_version ; loff_t i_size ; struct timespec i_atime ; struct timespec i_mtime ; struct timespec i_ctime ; unsigned int i_blkbits ; blkcnt_t i_blocks ; unsigned short i_bytes ; umode_t i_mode ; spinlock_t i_lock ; struct mutex i_mutex ; struct rw_semaphore i_alloc_sem ; struct inode_operations const *i_op ; struct file_operations const *i_fop ; struct super_block *i_sb ; struct file_lock *i_flock ; struct address_space *i_mapping ; struct address_space i_data ; struct dquot *i_dquot[2U] ; struct list_head i_devices ; union __anonunion_ldv_11089_93 ldv_11089 ; int i_cindex ; __u32 i_generation ; unsigned long i_dnotify_mask ; struct dnotify_struct *i_dnotify ; struct list_head inotify_watches ; struct mutex inotify_mutex ; unsigned long i_state ; unsigned long dirtied_when ; unsigned int i_flags ; atomic_t i_writecount ; void *i_security ; void *i_private ; }; struct fown_struct { rwlock_t lock ; struct pid *pid ; enum pid_type pid_type ; uid_t uid ; uid_t euid ; int signum ; }; struct file_ra_state { unsigned long start ; unsigned int size ; unsigned int async_size ; unsigned int ra_pages ; int mmap_miss ; loff_t prev_pos ; }; union __anonunion_f_u_94 { struct list_head fu_list ; struct rcu_head fu_rcuhead ; }; struct file { union __anonunion_f_u_94 f_u ; struct path f_path ; struct file_operations const *f_op ; atomic_long_t f_count ; unsigned int f_flags ; fmode_t f_mode ; loff_t f_pos ; struct fown_struct f_owner ; unsigned int f_uid ; unsigned int f_gid ; struct file_ra_state f_ra ; u64 f_version ; void *f_security ; void *private_data ; struct list_head f_ep_links ; spinlock_t f_ep_lock ; struct address_space *f_mapping ; unsigned long f_mnt_write_state ; }; struct files_struct; typedef struct files_struct *fl_owner_t; struct file_lock_operations { void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ; void (*fl_release_private)(struct file_lock * ) ; }; struct lock_manager_operations { int (*fl_compare_owner)(struct file_lock * , struct file_lock * ) ; void (*fl_notify)(struct file_lock * ) ; int (*fl_grant)(struct file_lock * , struct file_lock * , int ) ; void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ; void (*fl_release_private)(struct file_lock * ) ; void (*fl_break)(struct file_lock * ) ; int (*fl_mylease)(struct file_lock * , struct file_lock * ) ; int (*fl_change)(struct file_lock ** , int ) ; }; struct nlm_lockowner; struct nfs_lock_info { u32 state ; struct nlm_lockowner *owner ; struct list_head list ; }; struct nfs4_lock_state; struct nfs4_lock_info { struct nfs4_lock_state *owner ; }; struct fasync_struct; struct __anonstruct_afs_96 { struct list_head link ; int state ; }; union __anonunion_fl_u_95 { struct nfs_lock_info nfs_fl ; struct nfs4_lock_info nfs4_fl ; struct __anonstruct_afs_96 afs ; }; struct file_lock { struct file_lock *fl_next ; struct list_head fl_link ; struct list_head fl_block ; fl_owner_t fl_owner ; unsigned char fl_flags ; unsigned char fl_type ; unsigned int fl_pid ; struct pid *fl_nspid ; wait_queue_head_t fl_wait ; struct file *fl_file ; loff_t fl_start ; loff_t fl_end ; struct fasync_struct *fl_fasync ; unsigned long fl_break_time ; struct file_lock_operations *fl_ops ; struct lock_manager_operations *fl_lmops ; union __anonunion_fl_u_95 fl_u ; }; struct fasync_struct { int magic ; int fa_fd ; struct fasync_struct *fa_next ; struct file *fa_file ; }; struct file_system_type; struct super_operations; struct xattr_handler; struct mtd_info; struct super_block { struct list_head s_list ; dev_t s_dev ; unsigned long s_blocksize ; unsigned char s_blocksize_bits ; unsigned char s_dirt ; unsigned long long s_maxbytes ; struct file_system_type *s_type ; struct super_operations const *s_op ; struct dquot_operations *dq_op ; struct quotactl_ops *s_qcop ; struct export_operations const *s_export_op ; unsigned long s_flags ; unsigned long s_magic ; struct dentry *s_root ; struct rw_semaphore s_umount ; struct mutex s_lock ; int s_count ; int s_syncing ; int s_need_sync_fs ; atomic_t s_active ; void *s_security ; struct xattr_handler **s_xattr ; struct list_head s_inodes ; struct list_head s_dirty ; struct list_head s_io ; struct list_head s_more_io ; struct hlist_head s_anon ; struct list_head s_files ; struct list_head s_dentry_lru ; int s_nr_dentry_unused ; struct block_device *s_bdev ; struct mtd_info *s_mtd ; struct list_head s_instances ; struct quota_info s_dquot ; int s_frozen ; wait_queue_head_t s_wait_unfrozen ; char s_id[32U] ; void *s_fs_info ; fmode_t s_mode ; struct mutex s_vfs_rename_mutex ; u32 s_time_gran ; char *s_subtype ; char *s_options ; }; struct fiemap_extent_info { unsigned int fi_flags ; unsigned int fi_extents_mapped ; unsigned int fi_extents_max ; struct fiemap_extent *fi_extents_start ; }; struct file_operations { struct module *owner ; loff_t (*llseek)(struct file * , loff_t , int ) ; ssize_t (*read)(struct file * , char * , size_t , loff_t * ) ; ssize_t (*write)(struct file * , char const * , size_t , loff_t * ) ; ssize_t (*aio_read)(struct kiocb * , struct iovec const * , unsigned long , loff_t ) ; ssize_t (*aio_write)(struct kiocb * , struct iovec const * , unsigned long , loff_t ) ; int (*readdir)(struct file * , void * , int (*)(void * , char const * , int , loff_t , u64 , unsigned int ) ) ; unsigned int (*poll)(struct file * , struct poll_table_struct * ) ; int (*ioctl)(struct inode * , struct file * , unsigned int , unsigned long ) ; long (*unlocked_ioctl)(struct file * , unsigned int , unsigned long ) ; long (*compat_ioctl)(struct file * , unsigned int , unsigned long ) ; int (*mmap)(struct file * , struct vm_area_struct * ) ; int (*open)(struct inode * , struct file * ) ; int (*flush)(struct file * , fl_owner_t ) ; int (*release)(struct inode * , struct file * ) ; int (*fsync)(struct file * , struct dentry * , int ) ; int (*aio_fsync)(struct kiocb * , int ) ; int (*fasync)(int , struct file * , int ) ; int (*lock)(struct file * , int , struct file_lock * ) ; ssize_t (*sendpage)(struct file * , struct page * , int , size_t , loff_t * , int ) ; unsigned long (*get_unmapped_area)(struct file * , unsigned long , unsigned long , unsigned long , unsigned long ) ; int (*check_flags)(int ) ; int (*dir_notify)(struct file * , unsigned long ) ; int (*flock)(struct file * , int , struct file_lock * ) ; ssize_t (*splice_write)(struct pipe_inode_info * , struct file * , loff_t * , size_t , unsigned int ) ; ssize_t (*splice_read)(struct file * , loff_t * , struct pipe_inode_info * , size_t , unsigned int ) ; int (*setlease)(struct file * , long , struct file_lock ** ) ; }; struct inode_operations { int (*create)(struct inode * , struct dentry * , int , struct nameidata * ) ; struct dentry *(*lookup)(struct inode * , struct dentry * , struct nameidata * ) ; int (*link)(struct dentry * , struct inode * , struct dentry * ) ; int (*unlink)(struct inode * , struct dentry * ) ; int (*symlink)(struct inode * , struct dentry * , char const * ) ; int (*mkdir)(struct inode * , struct dentry * , int ) ; int (*rmdir)(struct inode * , struct dentry * ) ; int (*mknod)(struct inode * , struct dentry * , int , dev_t ) ; int (*rename)(struct inode * , struct dentry * , struct inode * , struct dentry * ) ; int (*readlink)(struct dentry * , char * , int ) ; void *(*follow_link)(struct dentry * , struct nameidata * ) ; void (*put_link)(struct dentry * , struct nameidata * , void * ) ; void (*truncate)(struct inode * ) ; int (*permission)(struct inode * , int ) ; int (*setattr)(struct dentry * , struct iattr * ) ; int (*getattr)(struct vfsmount * , struct dentry * , struct kstat * ) ; int (*setxattr)(struct dentry * , char const * , void const * , size_t , int ) ; ssize_t (*getxattr)(struct dentry * , char const * , void * , size_t ) ; ssize_t (*listxattr)(struct dentry * , char * , size_t ) ; int (*removexattr)(struct dentry * , char const * ) ; void (*truncate_range)(struct inode * , loff_t , loff_t ) ; long (*fallocate)(struct inode * , int , loff_t , loff_t ) ; int (*fiemap)(struct inode * , struct fiemap_extent_info * , u64 , u64 ) ; }; struct seq_file; struct super_operations { struct inode *(*alloc_inode)(struct super_block * ) ; void (*destroy_inode)(struct inode * ) ; void (*dirty_inode)(struct inode * ) ; int (*write_inode)(struct inode * , int ) ; void (*drop_inode)(struct inode * ) ; void (*delete_inode)(struct inode * ) ; void (*put_super)(struct super_block * ) ; void (*write_super)(struct super_block * ) ; int (*sync_fs)(struct super_block * , int ) ; void (*write_super_lockfs)(struct super_block * ) ; void (*unlockfs)(struct super_block * ) ; int (*statfs)(struct dentry * , struct kstatfs * ) ; int (*remount_fs)(struct super_block * , int * , char * ) ; void (*clear_inode)(struct inode * ) ; void (*umount_begin)(struct super_block * ) ; int (*show_options)(struct seq_file * , struct vfsmount * ) ; int (*show_stats)(struct seq_file * , struct vfsmount * ) ; ssize_t (*quota_read)(struct super_block * , int , char * , size_t , loff_t ) ; ssize_t (*quota_write)(struct super_block * , int , char const * , size_t , loff_t ) ; }; struct file_system_type { char const *name ; int fs_flags ; int (*get_sb)(struct file_system_type * , int , char const * , void * , struct vfsmount * ) ; void (*kill_sb)(struct super_block * ) ; struct module *owner ; struct file_system_type *next ; struct list_head fs_supers ; struct lock_class_key s_lock_key ; struct lock_class_key s_umount_key ; struct lock_class_key i_lock_key ; struct lock_class_key i_mutex_key ; struct lock_class_key i_mutex_dir_key ; struct lock_class_key i_alloc_sem_key ; }; struct bio; typedef int read_proc_t(char * , char ** , off_t , int , int * , void * ); typedef int write_proc_t(struct file * , char const * , unsigned long , void * ); struct proc_dir_entry { unsigned int low_ino ; unsigned short namelen ; char const *name ; mode_t mode ; nlink_t nlink ; uid_t uid ; gid_t gid ; loff_t size ; struct inode_operations const *proc_iops ; struct file_operations const *proc_fops ; struct module *owner ; struct proc_dir_entry *next ; struct proc_dir_entry *parent ; struct proc_dir_entry *subdir ; void *data ; read_proc_t *read_proc ; write_proc_t *write_proc ; atomic_t count ; int pde_users ; spinlock_t pde_unload_lock ; struct completion *pde_unload_completion ; struct list_head pde_openers ; }; typedef unsigned long kernel_ulong_t; struct pci_device_id { __u32 vendor ; __u32 device ; __u32 subvendor ; __u32 subdevice ; __u32 class ; __u32 class_mask ; kernel_ulong_t driver_data ; }; struct resource { resource_size_t start ; resource_size_t end ; char const *name ; unsigned long flags ; struct resource *parent ; struct resource *sibling ; struct resource *child ; }; struct pci_dev; struct klist_node; struct klist { spinlock_t k_lock ; struct list_head k_list ; void (*get)(struct klist_node * ) ; void (*put)(struct klist_node * ) ; }; struct klist_node { void *n_klist ; struct list_head n_node ; struct kref n_ref ; struct completion n_removed ; }; struct dma_mapping_ops; struct dev_archdata { void *acpi_handle ; struct dma_mapping_ops *dma_ops ; void *iommu ; }; struct driver_private; struct class; struct class_private; struct bus_type; struct bus_type_private; struct bus_attribute { struct attribute attr ; ssize_t (*show)(struct bus_type * , char * ) ; ssize_t (*store)(struct bus_type * , char const * , size_t ) ; }; struct device_attribute; struct driver_attribute; struct bus_type { char const *name ; struct bus_attribute *bus_attrs ; struct device_attribute *dev_attrs ; struct driver_attribute *drv_attrs ; int (*match)(struct device * , struct device_driver * ) ; int (*uevent)(struct device * , struct kobj_uevent_env * ) ; int (*probe)(struct device * ) ; int (*remove)(struct device * ) ; void (*shutdown)(struct device * ) ; int (*suspend)(struct device * , pm_message_t ) ; int (*suspend_late)(struct device * , pm_message_t ) ; int (*resume_early)(struct device * ) ; int (*resume)(struct device * ) ; struct pm_ext_ops *pm ; struct bus_type_private *p ; }; struct device_driver { char const *name ; struct bus_type *bus ; struct module *owner ; char const *mod_name ; int (*probe)(struct device * ) ; int (*remove)(struct device * ) ; void (*shutdown)(struct device * ) ; int (*suspend)(struct device * , pm_message_t ) ; int (*resume)(struct device * ) ; struct attribute_group **groups ; struct pm_ops *pm ; struct driver_private *p ; }; struct driver_attribute { struct attribute attr ; ssize_t (*show)(struct device_driver * , char * ) ; ssize_t (*store)(struct device_driver * , char const * , size_t ) ; }; struct class_attribute; struct class { char const *name ; struct module *owner ; struct class_attribute *class_attrs ; struct device_attribute *dev_attrs ; struct kobject *dev_kobj ; int (*dev_uevent)(struct device * , struct kobj_uevent_env * ) ; void (*class_release)(struct class * ) ; void (*dev_release)(struct device * ) ; int (*suspend)(struct device * , pm_message_t ) ; int (*resume)(struct device * ) ; struct pm_ops *pm ; struct class_private *p ; }; struct device_type; struct class_attribute { struct attribute attr ; ssize_t (*show)(struct class * , char * ) ; ssize_t (*store)(struct class * , char const * , size_t ) ; }; struct device_type { char const *name ; struct attribute_group **groups ; int (*uevent)(struct device * , struct kobj_uevent_env * ) ; void (*release)(struct device * ) ; int (*suspend)(struct device * , pm_message_t ) ; int (*resume)(struct device * ) ; struct pm_ops *pm ; }; struct device_attribute { struct attribute attr ; ssize_t (*show)(struct device * , struct device_attribute * , char * ) ; ssize_t (*store)(struct device * , struct device_attribute * , char const * , size_t ) ; }; struct device_dma_parameters { unsigned int max_segment_size ; unsigned long segment_boundary_mask ; }; struct dma_coherent_mem; struct device { struct klist klist_children ; struct klist_node knode_parent ; struct klist_node knode_driver ; struct klist_node knode_bus ; struct device *parent ; struct kobject kobj ; char bus_id[20U] ; char const *init_name ; struct device_type *type ; unsigned char uevent_suppress : 1 ; struct semaphore sem ; struct bus_type *bus ; struct device_driver *driver ; void *driver_data ; void *platform_data ; struct dev_pm_info power ; int numa_node ; u64 *dma_mask ; u64 coherent_dma_mask ; struct device_dma_parameters *dma_parms ; struct list_head dma_pools ; struct dma_coherent_mem *dma_mem ; struct dev_archdata archdata ; spinlock_t devres_lock ; struct list_head devres_head ; struct klist_node knode_class ; struct class *class ; dev_t devt ; struct attribute_group **groups ; void (*release)(struct device * ) ; }; struct hotplug_slot; struct pci_slot { struct pci_bus *bus ; struct list_head list ; struct hotplug_slot *hotplug ; unsigned char number ; struct kobject kobj ; }; typedef int pci_power_t; typedef unsigned int pci_channel_state_t; enum pci_channel_state { pci_channel_io_normal = 1, pci_channel_io_frozen = 2, pci_channel_io_perm_failure = 3 } ; typedef unsigned short pci_dev_flags_t; typedef unsigned short pci_bus_flags_t; struct pcie_link_state; struct pci_vpd; struct pci_driver; struct pci_dev { struct list_head bus_list ; struct pci_bus *bus ; struct pci_bus *subordinate ; void *sysdata ; struct proc_dir_entry *procent ; struct pci_slot *slot ; unsigned int devfn ; unsigned short vendor ; unsigned short device ; unsigned short subsystem_vendor ; unsigned short subsystem_device ; unsigned int class ; u8 revision ; u8 hdr_type ; u8 pcie_type ; u8 rom_base_reg ; u8 pin ; struct pci_driver *driver ; u64 dma_mask ; struct device_dma_parameters dma_parms ; pci_power_t current_state ; int pm_cap ; unsigned char pme_support : 5 ; unsigned char d1_support : 1 ; unsigned char d2_support : 1 ; unsigned char no_d1d2 : 1 ; struct pcie_link_state *link_state ; pci_channel_state_t error_state ; struct device dev ; int cfg_size ; unsigned int irq ; struct resource resource[12U] ; unsigned char transparent : 1 ; unsigned char multifunction : 1 ; unsigned char is_added : 1 ; unsigned char is_busmaster : 1 ; unsigned char no_msi : 1 ; unsigned char block_ucfg_access : 1 ; unsigned char broken_parity_status : 1 ; unsigned char msi_enabled : 1 ; unsigned char msix_enabled : 1 ; unsigned char ari_enabled : 1 ; unsigned char is_managed : 1 ; unsigned char is_pcie : 1 ; pci_dev_flags_t dev_flags ; atomic_t enable_cnt ; u32 saved_config_space[16U] ; struct hlist_head saved_cap_space ; struct bin_attribute *rom_attr ; int rom_attr_enabled ; struct bin_attribute *res_attr[12U] ; struct bin_attribute *res_attr_wc[12U] ; struct list_head msi_list ; struct pci_vpd *vpd ; }; struct pci_ops; struct pci_bus { struct list_head node ; struct pci_bus *parent ; struct list_head children ; struct list_head devices ; struct pci_dev *self ; struct list_head slots ; struct resource *resource[16U] ; struct pci_ops *ops ; void *sysdata ; struct proc_dir_entry *procdir ; unsigned char number ; unsigned char primary ; unsigned char secondary ; unsigned char subordinate ; char name[48U] ; unsigned short bridge_ctl ; pci_bus_flags_t bus_flags ; struct device *bridge ; struct device dev ; struct bin_attribute *legacy_io ; struct bin_attribute *legacy_mem ; unsigned char is_added : 1 ; }; struct pci_ops { int (*read)(struct pci_bus * , unsigned int , int , int , u32 * ) ; int (*write)(struct pci_bus * , unsigned int , int , int , u32 ) ; }; struct pci_dynids { spinlock_t lock ; struct list_head list ; }; typedef unsigned int pci_ers_result_t; struct pci_error_handlers { pci_ers_result_t (*error_detected)(struct pci_dev * , enum pci_channel_state ) ; pci_ers_result_t (*mmio_enabled)(struct pci_dev * ) ; pci_ers_result_t (*link_reset)(struct pci_dev * ) ; pci_ers_result_t (*slot_reset)(struct pci_dev * ) ; void (*resume)(struct pci_dev * ) ; }; struct pci_driver { struct list_head node ; char *name ; struct pci_device_id const *id_table ; int (*probe)(struct pci_dev * , struct pci_device_id const * ) ; void (*remove)(struct pci_dev * ) ; int (*suspend)(struct pci_dev * , pm_message_t ) ; int (*suspend_late)(struct pci_dev * , pm_message_t ) ; int (*resume_early)(struct pci_dev * ) ; int (*resume)(struct pci_dev * ) ; void (*shutdown)(struct pci_dev * ) ; struct pm_ext_ops *pm ; struct pci_error_handlers *err_handler ; struct device_driver driver ; struct pci_dynids dynids ; }; struct scatterlist { unsigned long sg_magic ; unsigned long page_link ; unsigned int offset ; unsigned int length ; dma_addr_t dma_address ; unsigned int dma_length ; }; struct rb_node { unsigned long rb_parent_color ; struct rb_node *rb_right ; struct rb_node *rb_left ; }; struct rb_root { struct rb_node *rb_node ; }; typedef atomic_long_t mm_counter_t; struct __anonstruct_ldv_15155_99 { u16 inuse ; u16 objects ; }; union __anonunion_ldv_15156_98 { atomic_t _mapcount ; struct __anonstruct_ldv_15155_99 ldv_15155 ; }; struct __anonstruct_ldv_15161_101 { unsigned long private ; struct address_space *mapping ; }; union __anonunion_ldv_15165_100 { struct __anonstruct_ldv_15161_101 ldv_15161 ; spinlock_t ptl ; struct kmem_cache *slab ; struct page *first_page ; }; union __anonunion_ldv_15169_102 { unsigned long index ; void *freelist ; }; struct page { unsigned long flags ; atomic_t _count ; union __anonunion_ldv_15156_98 ldv_15156 ; union __anonunion_ldv_15165_100 ldv_15165 ; union __anonunion_ldv_15169_102 ldv_15169 ; struct list_head lru ; }; struct __anonstruct_vm_set_104 { struct list_head list ; void *parent ; struct vm_area_struct *head ; }; union __anonunion_shared_103 { struct __anonstruct_vm_set_104 vm_set ; struct raw_prio_tree_node prio_tree_node ; }; struct anon_vma; struct vm_operations_struct; struct mempolicy; struct vm_area_struct { struct mm_struct *vm_mm ; unsigned long vm_start ; unsigned long vm_end ; struct vm_area_struct *vm_next ; pgprot_t vm_page_prot ; unsigned long vm_flags ; struct rb_node vm_rb ; union __anonunion_shared_103 shared ; struct list_head anon_vma_node ; struct anon_vma *anon_vma ; struct vm_operations_struct *vm_ops ; unsigned long vm_pgoff ; struct file *vm_file ; void *vm_private_data ; unsigned long vm_truncate_count ; struct mempolicy *vm_policy ; }; struct core_thread { struct task_struct *task ; struct core_thread *next ; }; struct core_state { atomic_t nr_threads ; struct core_thread dumper ; struct completion startup ; }; struct kioctx; struct mmu_notifier_mm; struct mm_struct { struct vm_area_struct *mmap ; struct rb_root mm_rb ; struct vm_area_struct *mmap_cache ; unsigned long (*get_unmapped_area)(struct file * , unsigned long , unsigned long , unsigned long , unsigned long ) ; void (*unmap_area)(struct mm_struct * , unsigned long ) ; unsigned long mmap_base ; unsigned long task_size ; unsigned long cached_hole_size ; unsigned long free_area_cache ; pgd_t *pgd ; atomic_t mm_users ; atomic_t mm_count ; int map_count ; struct rw_semaphore mmap_sem ; spinlock_t page_table_lock ; struct list_head mmlist ; mm_counter_t _file_rss ; mm_counter_t _anon_rss ; unsigned long hiwater_rss ; unsigned long hiwater_vm ; unsigned long total_vm ; unsigned long locked_vm ; unsigned long shared_vm ; unsigned long exec_vm ; unsigned long stack_vm ; unsigned long reserved_vm ; unsigned long def_flags ; unsigned long nr_ptes ; unsigned long start_code ; unsigned long end_code ; unsigned long start_data ; unsigned long end_data ; unsigned long start_brk ; unsigned long brk ; unsigned long start_stack ; unsigned long arg_start ; unsigned long arg_end ; unsigned long env_start ; unsigned long env_end ; unsigned long saved_auxv[42U] ; cpumask_t cpu_vm_mask ; mm_context_t context ; unsigned int faultstamp ; unsigned int token_priority ; unsigned int last_interval ; unsigned long flags ; struct core_state *core_state ; rwlock_t ioctx_list_lock ; struct kioctx *ioctx_list ; struct task_struct *owner ; struct file *exe_file ; unsigned long num_exe_file_vmas ; struct mmu_notifier_mm *mmu_notifier_mm ; }; struct user_struct; struct vm_fault { unsigned int flags ; unsigned long pgoff ; void *virtual_address ; struct page *page ; }; struct vm_operations_struct { void (*open)(struct vm_area_struct * ) ; void (*close)(struct vm_area_struct * ) ; int (*fault)(struct vm_area_struct * , struct vm_fault * ) ; int (*page_mkwrite)(struct vm_area_struct * , struct page * ) ; int (*access)(struct vm_area_struct * , unsigned long , void * , int , int ) ; int (*set_policy)(struct vm_area_struct * , struct mempolicy * ) ; struct mempolicy *(*get_policy)(struct vm_area_struct * , unsigned long ) ; int (*migrate)(struct vm_area_struct * , nodemask_t const * , nodemask_t const * , unsigned long ) ; }; struct dma_mapping_ops { int (*mapping_error)(struct device * , dma_addr_t ) ; void *(*alloc_coherent)(struct device * , size_t , dma_addr_t * , gfp_t ) ; void (*free_coherent)(struct device * , size_t , void * , dma_addr_t ) ; dma_addr_t (*map_single)(struct device * , phys_addr_t , size_t , int ) ; void (*unmap_single)(struct device * , dma_addr_t , size_t , int ) ; void (*sync_single_for_cpu)(struct device * , dma_addr_t , size_t , int ) ; void (*sync_single_for_device)(struct device * , dma_addr_t , size_t , int ) ; void (*sync_single_range_for_cpu)(struct device * , dma_addr_t , unsigned long , size_t , int ) ; void (*sync_single_range_for_device)(struct device * , dma_addr_t , unsigned long , size_t , int ) ; void (*sync_sg_for_cpu)(struct device * , struct scatterlist * , int , int ) ; void (*sync_sg_for_device)(struct device * , struct scatterlist * , int , int ) ; int (*map_sg)(struct device * , struct scatterlist * , int , int ) ; void (*unmap_sg)(struct device * , struct scatterlist * , int , int ) ; int (*dma_supported)(struct device * , u64 ) ; int is_phys ; }; typedef unsigned long cputime_t; struct sem_undo_list; struct sem_undo_list { atomic_t refcnt ; spinlock_t lock ; struct list_head list_proc ; }; struct sysv_sem { struct sem_undo_list *undo_list ; }; struct siginfo; struct __anonstruct_sigset_t_105 { unsigned long sig[1U] ; }; typedef struct __anonstruct_sigset_t_105 sigset_t; typedef void __signalfn_t(int ); typedef __signalfn_t *__sighandler_t; typedef void __restorefn_t(void); typedef __restorefn_t *__sigrestore_t; struct sigaction { __sighandler_t sa_handler ; unsigned long sa_flags ; __sigrestore_t sa_restorer ; sigset_t sa_mask ; }; struct k_sigaction { struct sigaction sa ; }; union sigval { int sival_int ; void *sival_ptr ; }; typedef union sigval sigval_t; struct __anonstruct__kill_107 { pid_t _pid ; uid_t _uid ; }; struct __anonstruct__timer_108 { timer_t _tid ; int _overrun ; char _pad[0U] ; sigval_t _sigval ; int _sys_private ; }; struct __anonstruct__rt_109 { pid_t _pid ; uid_t _uid ; sigval_t _sigval ; }; struct __anonstruct__sigchld_110 { pid_t _pid ; uid_t _uid ; int _status ; clock_t _utime ; clock_t _stime ; }; struct __anonstruct__sigfault_111 { void *_addr ; }; struct __anonstruct__sigpoll_112 { long _band ; int _fd ; }; union __anonunion__sifields_106 { int _pad[28U] ; struct __anonstruct__kill_107 _kill ; struct __anonstruct__timer_108 _timer ; struct __anonstruct__rt_109 _rt ; struct __anonstruct__sigchld_110 _sigchld ; struct __anonstruct__sigfault_111 _sigfault ; struct __anonstruct__sigpoll_112 _sigpoll ; }; struct siginfo { int si_signo ; int si_errno ; int si_code ; union __anonunion__sifields_106 _sifields ; }; typedef struct siginfo siginfo_t; struct sigpending { struct list_head list ; sigset_t signal ; }; struct fs_struct { atomic_t count ; rwlock_t lock ; int umask ; struct path root ; struct path pwd ; }; struct prop_local_single { unsigned long events ; unsigned long period ; int shift ; spinlock_t lock ; }; struct __anonstruct_seccomp_t_115 { int mode ; }; typedef struct __anonstruct_seccomp_t_115 seccomp_t; struct plist_head { struct list_head prio_list ; struct list_head node_list ; spinlock_t *lock ; }; struct rt_mutex_waiter; struct rlimit { unsigned long rlim_cur ; unsigned long rlim_max ; }; struct hrtimer_clock_base; struct hrtimer_cpu_base; enum hrtimer_restart { HRTIMER_NORESTART = 0, HRTIMER_RESTART = 1 } ; enum hrtimer_cb_mode { HRTIMER_CB_SOFTIRQ = 0, HRTIMER_CB_IRQSAFE_PERCPU = 1, HRTIMER_CB_IRQSAFE_UNLOCKED = 2 } ; struct hrtimer { struct rb_node node ; ktime_t _expires ; ktime_t _softexpires ; enum hrtimer_restart (*function)(struct hrtimer * ) ; struct hrtimer_clock_base *base ; unsigned long state ; struct list_head cb_entry ; enum hrtimer_cb_mode cb_mode ; int start_pid ; void *start_site ; char start_comm[16U] ; }; struct hrtimer_clock_base { struct hrtimer_cpu_base *cpu_base ; clockid_t index ; struct rb_root active ; struct rb_node *first ; ktime_t resolution ; ktime_t (*get_time)(void) ; ktime_t softirq_time ; ktime_t offset ; }; struct hrtimer_cpu_base { spinlock_t lock ; struct hrtimer_clock_base clock_base[2U] ; struct list_head cb_pending ; ktime_t expires_next ; int hres_active ; unsigned long nr_events ; }; struct task_io_accounting { u64 rchar ; u64 wchar ; u64 syscr ; u64 syscw ; u64 read_bytes ; u64 write_bytes ; u64 cancelled_write_bytes ; }; struct latency_record { unsigned long backtrace[12U] ; unsigned int count ; unsigned long time ; unsigned long max ; }; struct futex_pi_state; struct robust_list_head; struct cfs_rq; struct task_group; struct nsproxy; struct io_event { __u64 data ; __u64 obj ; __s64 res ; __s64 res2 ; }; struct iovec { void *iov_base ; __kernel_size_t iov_len ; }; union __anonunion_ki_obj_116 { void *user ; struct task_struct *tsk ; }; struct kiocb { struct list_head ki_run_list ; unsigned long ki_flags ; int ki_users ; unsigned int ki_key ; struct file *ki_filp ; struct kioctx *ki_ctx ; int (*ki_cancel)(struct kiocb * , struct io_event * ) ; ssize_t (*ki_retry)(struct kiocb * ) ; void (*ki_dtor)(struct kiocb * ) ; union __anonunion_ki_obj_116 ki_obj ; __u64 ki_user_data ; wait_queue_t ki_wait ; loff_t ki_pos ; void *private ; unsigned short ki_opcode ; size_t ki_nbytes ; char *ki_buf ; size_t ki_left ; struct iovec ki_inline_vec ; struct iovec *ki_iovec ; unsigned long ki_nr_segs ; unsigned long ki_cur_seg ; struct list_head ki_list ; struct file *ki_eventfd ; }; struct aio_ring_info { unsigned long mmap_base ; unsigned long mmap_size ; struct page **ring_pages ; spinlock_t ring_lock ; long nr_pages ; unsigned int nr ; unsigned int tail ; struct page *internal_pages[8U] ; }; struct kioctx { atomic_t users ; int dead ; struct mm_struct *mm ; unsigned long user_id ; struct kioctx *next ; wait_queue_head_t wait ; spinlock_t ctx_lock ; int reqs_active ; struct list_head active_reqs ; struct list_head run_list ; unsigned int max_reqs ; struct aio_ring_info ring_info ; struct delayed_work wq ; }; struct sighand_struct { atomic_t count ; struct k_sigaction action[64U] ; spinlock_t siglock ; wait_queue_head_t signalfd_wqh ; }; struct pacct_struct { int ac_flag ; long ac_exitcode ; unsigned long ac_mem ; cputime_t ac_utime ; cputime_t ac_stime ; unsigned long ac_minflt ; unsigned long ac_majflt ; }; struct task_cputime { cputime_t utime ; cputime_t stime ; unsigned long long sum_exec_runtime ; }; struct thread_group_cputime { struct task_cputime *totals ; }; union __anonunion_ldv_18746_117 { pid_t pgrp ; pid_t __pgrp ; }; union __anonunion_ldv_18751_118 { pid_t session ; pid_t __session ; }; struct tty_struct; struct taskstats; struct tty_audit_buf; struct signal_struct { atomic_t count ; atomic_t live ; wait_queue_head_t wait_chldexit ; struct task_struct *curr_target ; struct sigpending shared_pending ; int group_exit_code ; int notify_count ; struct task_struct *group_exit_task ; int group_stop_count ; unsigned int flags ; struct list_head posix_timers ; struct hrtimer real_timer ; struct pid *leader_pid ; ktime_t it_real_incr ; cputime_t it_prof_expires ; cputime_t it_virt_expires ; cputime_t it_prof_incr ; cputime_t it_virt_incr ; struct thread_group_cputime cputime ; struct task_cputime cputime_expires ; struct list_head cpu_timers[3U] ; union __anonunion_ldv_18746_117 ldv_18746 ; struct pid *tty_old_pgrp ; union __anonunion_ldv_18751_118 ldv_18751 ; int leader ; struct tty_struct *tty ; cputime_t cutime ; cputime_t cstime ; cputime_t gtime ; cputime_t cgtime ; unsigned long nvcsw ; unsigned long nivcsw ; unsigned long cnvcsw ; unsigned long cnivcsw ; unsigned long min_flt ; unsigned long maj_flt ; unsigned long cmin_flt ; unsigned long cmaj_flt ; unsigned long inblock ; unsigned long oublock ; unsigned long cinblock ; unsigned long coublock ; struct task_io_accounting ioac ; struct rlimit rlim[16U] ; struct key *session_keyring ; struct key *process_keyring ; struct pacct_struct pacct ; struct taskstats *stats ; unsigned int audit_tty ; struct tty_audit_buf *tty_audit_buf ; }; struct user_struct { atomic_t __count ; atomic_t processes ; atomic_t files ; atomic_t sigpending ; atomic_t inotify_watches ; atomic_t inotify_devs ; atomic_t epoll_devs ; atomic_t epoll_watches ; unsigned long mq_bytes ; unsigned long locked_shm ; struct key *uid_keyring ; struct key *session_keyring ; struct hlist_node uidhash_node ; uid_t uid ; struct task_group *tg ; struct kobject kobj ; struct work_struct work ; }; struct reclaim_state; struct sched_info { unsigned long pcount ; unsigned long long cpu_time ; unsigned long long run_delay ; unsigned long long last_arrival ; unsigned long long last_queued ; unsigned int bkl_count ; }; struct task_delay_info { spinlock_t lock ; unsigned int flags ; struct timespec blkio_start ; struct timespec blkio_end ; u64 blkio_delay ; u64 swapin_delay ; u32 blkio_count ; u32 swapin_count ; struct timespec freepages_start ; struct timespec freepages_end ; u64 freepages_delay ; u32 freepages_count ; }; enum cpu_idle_type { CPU_IDLE = 0, CPU_NOT_IDLE = 1, CPU_NEWLY_IDLE = 2, CPU_MAX_IDLE_TYPES = 3 } ; struct sched_group { struct sched_group *next ; cpumask_t cpumask ; unsigned int __cpu_power ; u32 reciprocal_cpu_power ; }; enum sched_domain_level { SD_LV_NONE = 0, SD_LV_SIBLING = 1, SD_LV_MC = 2, SD_LV_CPU = 3, SD_LV_NODE = 4, SD_LV_ALLNODES = 5, SD_LV_MAX = 6 } ; struct sched_domain { struct sched_domain *parent ; struct sched_domain *child ; struct sched_group *groups ; cpumask_t span ; unsigned long min_interval ; unsigned long max_interval ; unsigned int busy_factor ; unsigned int imbalance_pct ; unsigned int cache_nice_tries ; unsigned int busy_idx ; unsigned int idle_idx ; unsigned int newidle_idx ; unsigned int wake_idx ; unsigned int forkexec_idx ; int flags ; enum sched_domain_level level ; unsigned long last_balance ; unsigned int balance_interval ; unsigned int nr_balance_failed ; u64 last_update ; unsigned int lb_count[3U] ; unsigned int lb_failed[3U] ; unsigned int lb_balanced[3U] ; unsigned int lb_imbalance[3U] ; unsigned int lb_gained[3U] ; unsigned int lb_hot_gained[3U] ; unsigned int lb_nobusyg[3U] ; unsigned int lb_nobusyq[3U] ; unsigned int alb_count ; unsigned int alb_failed ; unsigned int alb_pushed ; unsigned int sbe_count ; unsigned int sbe_balanced ; unsigned int sbe_pushed ; unsigned int sbf_count ; unsigned int sbf_balanced ; unsigned int sbf_pushed ; unsigned int ttwu_wake_remote ; unsigned int ttwu_move_affine ; unsigned int ttwu_move_balance ; char *name ; }; struct io_context; struct group_info { int ngroups ; atomic_t usage ; gid_t small_block[32U] ; int nblocks ; gid_t *blocks[0U] ; }; struct audit_context; struct rq; struct sched_class { struct sched_class const *next ; void (*enqueue_task)(struct rq * , struct task_struct * , int ) ; void (*dequeue_task)(struct rq * , struct task_struct * , int ) ; void (*yield_task)(struct rq * ) ; void (*check_preempt_curr)(struct rq * , struct task_struct * , int ) ; struct task_struct *(*pick_next_task)(struct rq * ) ; void (*put_prev_task)(struct rq * , struct task_struct * ) ; int (*select_task_rq)(struct task_struct * , int ) ; unsigned long (*load_balance)(struct rq * , int , struct rq * , unsigned long , struct sched_domain * , enum cpu_idle_type , int * , int * ) ; int (*move_one_task)(struct rq * , int , struct rq * , struct sched_domain * , enum cpu_idle_type ) ; void (*pre_schedule)(struct rq * , struct task_struct * ) ; void (*post_schedule)(struct rq * ) ; void (*task_wake_up)(struct rq * , struct task_struct * ) ; void (*set_cpus_allowed)(struct task_struct * , cpumask_t const * ) ; void (*rq_online)(struct rq * ) ; void (*rq_offline)(struct rq * ) ; void (*set_curr_task)(struct rq * ) ; void (*task_tick)(struct rq * , struct task_struct * , int ) ; void (*task_new)(struct rq * , struct task_struct * ) ; void (*switched_from)(struct rq * , struct task_struct * , int ) ; void (*switched_to)(struct rq * , struct task_struct * , int ) ; void (*prio_changed)(struct rq * , struct task_struct * , int , int ) ; void (*moved_group)(struct task_struct * ) ; }; struct load_weight { unsigned long weight ; unsigned long inv_weight ; }; struct sched_entity { struct load_weight load ; struct rb_node run_node ; struct list_head group_node ; unsigned int on_rq ; u64 exec_start ; u64 sum_exec_runtime ; u64 vruntime ; u64 prev_sum_exec_runtime ; u64 last_wakeup ; u64 avg_overlap ; u64 wait_start ; u64 wait_max ; u64 wait_count ; u64 wait_sum ; u64 sleep_start ; u64 sleep_max ; s64 sum_sleep_runtime ; u64 block_start ; u64 block_max ; u64 exec_max ; u64 slice_max ; u64 nr_migrations ; u64 nr_migrations_cold ; u64 nr_failed_migrations_affine ; u64 nr_failed_migrations_running ; u64 nr_failed_migrations_hot ; u64 nr_forced_migrations ; u64 nr_forced2_migrations ; u64 nr_wakeups ; u64 nr_wakeups_sync ; u64 nr_wakeups_migrate ; u64 nr_wakeups_local ; u64 nr_wakeups_remote ; u64 nr_wakeups_affine ; u64 nr_wakeups_affine_attempts ; u64 nr_wakeups_passive ; u64 nr_wakeups_idle ; struct sched_entity *parent ; struct cfs_rq *cfs_rq ; struct cfs_rq *my_q ; }; struct rt_rq; struct sched_rt_entity { struct list_head run_list ; unsigned long timeout ; unsigned int time_slice ; int nr_cpus_allowed ; struct sched_rt_entity *back ; struct sched_rt_entity *parent ; struct rt_rq *rt_rq ; struct rt_rq *my_q ; }; struct linux_binfmt; struct css_set; struct compat_robust_list_head; struct task_struct { long volatile state ; void *stack ; atomic_t usage ; unsigned int flags ; unsigned int ptrace ; int lock_depth ; int prio ; int static_prio ; int normal_prio ; unsigned int rt_priority ; struct sched_class const *sched_class ; struct sched_entity se ; struct sched_rt_entity rt ; struct hlist_head preempt_notifiers ; unsigned char fpu_counter ; s8 oomkilladj ; unsigned int policy ; cpumask_t cpus_allowed ; struct sched_info sched_info ; struct list_head tasks ; struct mm_struct *mm ; struct mm_struct *active_mm ; struct linux_binfmt *binfmt ; int exit_state ; int exit_code ; int exit_signal ; int pdeath_signal ; unsigned int personality ; unsigned char did_exec : 1 ; pid_t pid ; pid_t tgid ; struct task_struct *real_parent ; struct task_struct *parent ; struct list_head children ; struct list_head sibling ; struct task_struct *group_leader ; struct list_head ptraced ; struct list_head ptrace_entry ; struct pid_link pids[3U] ; struct list_head thread_group ; struct completion *vfork_done ; int *set_child_tid ; int *clear_child_tid ; cputime_t utime ; cputime_t stime ; cputime_t utimescaled ; cputime_t stimescaled ; cputime_t gtime ; cputime_t prev_utime ; cputime_t prev_stime ; unsigned long nvcsw ; unsigned long nivcsw ; struct timespec start_time ; struct timespec real_start_time ; unsigned long min_flt ; unsigned long maj_flt ; struct task_cputime cputime_expires ; struct list_head cpu_timers[3U] ; uid_t uid ; uid_t euid ; uid_t suid ; uid_t fsuid ; gid_t gid ; gid_t egid ; gid_t sgid ; gid_t fsgid ; struct group_info *group_info ; kernel_cap_t cap_effective ; kernel_cap_t cap_inheritable ; kernel_cap_t cap_permitted ; kernel_cap_t cap_bset ; struct user_struct *user ; unsigned int securebits ; unsigned char jit_keyring ; struct key *request_key_auth ; struct key *thread_keyring ; char comm[16U] ; int link_count ; int total_link_count ; struct sysv_sem sysvsem ; unsigned long last_switch_timestamp ; unsigned long last_switch_count ; struct thread_struct thread ; struct fs_struct *fs ; struct files_struct *files ; struct nsproxy *nsproxy ; struct signal_struct *signal ; struct sighand_struct *sighand ; sigset_t blocked ; sigset_t real_blocked ; sigset_t saved_sigmask ; struct sigpending pending ; unsigned long sas_ss_sp ; size_t sas_ss_size ; int (*notifier)(void * ) ; void *notifier_data ; sigset_t *notifier_mask ; void *security ; struct audit_context *audit_context ; uid_t loginuid ; unsigned int sessionid ; seccomp_t seccomp ; u32 parent_exec_id ; u32 self_exec_id ; spinlock_t alloc_lock ; spinlock_t pi_lock ; struct plist_head pi_waiters ; struct rt_mutex_waiter *pi_blocked_on ; struct mutex_waiter *blocked_on ; unsigned int irq_events ; int hardirqs_enabled ; unsigned long hardirq_enable_ip ; unsigned int hardirq_enable_event ; unsigned long hardirq_disable_ip ; unsigned int hardirq_disable_event ; int softirqs_enabled ; unsigned long softirq_disable_ip ; unsigned int softirq_disable_event ; unsigned long softirq_enable_ip ; unsigned int softirq_enable_event ; int hardirq_context ; int softirq_context ; u64 curr_chain_key ; int lockdep_depth ; unsigned int lockdep_recursion ; struct held_lock held_locks[48U] ; void *journal_info ; struct bio *bio_list ; struct bio **bio_tail ; struct reclaim_state *reclaim_state ; struct backing_dev_info *backing_dev_info ; struct io_context *io_context ; unsigned long ptrace_message ; siginfo_t *last_siginfo ; struct task_io_accounting ioac ; u64 acct_rss_mem1 ; u64 acct_vm_mem1 ; cputime_t acct_timexpd ; nodemask_t mems_allowed ; int cpuset_mems_generation ; int cpuset_mem_spread_rotor ; struct css_set *cgroups ; struct list_head cg_list ; struct robust_list_head *robust_list ; struct compat_robust_list_head *compat_robust_list ; struct list_head pi_state_list ; struct futex_pi_state *pi_state_cache ; struct mempolicy *mempolicy ; short il_next ; atomic_t fs_excl ; struct rcu_head rcu ; struct pipe_inode_info *splice_pipe ; struct task_delay_info *delays ; int make_it_fail ; struct prop_local_single dirties ; int latency_record_count ; struct latency_record latency_record[32U] ; unsigned long timer_slack_ns ; unsigned long default_timer_slack_ns ; struct list_head *scm_work_list ; }; struct cdev { struct kobject kobj ; struct module *owner ; struct file_operations const *ops ; struct list_head list ; dev_t dev ; unsigned int count ; }; struct exception_table_entry { unsigned long insn ; unsigned long fixup ; }; typedef s32 compat_time_t; typedef s32 compat_long_t; struct compat_timespec { compat_time_t tv_sec ; s32 tv_nsec ; }; typedef u32 compat_uptr_t; struct compat_robust_list { compat_uptr_t next ; }; struct compat_robust_list_head { struct compat_robust_list list ; compat_long_t futex_offset ; compat_uptr_t list_op_pending ; }; enum chipset_type { NOT_SUPPORTED = 0, SUPPORTED = 1 } ; struct agp_version { u16 major ; u16 minor ; }; struct agp_kern_info { struct agp_version version ; struct pci_dev *device ; enum chipset_type chipset ; unsigned long mode ; unsigned long aper_base ; size_t aper_size ; int max_memory ; int current_memory ; bool cant_use_aperture ; unsigned long page_mask ; struct vm_operations_struct *vm_ops ; }; struct agp_bridge_data; struct pollfd { int fd ; short events ; short revents ; }; struct poll_table_struct { void (*qproc)(struct file * , wait_queue_head_t * , struct poll_table_struct * ) ; }; typedef int irqreturn_t; typedef unsigned int drm_magic_t; struct drm_hw_lock { unsigned int volatile lock ; char padding[60U] ; }; enum drm_map_type { _DRM_FRAME_BUFFER = 0, _DRM_REGISTERS = 1, _DRM_SHM = 2, _DRM_AGP = 3, _DRM_SCATTER_GATHER = 4, _DRM_CONSISTENT = 5, _DRM_GEM = 6 } ; enum drm_map_flags { _DRM_RESTRICTED = 1, _DRM_READ_ONLY = 2, _DRM_LOCKED = 4, _DRM_KERNEL = 8, _DRM_WRITE_COMBINING = 16, _DRM_CONTAINS_LOCK = 32, _DRM_REMOVABLE = 64, _DRM_DRIVER = 128 } ; struct drm_map { unsigned long offset ; unsigned long size ; enum drm_map_type type ; enum drm_map_flags flags ; void *handle ; int mtrr ; }; enum drm_stat_type { _DRM_STAT_LOCK = 0, _DRM_STAT_OPENS = 1, _DRM_STAT_CLOSES = 2, _DRM_STAT_IOCTLS = 3, _DRM_STAT_LOCKS = 4, _DRM_STAT_UNLOCKS = 5, _DRM_STAT_VALUE = 6, _DRM_STAT_BYTE = 7, _DRM_STAT_COUNT = 8, _DRM_STAT_IRQ = 9, _DRM_STAT_PRIMARY = 10, _DRM_STAT_SECONDARY = 11, _DRM_STAT_DMA = 12, _DRM_STAT_SPECIAL = 13, _DRM_STAT_MISSED = 14 } ; enum drm_ctx_flags { _DRM_CONTEXT_PRESERVED = 1, _DRM_CONTEXT_2DONLY = 2 } ; struct drm_set_version { int drm_di_major ; int drm_di_minor ; int drm_dd_major ; int drm_dd_minor ; }; struct drm_mode_fb_cmd { uint32_t fb_id ; uint32_t width ; uint32_t height ; uint32_t pitch ; uint32_t bpp ; uint32_t depth ; uint32_t handle ; }; struct idr_layer { unsigned long bitmap ; struct idr_layer *ary[64U] ; int count ; int layer ; struct rcu_head rcu_head ; }; struct idr { struct idr_layer *top ; struct idr_layer *id_free ; int layers ; int id_free_cnt ; spinlock_t lock ; }; struct drm_file; struct drm_device; struct drm_hash_item { struct hlist_node head ; unsigned long key ; }; struct drm_open_hash { unsigned int size ; unsigned int order ; unsigned int fill ; struct hlist_head *table ; int use_vmalloc ; }; typedef int drm_ioctl_t(struct drm_device * , void * , struct drm_file * ); struct drm_ioctl_desc { unsigned int cmd ; drm_ioctl_t *func ; int flags ; }; enum ldv_18290 { DRM_LIST_NONE = 0, DRM_LIST_FREE = 1, DRM_LIST_WAIT = 2, DRM_LIST_PEND = 3, DRM_LIST_PRIO = 4, DRM_LIST_RECLAIM = 5 } ; struct drm_buf { int idx ; int total ; int order ; int used ; unsigned long offset ; void *address ; unsigned long bus_address ; struct drm_buf *next ; int volatile waiting ; int volatile pending ; wait_queue_head_t dma_wait ; struct drm_file *file_priv ; int context ; int while_locked ; enum ldv_18290 list ; int dev_priv_size ; void *dev_private ; }; struct drm_waitlist { int count ; struct drm_buf **bufs ; struct drm_buf **rp ; struct drm_buf **wp ; struct drm_buf **end ; spinlock_t read_lock ; spinlock_t write_lock ; }; struct drm_freelist { int initialized ; atomic_t count ; struct drm_buf *next ; wait_queue_head_t waiting ; int low_mark ; int high_mark ; atomic_t wfh ; spinlock_t lock ; }; struct drm_dma_handle { dma_addr_t busaddr ; void *vaddr ; size_t size ; }; typedef struct drm_dma_handle drm_dma_handle_t; struct drm_buf_entry { int buf_size ; int buf_count ; struct drm_buf *buflist ; int seg_count ; int page_order ; struct drm_dma_handle **seglist ; struct drm_freelist freelist ; }; struct drm_minor; struct drm_master; struct drm_file { int authenticated ; pid_t pid ; uid_t uid ; drm_magic_t magic ; unsigned long ioctl_count ; struct list_head lhead ; struct drm_minor *minor ; unsigned long lock_count ; struct idr object_idr ; spinlock_t table_lock ; struct file *filp ; void *driver_priv ; int is_master ; struct drm_master *master ; struct list_head fbs ; }; struct drm_queue { atomic_t use_count ; atomic_t finalization ; atomic_t block_count ; atomic_t block_read ; wait_queue_head_t read_queue ; atomic_t block_write ; wait_queue_head_t write_queue ; atomic_t total_queued ; atomic_t total_flushed ; atomic_t total_locks ; enum drm_ctx_flags flags ; struct drm_waitlist waitlist ; wait_queue_head_t flush_queue ; }; struct drm_lock_data { struct drm_hw_lock *hw_lock ; struct drm_file *file_priv ; wait_queue_head_t lock_queue ; unsigned long lock_time ; spinlock_t spinlock ; uint32_t kernel_waiters ; uint32_t user_waiters ; int idle_has_lock ; }; enum ldv_18310 { _DRM_DMA_USE_AGP = 1, _DRM_DMA_USE_SG = 2, _DRM_DMA_USE_FB = 4, _DRM_DMA_USE_PCI_RO = 8 } ; struct drm_device_dma { struct drm_buf_entry bufs[23U] ; int buf_count ; struct drm_buf **buflist ; int seg_count ; int page_count ; unsigned long *pagelist ; unsigned long byte_count ; enum ldv_18310 flags ; }; struct drm_agp_head { struct agp_kern_info agp_info ; struct list_head memory ; unsigned long mode ; struct agp_bridge_data *bridge ; int enabled ; int acquired ; unsigned long base ; int agp_mtrr ; int cant_use_aperture ; unsigned long page_mask ; }; struct drm_sg_mem { unsigned long handle ; void *virtual ; int pages ; struct page **pagelist ; dma_addr_t *busaddr ; }; struct drm_sigdata { int context ; struct drm_hw_lock *lock ; }; struct drm_mm; struct drm_mm_node { struct list_head fl_entry ; struct list_head ml_entry ; int free ; unsigned long start ; unsigned long size ; struct drm_mm *mm ; void *private ; }; struct drm_mm { struct list_head fl_entry ; struct list_head ml_entry ; }; struct drm_map_list { struct list_head head ; struct drm_hash_item hash ; struct drm_map *map ; uint64_t user_token ; struct drm_master *master ; struct drm_mm_node *file_offset_node ; }; typedef struct drm_map drm_local_map_t; struct drm_gem_object { struct kref refcount ; struct kref handlecount ; struct drm_device *dev ; struct file *filp ; struct drm_map_list map_list ; size_t size ; int name ; uint32_t read_domains ; uint32_t write_domain ; uint32_t pending_read_domains ; uint32_t pending_write_domain ; void *driver_private ; }; struct drm_framebuffer; struct drm_mode_object { uint32_t id ; uint32_t type ; }; enum drm_mode_status { MODE_OK = 0, MODE_HSYNC = 1, MODE_VSYNC = 2, MODE_H_ILLEGAL = 3, MODE_V_ILLEGAL = 4, MODE_BAD_WIDTH = 5, MODE_NOMODE = 6, MODE_NO_INTERLACE = 7, MODE_NO_DBLESCAN = 8, MODE_NO_VSCAN = 9, MODE_MEM = 10, MODE_VIRTUAL_X = 11, MODE_VIRTUAL_Y = 12, MODE_MEM_VIRT = 13, MODE_NOCLOCK = 14, MODE_CLOCK_HIGH = 15, MODE_CLOCK_LOW = 16, MODE_CLOCK_RANGE = 17, MODE_BAD_HVALUE = 18, MODE_BAD_VVALUE = 19, MODE_BAD_VSCAN = 20, MODE_HSYNC_NARROW = 21, MODE_HSYNC_WIDE = 22, MODE_HBLANK_NARROW = 23, MODE_HBLANK_WIDE = 24, MODE_VSYNC_NARROW = 25, MODE_VSYNC_WIDE = 26, MODE_VBLANK_NARROW = 27, MODE_VBLANK_WIDE = 28, MODE_PANEL = 29, MODE_INTERLACE_WIDTH = 30, MODE_ONE_WIDTH = 31, MODE_ONE_HEIGHT = 32, MODE_ONE_SIZE = 33, MODE_NO_REDUCED = 34, MODE_UNVERIFIED = -3, MODE_BAD = -2, MODE_ERROR = -1 } ; struct drm_display_mode { struct list_head head ; struct drm_mode_object base ; char name[32U] ; int connector_count ; enum drm_mode_status status ; int type ; int clock ; int hdisplay ; int hsync_start ; int hsync_end ; int htotal ; int hskew ; int vdisplay ; int vsync_start ; int vsync_end ; int vtotal ; int vscan ; unsigned int flags ; int width_mm ; int height_mm ; int clock_index ; int synth_clock ; int crtc_hdisplay ; int crtc_hblank_start ; int crtc_hblank_end ; int crtc_hsync_start ; int crtc_hsync_end ; int crtc_htotal ; int crtc_hskew ; int crtc_vdisplay ; int crtc_vblank_start ; int crtc_vblank_end ; int crtc_vsync_start ; int crtc_vsync_end ; int crtc_vtotal ; int crtc_hadjusted ; int crtc_vadjusted ; int private_size ; int *private ; int private_flags ; int vrefresh ; float hsync ; }; struct drm_framebuffer_funcs { void (*destroy)(struct drm_framebuffer * ) ; int (*create_handle)(struct drm_framebuffer * , struct drm_file * , unsigned int * ) ; }; struct drm_framebuffer { struct drm_device *dev ; struct list_head head ; struct drm_mode_object base ; struct drm_framebuffer_funcs const *funcs ; unsigned int pitch ; unsigned int width ; unsigned int height ; unsigned int depth ; int bits_per_pixel ; int flags ; void *fbdev ; u32 pseudo_palette[17U] ; struct list_head filp_head ; }; struct drm_property { struct list_head head ; struct drm_mode_object base ; uint32_t flags ; char name[32U] ; uint32_t num_values ; uint64_t *values ; struct list_head enum_blob_list ; }; struct drm_mode_config_funcs { struct drm_framebuffer *(*fb_create)(struct drm_device * , struct drm_file * , struct drm_mode_fb_cmd * ) ; int (*fb_changed)(struct drm_device * ) ; }; struct drm_mode_group { uint32_t num_crtcs ; uint32_t num_encoders ; uint32_t num_connectors ; uint32_t *id_list ; }; struct drm_mode_config { struct mutex mutex ; struct idr crtc_idr ; int num_fb ; struct list_head fb_list ; int num_connector ; struct list_head connector_list ; int num_encoder ; struct list_head encoder_list ; int num_crtc ; struct list_head crtc_list ; struct list_head property_list ; struct list_head fb_kernel_list ; int min_width ; int min_height ; int max_width ; int max_height ; struct drm_mode_config_funcs *funcs ; unsigned long fb_base ; struct list_head property_blob_list ; struct drm_property *edid_property ; struct drm_property *dpms_property ; struct drm_property *dvi_i_subconnector_property ; struct drm_property *dvi_i_select_subconnector_property ; struct drm_property *tv_subconnector_property ; struct drm_property *tv_select_subconnector_property ; struct drm_property *tv_mode_property ; struct drm_property *tv_left_margin_property ; struct drm_property *tv_right_margin_property ; struct drm_property *tv_top_margin_property ; struct drm_property *tv_bottom_margin_property ; struct drm_property *scaling_mode_property ; struct drm_property *dithering_mode_property ; }; struct drm_master { struct kref refcount ; struct list_head head ; struct drm_minor *minor ; char *unique ; int unique_len ; int unique_size ; int blocked ; struct drm_open_hash magiclist ; struct list_head magicfree ; struct drm_lock_data lock ; void *driver_priv ; }; struct drm_driver { int (*load)(struct drm_device * , unsigned long ) ; int (*firstopen)(struct drm_device * ) ; int (*open)(struct drm_device * , struct drm_file * ) ; void (*preclose)(struct drm_device * , struct drm_file * ) ; void (*postclose)(struct drm_device * , struct drm_file * ) ; void (*lastclose)(struct drm_device * ) ; int (*unload)(struct drm_device * ) ; int (*suspend)(struct drm_device * , pm_message_t ) ; int (*resume)(struct drm_device * ) ; int (*dma_ioctl)(struct drm_device * , void * , struct drm_file * ) ; void (*dma_ready)(struct drm_device * ) ; int (*dma_quiescent)(struct drm_device * ) ; int (*context_ctor)(struct drm_device * , int ) ; int (*context_dtor)(struct drm_device * , int ) ; int (*kernel_context_switch)(struct drm_device * , int , int ) ; void (*kernel_context_switch_unlock)(struct drm_device * ) ; int (*dri_library_name)(struct drm_device * , char * ) ; u32 (*get_vblank_counter)(struct drm_device * , int ) ; int (*enable_vblank)(struct drm_device * , int ) ; void (*disable_vblank)(struct drm_device * , int ) ; int (*device_is_agp)(struct drm_device * ) ; irqreturn_t (*irq_handler)(int , void * ) ; void (*irq_preinstall)(struct drm_device * ) ; int (*irq_postinstall)(struct drm_device * ) ; void (*irq_uninstall)(struct drm_device * ) ; void (*reclaim_buffers)(struct drm_device * , struct drm_file * ) ; void (*reclaim_buffers_locked)(struct drm_device * , struct drm_file * ) ; void (*reclaim_buffers_idlelocked)(struct drm_device * , struct drm_file * ) ; unsigned long (*get_map_ofs)(struct drm_map * ) ; unsigned long (*get_reg_ofs)(struct drm_device * ) ; void (*set_version)(struct drm_device * , struct drm_set_version * ) ; int (*master_create)(struct drm_device * , struct drm_master * ) ; void (*master_destroy)(struct drm_device * , struct drm_master * ) ; int (*proc_init)(struct drm_minor * ) ; void (*proc_cleanup)(struct drm_minor * ) ; int (*gem_init_object)(struct drm_gem_object * ) ; void (*gem_free_object)(struct drm_gem_object * ) ; struct vm_operations_struct *gem_vm_ops ; int major ; int minor ; int patchlevel ; char *name ; char *desc ; char *date ; u32 driver_features ; int dev_priv_size ; struct drm_ioctl_desc *ioctls ; int num_ioctls ; struct file_operations fops ; struct pci_driver pci_driver ; struct list_head device_list ; }; struct drm_minor { int index ; int type ; dev_t device ; struct device kdev ; struct drm_device *dev ; struct proc_dir_entry *dev_root ; struct drm_master *master ; struct list_head master_list ; struct drm_mode_group mode_group ; }; struct drm_device { struct list_head driver_item ; char *devname ; int if_version ; spinlock_t count_lock ; struct mutex struct_mutex ; int open_count ; atomic_t ioctl_count ; atomic_t vma_count ; int buf_use ; atomic_t buf_alloc ; unsigned long counters ; enum drm_stat_type types[15U] ; atomic_t counts[15U] ; struct list_head filelist ; struct list_head maplist ; int map_count ; struct drm_open_hash map_hash ; struct list_head ctxlist ; int ctx_count ; struct mutex ctxlist_mutex ; struct idr ctx_idr ; struct list_head vmalist ; int queue_count ; int queue_reserved ; int queue_slots ; struct drm_queue **queuelist ; struct drm_device_dma *dma ; int irq_enabled ; long volatile context_flag ; long volatile interrupt_flag ; long volatile dma_flag ; struct timer_list timer ; wait_queue_head_t context_wait ; int last_checked ; int last_context ; unsigned long last_switch ; struct work_struct work ; int vblank_disable_allowed ; wait_queue_head_t *vbl_queue ; atomic_t *_vblank_count ; spinlock_t vbl_lock ; struct list_head *vbl_sigs ; atomic_t vbl_signal_pending ; atomic_t *vblank_refcount ; u32 *last_vblank ; int *vblank_enabled ; int *vblank_inmodeset ; struct timer_list vblank_disable_timer ; u32 max_vblank_count ; cycles_t ctx_start ; cycles_t lck_start ; struct fasync_struct *buf_async ; wait_queue_head_t buf_readers ; wait_queue_head_t buf_writers ; struct drm_agp_head *agp ; struct pci_dev *pdev ; int pci_vendor ; int pci_device ; struct drm_sg_mem *sg ; int num_crtcs ; void *dev_private ; void *mm_private ; struct address_space *dev_mapping ; struct drm_sigdata sigdata ; sigset_t sigmask ; struct drm_driver *driver ; drm_local_map_t *agp_buffer_map ; unsigned int agp_buffer_token ; struct drm_minor *control ; struct drm_minor *primary ; spinlock_t drw_lock ; struct idr drw_idr ; struct drm_mode_config mode_config ; spinlock_t object_name_lock ; struct idr object_name_idr ; atomic_t object_count ; atomic_t object_memory ; atomic_t pin_count ; atomic_t pin_memory ; atomic_t gtt_count ; atomic_t gtt_memory ; uint32_t gtt_total ; uint32_t invalidate_domains ; uint32_t flush_domains ; }; struct io_mapping; struct _drm_i915_ring_buffer { int tail_mask ; unsigned long Size ; u8 *virtual_start ; int head ; int tail ; int space ; drm_local_map_t map ; struct drm_gem_object *ring_obj ; }; typedef struct _drm_i915_ring_buffer drm_i915_ring_buffer_t; struct mem_block { struct mem_block *next ; struct mem_block *prev ; int start ; int size ; struct drm_file *file_priv ; }; struct opregion_header; struct opregion_acpi; struct opregion_swsci; struct opregion_asle; struct intel_opregion { struct opregion_header *header ; struct opregion_acpi *acpi ; struct opregion_swsci *swsci ; struct opregion_asle *asle ; int enabled ; }; struct drm_i915_fence_reg { struct drm_gem_object *obj ; }; struct __anonstruct_mm_124 { struct drm_mm gtt_space ; struct io_mapping *gtt_mapping ; struct list_head active_list ; struct list_head flushing_list ; struct list_head inactive_list ; struct list_head request_list ; struct delayed_work retire_work ; uint32_t next_gem_seqno ; uint32_t waiting_gem_seqno ; uint32_t irq_gem_seqno ; int suspended ; int wedged ; uint32_t bit_6_swizzle_x ; uint32_t bit_6_swizzle_y ; }; struct drm_i915_private { struct drm_device *dev ; int has_gem ; void *regs ; drm_i915_ring_buffer_t ring ; drm_dma_handle_t *status_page_dmah ; void *hw_status_page ; dma_addr_t dma_status_page ; uint32_t counter ; unsigned int status_gfx_addr ; drm_local_map_t hws_map ; struct drm_gem_object *hws_obj ; unsigned int cpp ; int back_offset ; int front_offset ; int current_page ; int page_flipping ; wait_queue_head_t irq_queue ; atomic_t irq_received ; spinlock_t user_irq_lock ; int user_irq_refcount ; u32 irq_mask_reg ; u32 pipestat[2U] ; int tex_lru_log_granularity ; int allow_batchbuffer ; struct mem_block *agp_heap ; unsigned int sr01 ; unsigned int adpa ; unsigned int ppcr ; unsigned int dvob ; unsigned int dvoc ; unsigned int lvds ; int vblank_pipe ; bool cursor_needs_physical ; struct drm_mm vram ; int irq_enabled ; struct intel_opregion opregion ; int backlight_duty_cycle ; bool panel_wants_dither ; struct drm_display_mode *panel_fixed_mode ; struct drm_display_mode *vbt_mode ; unsigned char int_tv_support : 1 ; unsigned char lvds_dither : 1 ; unsigned char lvds_vbt : 1 ; unsigned char int_crt_support : 1 ; struct drm_i915_fence_reg fence_regs[16U] ; int fence_reg_start ; int num_fence_regs ; u8 saveLBB ; u32 saveDSPACNTR ; u32 saveDSPBCNTR ; u32 saveDSPARB ; u32 saveRENDERSTANDBY ; u32 saveHWS ; u32 savePIPEACONF ; u32 savePIPEBCONF ; u32 savePIPEASRC ; u32 savePIPEBSRC ; u32 saveFPA0 ; u32 saveFPA1 ; u32 saveDPLL_A ; u32 saveDPLL_A_MD ; u32 saveHTOTAL_A ; u32 saveHBLANK_A ; u32 saveHSYNC_A ; u32 saveVTOTAL_A ; u32 saveVBLANK_A ; u32 saveVSYNC_A ; u32 saveBCLRPAT_A ; u32 savePIPEASTAT ; u32 saveDSPASTRIDE ; u32 saveDSPASIZE ; u32 saveDSPAPOS ; u32 saveDSPAADDR ; u32 saveDSPASURF ; u32 saveDSPATILEOFF ; u32 savePFIT_PGM_RATIOS ; u32 saveBLC_PWM_CTL ; u32 saveBLC_PWM_CTL2 ; u32 saveFPB0 ; u32 saveFPB1 ; u32 saveDPLL_B ; u32 saveDPLL_B_MD ; u32 saveHTOTAL_B ; u32 saveHBLANK_B ; u32 saveHSYNC_B ; u32 saveVTOTAL_B ; u32 saveVBLANK_B ; u32 saveVSYNC_B ; u32 saveBCLRPAT_B ; u32 savePIPEBSTAT ; u32 saveDSPBSTRIDE ; u32 saveDSPBSIZE ; u32 saveDSPBPOS ; u32 saveDSPBADDR ; u32 saveDSPBSURF ; u32 saveDSPBTILEOFF ; u32 saveVGA0 ; u32 saveVGA1 ; u32 saveVGA_PD ; u32 saveVGACNTRL ; u32 saveADPA ; u32 saveLVDS ; u32 savePP_ON_DELAYS ; u32 savePP_OFF_DELAYS ; u32 saveDVOA ; u32 saveDVOB ; u32 saveDVOC ; u32 savePP_ON ; u32 savePP_OFF ; u32 savePP_CONTROL ; u32 savePP_DIVISOR ; u32 savePFIT_CONTROL ; u32 save_palette_a[256U] ; u32 save_palette_b[256U] ; u32 saveFBC_CFB_BASE ; u32 saveFBC_LL_BASE ; u32 saveFBC_CONTROL ; u32 saveFBC_CONTROL2 ; u32 saveIER ; u32 saveIIR ; u32 saveIMR ; u32 saveCACHE_MODE_0 ; u32 saveD_STATE ; u32 saveCG_2D_DIS ; u32 saveMI_ARB_STATE ; u32 saveSWF0[16U] ; u32 saveSWF1[16U] ; u32 saveSWF2[3U] ; u8 saveMSR ; u8 saveSR[8U] ; u8 saveGR[25U] ; u8 saveAR_INDEX ; u8 saveAR[21U] ; u8 saveDACMASK ; u8 saveDACDATA[768U] ; u8 saveCR[37U] ; struct __anonstruct_mm_124 mm ; }; typedef int ldv_func_ret_type___1; struct x8664_pda { struct task_struct *pcurrent ; unsigned long data_offset ; unsigned long kernelstack ; unsigned long oldrsp ; int irqcount ; unsigned int cpunumber ; char *irqstackptr ; short nodenumber ; short in_bootmem ; unsigned int __softirq_pending ; unsigned int __nmi_count ; short mmu_state ; short isidle ; struct mm_struct *active_mm ; unsigned int apic_timer_irqs ; unsigned int irq0_irqs ; unsigned int irq_resched_count ; unsigned int irq_call_count ; unsigned int irq_tlb_count ; unsigned int irq_thermal_count ; unsigned int irq_threshold_count ; unsigned int irq_spurious_count ; }; enum hrtimer_restart; struct __large_struct { unsigned long buf[100U] ; }; typedef unsigned int drm_handle_t; struct drm_clip_rect { unsigned short x1 ; unsigned short y1 ; unsigned short x2 ; unsigned short y2 ; }; struct drm_tex_region { unsigned char next ; unsigned char prev ; unsigned char in_use ; unsigned char padding ; unsigned int age ; }; enum ldv_19328 { I915_INIT_DMA = 1, I915_CLEANUP_DMA = 2, I915_RESUME_DMA = 3 } ; struct _drm_i915_init { enum ldv_19328 func ; unsigned int mmio_offset ; int sarea_priv_offset ; unsigned int ring_start ; unsigned int ring_end ; unsigned int ring_size ; unsigned int front_offset ; unsigned int back_offset ; unsigned int depth_offset ; unsigned int w ; unsigned int h ; unsigned int pitch ; unsigned int pitch_bits ; unsigned int back_pitch ; unsigned int depth_pitch ; unsigned int cpp ; unsigned int chipset ; }; typedef struct _drm_i915_init drm_i915_init_t; struct _drm_i915_sarea { struct drm_tex_region texList[256U] ; int last_upload ; int last_enqueue ; int last_dispatch ; int ctxOwner ; int texAge ; int pf_enabled ; int pf_active ; int pf_current_page ; int perf_boxes ; int width ; int height ; drm_handle_t front_handle ; int front_offset ; int front_size ; drm_handle_t back_handle ; int back_offset ; int back_size ; drm_handle_t depth_handle ; int depth_offset ; int depth_size ; drm_handle_t tex_handle ; int tex_offset ; int tex_size ; int log_tex_granularity ; int pitch ; int rotation ; int rotated_offset ; int rotated_size ; int rotated_pitch ; int virtualX ; int virtualY ; unsigned int front_tiled ; unsigned int back_tiled ; unsigned int depth_tiled ; unsigned int rotated_tiled ; unsigned int rotated2_tiled ; int pipeA_x ; int pipeA_y ; int pipeA_w ; int pipeA_h ; int pipeB_x ; int pipeB_y ; int pipeB_w ; int pipeB_h ; drm_handle_t unused_handle ; uint32_t unused1 ; uint32_t unused2 ; uint32_t unused3 ; uint32_t front_bo_handle ; uint32_t back_bo_handle ; uint32_t unused_bo_handle ; uint32_t depth_bo_handle ; }; typedef struct _drm_i915_sarea drm_i915_sarea_t; struct drm_i915_batchbuffer { int start ; int used ; int DR1 ; int DR4 ; int num_cliprects ; struct drm_clip_rect *cliprects ; }; typedef struct drm_i915_batchbuffer drm_i915_batchbuffer_t; struct _drm_i915_cmdbuffer { char *buf ; int sz ; int DR1 ; int DR4 ; int num_cliprects ; struct drm_clip_rect *cliprects ; }; typedef struct _drm_i915_cmdbuffer drm_i915_cmdbuffer_t; struct drm_i915_getparam { int param ; int *value ; }; typedef struct drm_i915_getparam drm_i915_getparam_t; struct drm_i915_setparam { int param ; int value ; }; typedef struct drm_i915_setparam drm_i915_setparam_t; struct drm_i915_hws_addr { uint64_t addr ; }; typedef struct drm_i915_hws_addr drm_i915_hws_addr_t; struct drm_i915_master_private { drm_local_map_t *sarea ; struct _drm_i915_sarea *sarea_priv ; }; typedef struct drm_i915_private drm_i915_private_t; struct __anonstruct_mm_125 { uint32_t last_gem_seqno ; uint32_t last_gem_throttle_seqno ; }; struct drm_i915_file_private { struct __anonstruct_mm_125 mm ; }; enum hrtimer_restart; struct drm_i915_irq_emit { int *irq_seq ; }; typedef struct drm_i915_irq_emit drm_i915_irq_emit_t; struct drm_i915_irq_wait { int irq_seq ; }; typedef struct drm_i915_irq_wait drm_i915_irq_wait_t; struct drm_i915_vblank_pipe { int pipe ; }; typedef struct drm_i915_vblank_pipe drm_i915_vblank_pipe_t; enum hrtimer_restart; struct drm_i915_mem_alloc { int region ; int alignment ; int size ; int *region_offset ; }; typedef struct drm_i915_mem_alloc drm_i915_mem_alloc_t; struct drm_i915_mem_free { int region ; int region_offset ; }; typedef struct drm_i915_mem_free drm_i915_mem_free_t; struct drm_i915_mem_init_heap { int region ; int size ; int start ; }; typedef struct drm_i915_mem_init_heap drm_i915_mem_init_heap_t; struct drm_i915_mem_destroy_heap { int region ; }; typedef struct drm_i915_mem_destroy_heap drm_i915_mem_destroy_heap_t; enum hrtimer_restart; enum pipe { PIPE_A = 0, PIPE_B = 1 } ; typedef unsigned char __u8; typedef __u8 uint8_t; enum hrtimer_restart; struct agp_memory { struct agp_memory *next ; struct agp_memory *prev ; struct agp_bridge_data *bridge ; unsigned long *memory ; size_t page_count ; int key ; int num_scratch_pages ; off_t pg_start ; u32 type ; u32 physical ; bool is_bound ; bool is_flushed ; bool vmalloc_flag ; struct list_head mapped_list ; }; typedef int filler_t(void * , struct page * ); struct drm_gem_mm { struct drm_mm offset_manager ; struct drm_open_hash offset_hash ; }; struct drm_i915_gem_init { uint64_t gtt_start ; uint64_t gtt_end ; }; struct drm_i915_gem_create { uint64_t size ; uint32_t handle ; uint32_t pad ; }; struct drm_i915_gem_pread { uint32_t handle ; uint32_t pad ; uint64_t offset ; uint64_t size ; uint64_t data_ptr ; }; struct drm_i915_gem_pwrite { uint32_t handle ; uint32_t pad ; uint64_t offset ; uint64_t size ; uint64_t data_ptr ; }; struct drm_i915_gem_mmap { uint32_t handle ; uint32_t pad ; uint64_t offset ; uint64_t size ; uint64_t addr_ptr ; }; struct drm_i915_gem_mmap_gtt { uint32_t handle ; uint32_t pad ; uint64_t offset ; }; struct drm_i915_gem_set_domain { uint32_t handle ; uint32_t read_domains ; uint32_t write_domain ; }; struct drm_i915_gem_sw_finish { uint32_t handle ; }; struct drm_i915_gem_relocation_entry { uint32_t target_handle ; uint32_t delta ; uint64_t offset ; uint64_t presumed_offset ; uint32_t read_domains ; uint32_t write_domain ; }; struct drm_i915_gem_exec_object { uint32_t handle ; uint32_t relocation_count ; uint64_t relocs_ptr ; uint64_t alignment ; uint64_t offset ; }; struct drm_i915_gem_execbuffer { uint64_t buffers_ptr ; uint32_t buffer_count ; uint32_t batch_start_offset ; uint32_t batch_len ; uint32_t DR1 ; uint32_t DR4 ; uint32_t num_cliprects ; uint64_t cliprects_ptr ; }; struct drm_i915_gem_pin { uint32_t handle ; uint32_t pad ; uint64_t alignment ; uint64_t offset ; }; struct drm_i915_gem_busy { uint32_t handle ; uint32_t busy ; }; struct drm_i915_gem_get_aperture { uint64_t aper_size ; uint64_t aper_available_size ; }; struct drm_i915_gem_object { struct drm_gem_object *obj ; struct drm_mm_node *gtt_space ; struct list_head list ; int active ; int dirty ; struct agp_memory *agp_mem ; struct page **page_list ; uint32_t gtt_offset ; uint32_t gtt_alignment ; uint64_t mmap_offset ; int fence_reg ; int gtt_bound ; int pin_count ; uint32_t last_rendering_seqno ; uint32_t tiling_mode ; uint32_t stride ; uint32_t agp_type ; uint8_t *page_cpu_valid ; uint32_t user_pin_count ; struct drm_file *pin_filp ; }; struct drm_i915_gem_request { uint32_t seqno ; unsigned long emitted_jiffies ; struct list_head list ; }; struct reclaim_state { unsigned long reclaimed_slab ; }; enum hrtimer_restart; struct drm_proc_list { char const *name ; int (*f)(char * , char ** , off_t , int , int * , void * ) ; }; enum hrtimer_restart; struct drm_i915_gem_set_tiling { uint32_t handle ; uint32_t tiling_mode ; uint32_t stride ; uint32_t swizzle_mode ; }; struct drm_i915_gem_get_tiling { uint32_t handle ; uint32_t tiling_mode ; uint32_t swizzle_mode ; }; typedef __u16 uint16_t; enum hrtimer_restart; struct i2c_device_id { char name[20U] ; kernel_ulong_t driver_data ; }; struct i2c_msg; struct i2c_algorithm; struct i2c_adapter; struct i2c_client; struct i2c_driver; union i2c_smbus_data; struct i2c_board_info; struct i2c_client_address_data; struct i2c_driver { int id ; unsigned int class ; int (*attach_adapter)(struct i2c_adapter * ) ; int (*detach_adapter)(struct i2c_adapter * ) ; int (*detach_client)(struct i2c_client * ) ; int (*probe)(struct i2c_client * , struct i2c_device_id const * ) ; int (*remove)(struct i2c_client * ) ; void (*shutdown)(struct i2c_client * ) ; int (*suspend)(struct i2c_client * , pm_message_t ) ; int (*resume)(struct i2c_client * ) ; int (*command)(struct i2c_client * , unsigned int , void * ) ; struct device_driver driver ; struct i2c_device_id const *id_table ; int (*detect)(struct i2c_client * , int , struct i2c_board_info * ) ; struct i2c_client_address_data const *address_data ; struct list_head clients ; }; struct i2c_client { unsigned short flags ; unsigned short addr ; char name[20U] ; struct i2c_adapter *adapter ; struct i2c_driver *driver ; struct device dev ; int irq ; struct list_head list ; struct list_head detected ; struct completion released ; }; struct i2c_board_info { char type[20U] ; unsigned short flags ; unsigned short addr ; void *platform_data ; struct dev_archdata *archdata ; int irq ; }; struct i2c_algorithm { int (*master_xfer)(struct i2c_adapter * , struct i2c_msg * , int ) ; int (*smbus_xfer)(struct i2c_adapter * , u16 , unsigned short , char , u8 , int , union i2c_smbus_data * ) ; u32 (*functionality)(struct i2c_adapter * ) ; }; struct i2c_adapter { struct module *owner ; unsigned int id ; unsigned int class ; struct i2c_algorithm const *algo ; void *algo_data ; int (*client_register)(struct i2c_client * ) ; int (*client_unregister)(struct i2c_client * ) ; u8 level ; struct mutex bus_lock ; struct mutex clist_lock ; int timeout ; int retries ; struct device dev ; int nr ; struct list_head clients ; char name[48U] ; struct completion dev_released ; }; struct i2c_client_address_data { unsigned short const *normal_i2c ; unsigned short const *probe ; unsigned short const *ignore ; unsigned short const * const *forces ; }; struct i2c_msg { __u16 addr ; __u16 flags ; __u16 len ; __u8 *buf ; }; union i2c_smbus_data { __u8 byte ; __u16 word ; __u8 block[34U] ; }; struct drm_mode_set; enum drm_connector_status { connector_status_connected = 1, connector_status_disconnected = 2, connector_status_unknown = 3 } ; enum subpixel_order { SubPixelUnknown = 0, SubPixelHorizontalRGB = 1, SubPixelHorizontalBGR = 2, SubPixelVerticalRGB = 3, SubPixelVerticalBGR = 4, SubPixelNone = 5 } ; enum ldv_18719 { monochrome = 0, rgb = 1, other = 2, unknown = 3 } ; struct drm_display_info { char name[32U] ; bool serration_vsync ; bool sync_on_green ; bool composite_sync ; bool separate_syncs ; bool blank_to_black ; unsigned char video_level ; bool digital ; unsigned int width_mm ; unsigned int height_mm ; unsigned char gamma ; bool gtf_supported ; bool standard_color ; enum ldv_18719 display_type ; bool active_off_supported ; bool suspend_supported ; bool standby_supported ; unsigned short redx ; unsigned short redy ; unsigned short greenx ; unsigned short greeny ; unsigned short bluex ; unsigned short bluey ; unsigned short whitex ; unsigned short whitey ; unsigned int min_vfreq ; unsigned int max_vfreq ; unsigned int min_hfreq ; unsigned int max_hfreq ; unsigned int pixel_clock ; unsigned int wpx1 ; unsigned int wpy1 ; unsigned int wpgamma1 ; unsigned int wpx2 ; unsigned int wpy2 ; unsigned int wpgamma2 ; enum subpixel_order subpixel_order ; char *raw_edid ; }; struct drm_property_blob { struct drm_mode_object base ; struct list_head head ; unsigned int length ; void *data ; }; struct drm_crtc; struct drm_connector; struct drm_encoder; struct drm_crtc_funcs { void (*save)(struct drm_crtc * ) ; void (*restore)(struct drm_crtc * ) ; int (*cursor_set)(struct drm_crtc * , struct drm_file * , uint32_t , uint32_t , uint32_t ) ; int (*cursor_move)(struct drm_crtc * , int , int ) ; void (*gamma_set)(struct drm_crtc * , u16 * , u16 * , u16 * , uint32_t ) ; void (*destroy)(struct drm_crtc * ) ; int (*set_config)(struct drm_mode_set * ) ; }; struct drm_crtc { struct drm_device *dev ; struct list_head head ; struct drm_mode_object base ; struct drm_framebuffer *fb ; bool enabled ; struct drm_display_mode mode ; int x ; int y ; struct drm_display_mode *desired_mode ; int desired_x ; int desired_y ; struct drm_crtc_funcs const *funcs ; uint32_t gamma_size ; uint16_t *gamma_store ; void *helper_private ; }; struct drm_connector_funcs { void (*dpms)(struct drm_connector * , int ) ; void (*save)(struct drm_connector * ) ; void (*restore)(struct drm_connector * ) ; enum drm_connector_status (*detect)(struct drm_connector * ) ; void (*fill_modes)(struct drm_connector * , uint32_t , uint32_t ) ; int (*set_property)(struct drm_connector * , struct drm_property * , uint64_t ) ; void (*destroy)(struct drm_connector * ) ; }; struct drm_encoder_funcs { void (*destroy)(struct drm_encoder * ) ; }; struct drm_encoder { struct drm_device *dev ; struct list_head head ; struct drm_mode_object base ; int encoder_type ; uint32_t possible_crtcs ; uint32_t possible_clones ; struct drm_crtc *crtc ; struct drm_encoder_funcs const *funcs ; void *helper_private ; }; struct drm_connector { struct drm_device *dev ; struct device kdev ; struct device_attribute *attr ; struct list_head head ; struct drm_mode_object base ; int connector_type ; int connector_type_id ; bool interlace_allowed ; bool doublescan_allowed ; struct list_head modes ; int initial_x ; int initial_y ; enum drm_connector_status status ; struct list_head probed_modes ; struct drm_display_info display_info ; struct drm_connector_funcs const *funcs ; struct list_head user_modes ; struct drm_property_blob *edid_blob_ptr ; u32 property_ids[16U] ; uint64_t property_values[16U] ; void *helper_private ; uint32_t encoder_ids[2U] ; uint32_t force_encoder_id ; struct drm_encoder *encoder ; }; struct drm_mode_set { struct list_head head ; struct drm_framebuffer *fb ; struct drm_crtc *crtc ; struct drm_display_mode *mode ; uint32_t x ; uint32_t y ; struct drm_connector **connectors ; size_t num_connectors ; }; struct i2c_algo_bit_data { void *data ; void (*setsda)(void * , int ) ; void (*setscl)(void * , int ) ; int (*getsda)(void * ) ; int (*getscl)(void * ) ; int udelay ; int timeout ; }; struct drm_crtc_helper_funcs { void (*dpms)(struct drm_crtc * , int ) ; void (*prepare)(struct drm_crtc * ) ; void (*commit)(struct drm_crtc * ) ; bool (*mode_fixup)(struct drm_crtc * , struct drm_display_mode * , struct drm_display_mode * ) ; void (*mode_set)(struct drm_crtc * , struct drm_display_mode * , struct drm_display_mode * , int , int , struct drm_framebuffer * ) ; void (*mode_set_base)(struct drm_crtc * , int , int , struct drm_framebuffer * ) ; }; struct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder * , int ) ; void (*save)(struct drm_encoder * ) ; void (*restore)(struct drm_encoder * ) ; bool (*mode_fixup)(struct drm_encoder * , struct drm_display_mode * , struct drm_display_mode * ) ; void (*prepare)(struct drm_encoder * ) ; void (*commit)(struct drm_encoder * ) ; void (*mode_set)(struct drm_encoder * , struct drm_display_mode * , struct drm_display_mode * ) ; enum drm_connector_status (*detect)(struct drm_encoder * , struct drm_connector * ) ; }; struct intel_i2c_chan { struct drm_device *drm_dev ; u32 reg ; struct i2c_adapter adapter ; struct i2c_algo_bit_data algo ; u8 slave_addr ; }; struct intel_framebuffer { struct drm_framebuffer base ; struct drm_gem_object *obj ; }; struct intel_output { struct drm_connector base ; struct drm_encoder enc ; int type ; struct intel_i2c_chan *i2c_bus ; struct intel_i2c_chan *ddc_bus ; bool load_detect_temp ; void *dev_priv ; }; struct intel_crtc { struct drm_crtc base ; int pipe ; int plane ; uint32_t cursor_addr ; u8 lut_r[256U] ; u8 lut_g[256U] ; u8 lut_b[256U] ; int dpms_mode ; struct intel_framebuffer *fbdev_fb ; struct drm_mode_set mode_set ; }; struct __anonstruct_intel_clock_t_126 { int n ; int m1 ; int m2 ; int p1 ; int p2 ; int dot ; int vco ; int m ; int p ; }; typedef struct __anonstruct_intel_clock_t_126 intel_clock_t; struct __anonstruct_intel_range_t_127 { int min ; int max ; }; typedef struct __anonstruct_intel_range_t_127 intel_range_t; struct __anonstruct_intel_p2_t_128 { int dot_limit ; int p2_slow ; int p2_fast ; }; typedef struct __anonstruct_intel_p2_t_128 intel_p2_t; struct __anonstruct_intel_limit_t_129 { intel_range_t dot ; intel_range_t vco ; intel_range_t n ; intel_range_t m ; intel_range_t m1 ; intel_range_t m2 ; intel_range_t p ; intel_range_t p1 ; intel_p2_t p2 ; }; typedef struct __anonstruct_intel_limit_t_129 intel_limit_t; enum hrtimer_restart; struct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector * ) ; int (*mode_valid)(struct drm_connector * , struct drm_display_mode * ) ; struct drm_encoder *(*best_encoder)(struct drm_connector * ) ; }; enum hrtimer_restart; enum hrtimer_restart; struct vbt_header { u8 signature[20U] ; u16 version ; u16 header_size ; u16 vbt_size ; u8 vbt_checksum ; u8 reserved0 ; u32 bdb_offset ; u32 aim_offset[4U] ; }; struct bdb_header { u8 signature[16U] ; u16 version ; u16 header_size ; u16 bdb_size ; }; struct bdb_general_features { unsigned char panel_fitting : 2 ; unsigned char flexaim : 1 ; unsigned char msg_enable : 1 ; unsigned char clear_screen : 3 ; unsigned char color_flip : 1 ; unsigned char download_ext_vbt : 1 ; unsigned char enable_ssc : 1 ; unsigned char ssc_freq : 1 ; unsigned char enable_lfp_on_override : 1 ; unsigned char disable_ssc_ddt : 1 ; unsigned char rsvd8 : 3 ; unsigned char disable_smooth_vision : 1 ; unsigned char single_dvi : 1 ; unsigned char rsvd9 : 6 ; u8 legacy_monitor_detect ; unsigned char int_crt_support : 1 ; unsigned char int_tv_support : 1 ; unsigned char rsvd11 : 6 ; }; struct bdb_lvds_options { u8 panel_type ; u8 rsvd1 ; unsigned char rsvd2 : 1 ; unsigned char lvds_edid : 1 ; unsigned char pixel_dither : 1 ; unsigned char pfit_ratio_auto : 1 ; unsigned char pfit_gfx_mode_enhanced : 1 ; unsigned char pfit_text_mode_enhanced : 1 ; unsigned char pfit_mode : 2 ; u8 rsvd4 ; }; struct lvds_fp_timing { u16 x_res ; u16 y_res ; u32 lvds_reg ; u32 lvds_reg_val ; u32 pp_on_reg ; u32 pp_on_reg_val ; u32 pp_off_reg ; u32 pp_off_reg_val ; u32 pp_cycle_reg ; u32 pp_cycle_reg_val ; u32 pfit_reg ; u32 pfit_reg_val ; u16 terminator ; }; struct lvds_dvo_timing { u16 clock ; u8 hactive_lo ; u8 hblank_lo ; unsigned char hblank_hi : 4 ; unsigned char hactive_hi : 4 ; u8 vactive_lo ; u8 vblank_lo ; unsigned char vblank_hi : 4 ; unsigned char vactive_hi : 4 ; u8 hsync_off_lo ; u8 hsync_pulse_width ; unsigned char vsync_pulse_width : 4 ; unsigned char vsync_off : 4 ; unsigned char rsvd0 : 6 ; unsigned char hsync_off_hi : 2 ; u8 h_image ; u8 v_image ; u8 max_hv ; u8 h_border ; u8 v_border ; unsigned char rsvd1 : 3 ; unsigned char digital : 2 ; unsigned char vsync_positive : 1 ; unsigned char hsync_positive : 1 ; unsigned char rsvd2 : 1 ; }; struct lvds_pnp_id { u16 mfg_name ; u16 product_code ; u32 serial ; u8 mfg_week ; u8 mfg_year ; }; struct bdb_lvds_lfp_data_entry { struct lvds_fp_timing fp_timing ; struct lvds_dvo_timing dvo_timing ; struct lvds_pnp_id pnp_id ; }; struct bdb_lvds_lfp_data { struct bdb_lvds_lfp_data_entry data[16U] ; }; enum hrtimer_restart; struct intel_sdvo_caps { u8 vendor_id ; u8 device_id ; u8 device_rev_id ; u8 sdvo_version_major ; u8 sdvo_version_minor ; unsigned char sdvo_inputs_mask : 2 ; unsigned char smooth_scaling : 1 ; unsigned char sharp_scaling : 1 ; unsigned char up_scaling : 1 ; unsigned char down_scaling : 1 ; unsigned char stall_support : 1 ; unsigned char pad : 1 ; u16 output_flags ; }; struct __anonstruct_part1_126 { u16 clock ; u8 h_active ; u8 h_blank ; u8 h_high ; u8 v_active ; u8 v_blank ; u8 v_high ; }; struct __anonstruct_part2_127 { u8 h_sync_off ; u8 h_sync_width ; u8 v_sync_off_width ; u8 sync_off_width_high ; u8 dtd_flags ; u8 sdvo_flags ; u8 v_sync_off_high ; u8 reserved ; }; struct intel_sdvo_dtd { struct __anonstruct_part1_126 part1 ; struct __anonstruct_part2_127 part2 ; }; struct intel_sdvo_pixel_clock_range { u16 min ; u16 max ; }; struct intel_sdvo_get_trained_inputs_response { unsigned char input0_trained : 1 ; unsigned char input1_trained : 1 ; unsigned char pad : 6 ; }; struct intel_sdvo_set_target_input_args { unsigned char target_1 : 1 ; unsigned char pad : 7 ; }; struct intel_sdvo_priv { struct intel_i2c_chan *i2c_bus ; int slaveaddr ; int output_device ; u16 active_outputs ; struct intel_sdvo_caps caps ; int pixel_clock_min ; int pixel_clock_max ; int save_sdvo_mult ; u16 save_active_outputs ; struct intel_sdvo_dtd save_input_dtd_1 ; struct intel_sdvo_dtd save_input_dtd_2 ; struct intel_sdvo_dtd save_output_dtd[16U] ; u32 save_SDVOX ; }; enum hrtimer_restart; struct edid; enum hrtimer_restart; struct atomic_notifier_head; struct notifier_block { int (*notifier_call)(struct notifier_block * , unsigned long , void * ) ; struct notifier_block *next ; int priority ; }; struct atomic_notifier_head { spinlock_t lock ; struct notifier_block *head ; }; enum hrtimer_restart; typedef unsigned char cc_t; typedef unsigned int speed_t; typedef unsigned int tcflag_t; struct ktermios { tcflag_t c_iflag ; tcflag_t c_oflag ; tcflag_t c_cflag ; tcflag_t c_lflag ; cc_t c_line ; cc_t c_cc[19U] ; speed_t c_ispeed ; speed_t c_ospeed ; }; struct winsize { unsigned short ws_row ; unsigned short ws_col ; unsigned short ws_xpixel ; unsigned short ws_ypixel ; }; struct termiox { __u16 x_hflag ; __u16 x_cflag ; __u16 x_rflag[5U] ; __u16 x_sflag ; }; struct tty_driver; struct tty_operations { struct tty_struct *(*lookup)(struct tty_driver * , struct inode * , int ) ; int (*install)(struct tty_driver * , struct tty_struct * ) ; void (*remove)(struct tty_driver * , struct tty_struct * ) ; int (*open)(struct tty_struct * , struct file * ) ; void (*close)(struct tty_struct * , struct file * ) ; void (*shutdown)(struct tty_struct * ) ; int (*write)(struct tty_struct * , unsigned char const * , int ) ; int (*put_char)(struct tty_struct * , unsigned char ) ; void (*flush_chars)(struct tty_struct * ) ; int (*write_room)(struct tty_struct * ) ; int (*chars_in_buffer)(struct tty_struct * ) ; int (*ioctl)(struct tty_struct * , struct file * , unsigned int , unsigned long ) ; long (*compat_ioctl)(struct tty_struct * , struct file * , unsigned int , unsigned long ) ; void (*set_termios)(struct tty_struct * , struct ktermios * ) ; void (*throttle)(struct tty_struct * ) ; void (*unthrottle)(struct tty_struct * ) ; void (*stop)(struct tty_struct * ) ; void (*start)(struct tty_struct * ) ; void (*hangup)(struct tty_struct * ) ; int (*break_ctl)(struct tty_struct * , int ) ; void (*flush_buffer)(struct tty_struct * ) ; void (*set_ldisc)(struct tty_struct * ) ; void (*wait_until_sent)(struct tty_struct * , int ) ; void (*send_xchar)(struct tty_struct * , char ) ; int (*read_proc)(char * , char ** , off_t , int , int * , void * ) ; int (*tiocmget)(struct tty_struct * , struct file * ) ; int (*tiocmset)(struct tty_struct * , struct file * , unsigned int , unsigned int ) ; int (*resize)(struct tty_struct * , struct tty_struct * , struct winsize * ) ; int (*set_termiox)(struct tty_struct * , struct termiox * ) ; int (*poll_init)(struct tty_driver * , int , char * ) ; int (*poll_get_char)(struct tty_driver * , int ) ; void (*poll_put_char)(struct tty_driver * , int , char ) ; }; struct tty_driver { int magic ; struct kref kref ; struct cdev cdev ; struct module *owner ; char const *driver_name ; char const *name ; int name_base ; int major ; int minor_start ; int minor_num ; int num ; short type ; short subtype ; struct ktermios init_termios ; int flags ; struct proc_dir_entry *proc_entry ; struct tty_driver *other ; struct tty_struct **ttys ; struct ktermios **termios ; struct ktermios **termios_locked ; void *driver_state ; struct tty_operations const *ops ; struct list_head tty_drivers ; }; struct tty_ldisc_ops { int magic ; char *name ; int num ; int flags ; int (*open)(struct tty_struct * ) ; void (*close)(struct tty_struct * ) ; void (*flush_buffer)(struct tty_struct * ) ; ssize_t (*chars_in_buffer)(struct tty_struct * ) ; ssize_t (*read)(struct tty_struct * , struct file * , unsigned char * , size_t ) ; ssize_t (*write)(struct tty_struct * , struct file * , unsigned char const * , size_t ) ; int (*ioctl)(struct tty_struct * , struct file * , unsigned int , unsigned long ) ; long (*compat_ioctl)(struct tty_struct * , struct file * , unsigned int , unsigned long ) ; void (*set_termios)(struct tty_struct * , struct ktermios * ) ; unsigned int (*poll)(struct tty_struct * , struct file * , struct poll_table_struct * ) ; int (*hangup)(struct tty_struct * ) ; void (*receive_buf)(struct tty_struct * , unsigned char const * , char * , int ) ; void (*write_wakeup)(struct tty_struct * ) ; struct module *owner ; int refcount ; }; struct tty_ldisc { struct tty_ldisc_ops *ops ; int refcount ; }; struct tty_buffer { struct tty_buffer *next ; char *char_buf_ptr ; unsigned char *flag_buf_ptr ; int used ; int size ; int commit ; int read ; unsigned long data[0U] ; }; struct tty_bufhead { struct delayed_work work ; spinlock_t lock ; struct tty_buffer *head ; struct tty_buffer *tail ; struct tty_buffer *free ; int memory_used ; }; struct tty_port { struct tty_struct *tty ; spinlock_t lock ; int blocked_open ; int count ; wait_queue_head_t open_wait ; wait_queue_head_t close_wait ; unsigned long flags ; struct mutex mutex ; unsigned char *xmit_buf ; int close_delay ; int closing_wait ; }; struct tty_struct { int magic ; struct kref kref ; struct tty_driver *driver ; struct tty_operations const *ops ; int index ; struct tty_ldisc ldisc ; struct mutex termios_mutex ; spinlock_t ctrl_lock ; struct ktermios *termios ; struct ktermios *termios_locked ; struct termiox *termiox ; char name[64U] ; struct pid *pgrp ; struct pid *session ; unsigned long flags ; int count ; struct winsize winsize ; unsigned char stopped : 1 ; unsigned char hw_stopped : 1 ; unsigned char flow_stopped : 1 ; unsigned char packet : 1 ; unsigned char low_latency : 1 ; unsigned char warned : 1 ; unsigned char ctrl_status ; unsigned int receive_room ; struct tty_struct *link ; struct fasync_struct *fasync ; struct tty_bufhead buf ; int alt_speed ; wait_queue_head_t write_wait ; wait_queue_head_t read_wait ; struct work_struct hangup_work ; void *disc_data ; void *driver_data ; struct list_head tty_files ; unsigned int column ; unsigned char lnext : 1 ; unsigned char erasing : 1 ; unsigned char raw : 1 ; unsigned char real_raw : 1 ; unsigned char icanon : 1 ; unsigned char closing : 1 ; unsigned short minimum_to_wake ; unsigned long overrun_time ; int num_overrun ; unsigned long process_char_map[4U] ; char *read_buf ; int read_head ; int read_tail ; int read_cnt ; unsigned long read_flags[64U] ; int canon_data ; unsigned long canon_head ; unsigned int canon_column ; struct mutex atomic_read_lock ; struct mutex atomic_write_lock ; unsigned char *write_buf ; int write_cnt ; spinlock_t read_lock ; struct work_struct SAK_work ; struct tty_port *port ; }; struct sysrq_key_op { void (*handler)(int , struct tty_struct * ) ; char *help_msg ; char *action_msg ; int enable_mask ; }; struct fb_fix_screeninfo { char id[16U] ; unsigned long smem_start ; __u32 smem_len ; __u32 type ; __u32 type_aux ; __u32 visual ; __u16 xpanstep ; __u16 ypanstep ; __u16 ywrapstep ; __u32 line_length ; unsigned long mmio_start ; __u32 mmio_len ; __u32 accel ; __u16 reserved[3U] ; }; struct fb_bitfield { __u32 offset ; __u32 length ; __u32 msb_right ; }; struct fb_var_screeninfo { __u32 xres ; __u32 yres ; __u32 xres_virtual ; __u32 yres_virtual ; __u32 xoffset ; __u32 yoffset ; __u32 bits_per_pixel ; __u32 grayscale ; struct fb_bitfield red ; struct fb_bitfield green ; struct fb_bitfield blue ; struct fb_bitfield transp ; __u32 nonstd ; __u32 activate ; __u32 height ; __u32 width ; __u32 accel_flags ; __u32 pixclock ; __u32 left_margin ; __u32 right_margin ; __u32 upper_margin ; __u32 lower_margin ; __u32 hsync_len ; __u32 vsync_len ; __u32 sync ; __u32 vmode ; __u32 rotate ; __u32 reserved[5U] ; }; struct fb_cmap { __u32 start ; __u32 len ; __u16 *red ; __u16 *green ; __u16 *blue ; __u16 *transp ; }; struct fb_copyarea { __u32 dx ; __u32 dy ; __u32 width ; __u32 height ; __u32 sx ; __u32 sy ; }; struct fb_fillrect { __u32 dx ; __u32 dy ; __u32 width ; __u32 height ; __u32 color ; __u32 rop ; }; struct fb_image { __u32 dx ; __u32 dy ; __u32 width ; __u32 height ; __u32 fg_color ; __u32 bg_color ; __u8 depth ; char const *data ; struct fb_cmap cmap ; }; struct fbcurpos { __u16 x ; __u16 y ; }; struct fb_cursor { __u16 set ; __u16 enable ; __u16 rop ; char const *mask ; struct fbcurpos hot ; struct fb_image image ; }; struct backlight_device; struct fb_info; struct backlight_ops { int (*update_status)(struct backlight_device * ) ; int (*get_brightness)(struct backlight_device * ) ; int (*check_fb)(struct fb_info * ) ; }; struct backlight_properties { int brightness ; int max_brightness ; int power ; int fb_blank ; }; struct backlight_device { struct backlight_properties props ; struct mutex update_lock ; struct mutex ops_lock ; struct backlight_ops *ops ; struct notifier_block fb_notif ; struct device dev ; }; struct fb_chroma { __u32 redx ; __u32 greenx ; __u32 bluex ; __u32 whitex ; __u32 redy ; __u32 greeny ; __u32 bluey ; __u32 whitey ; }; struct fb_videomode; struct fb_monspecs { struct fb_chroma chroma ; struct fb_videomode *modedb ; __u8 manufacturer[4U] ; __u8 monitor[14U] ; __u8 serial_no[14U] ; __u8 ascii[14U] ; __u32 modedb_len ; __u32 model ; __u32 serial ; __u32 year ; __u32 week ; __u32 hfmin ; __u32 hfmax ; __u32 dclkmin ; __u32 dclkmax ; __u16 input ; __u16 dpms ; __u16 signal ; __u16 vfmin ; __u16 vfmax ; __u16 gamma ; unsigned char gtf : 1 ; __u16 misc ; __u8 version ; __u8 revision ; __u8 max_x ; __u8 max_y ; }; struct fb_blit_caps { u32 x ; u32 y ; u32 len ; u32 flags ; }; struct fb_pixmap { u8 *addr ; u32 size ; u32 offset ; u32 buf_align ; u32 scan_align ; u32 access_align ; u32 flags ; u32 blit_x ; u32 blit_y ; void (*writeio)(struct fb_info * , void * , void * , unsigned int ) ; void (*readio)(struct fb_info * , void * , void * , unsigned int ) ; }; struct fb_deferred_io { unsigned long delay ; struct mutex lock ; struct list_head pagelist ; void (*deferred_io)(struct fb_info * , struct list_head * ) ; }; struct fb_ops { struct module *owner ; int (*fb_open)(struct fb_info * , int ) ; int (*fb_release)(struct fb_info * , int ) ; ssize_t (*fb_read)(struct fb_info * , char * , size_t , loff_t * ) ; ssize_t (*fb_write)(struct fb_info * , char const * , size_t , loff_t * ) ; int (*fb_check_var)(struct fb_var_screeninfo * , struct fb_info * ) ; int (*fb_set_par)(struct fb_info * ) ; int (*fb_setcolreg)(unsigned int , unsigned int , unsigned int , unsigned int , unsigned int , struct fb_info * ) ; int (*fb_setcmap)(struct fb_cmap * , struct fb_info * ) ; int (*fb_blank)(int , struct fb_info * ) ; int (*fb_pan_display)(struct fb_var_screeninfo * , struct fb_info * ) ; void (*fb_fillrect)(struct fb_info * , struct fb_fillrect const * ) ; void (*fb_copyarea)(struct fb_info * , struct fb_copyarea const * ) ; void (*fb_imageblit)(struct fb_info * , struct fb_image const * ) ; int (*fb_cursor)(struct fb_info * , struct fb_cursor * ) ; void (*fb_rotate)(struct fb_info * , int ) ; int (*fb_sync)(struct fb_info * ) ; int (*fb_ioctl)(struct fb_info * , unsigned int , unsigned long ) ; int (*fb_compat_ioctl)(struct fb_info * , unsigned int , unsigned long ) ; int (*fb_mmap)(struct fb_info * , struct vm_area_struct * ) ; void (*fb_save_state)(struct fb_info * ) ; void (*fb_restore_state)(struct fb_info * ) ; void (*fb_get_caps)(struct fb_info * , struct fb_blit_caps * , struct fb_var_screeninfo * ) ; }; struct fb_tilemap { __u32 width ; __u32 height ; __u32 depth ; __u32 length ; __u8 const *data ; }; struct fb_tilerect { __u32 sx ; __u32 sy ; __u32 width ; __u32 height ; __u32 index ; __u32 fg ; __u32 bg ; __u32 rop ; }; struct fb_tilearea { __u32 sx ; __u32 sy ; __u32 dx ; __u32 dy ; __u32 width ; __u32 height ; }; struct fb_tileblit { __u32 sx ; __u32 sy ; __u32 width ; __u32 height ; __u32 fg ; __u32 bg ; __u32 length ; __u32 *indices ; }; struct fb_tilecursor { __u32 sx ; __u32 sy ; __u32 mode ; __u32 shape ; __u32 fg ; __u32 bg ; }; struct fb_tile_ops { void (*fb_settile)(struct fb_info * , struct fb_tilemap * ) ; void (*fb_tilecopy)(struct fb_info * , struct fb_tilearea * ) ; void (*fb_tilefill)(struct fb_info * , struct fb_tilerect * ) ; void (*fb_tileblit)(struct fb_info * , struct fb_tileblit * ) ; void (*fb_tilecursor)(struct fb_info * , struct fb_tilecursor * ) ; int (*fb_get_tilemax)(struct fb_info * ) ; }; struct fb_info { int node ; int flags ; struct mutex lock ; struct fb_var_screeninfo var ; struct fb_fix_screeninfo fix ; struct fb_monspecs monspecs ; struct work_struct queue ; struct fb_pixmap pixmap ; struct fb_pixmap sprite ; struct fb_cmap cmap ; struct list_head modelist ; struct fb_videomode *mode ; struct backlight_device *bl_dev ; struct mutex bl_curve_mutex ; u8 bl_curve[128U] ; struct delayed_work deferred_work ; struct fb_deferred_io *fbdefio ; struct fb_ops *fbops ; struct device *device ; struct device *dev ; int class_flag ; struct fb_tile_ops *tileops ; char *screen_base ; unsigned long screen_size ; void *pseudo_palette ; u32 state ; void *fbcon_par ; void *par ; }; struct fb_videomode { char const *name ; u32 refresh ; u32 xres ; u32 yres ; u32 pixclock ; u32 left_margin ; u32 right_margin ; u32 upper_margin ; u32 lower_margin ; u32 hsync_len ; u32 vsync_len ; u32 sync ; u32 vmode ; u32 flag ; }; struct intelfb_par { struct drm_device *dev ; struct drm_display_mode *our_mode ; struct intel_framebuffer *intel_fb ; int crtc_count ; uint32_t crtc_ids[2U] ; }; enum hrtimer_restart; struct intel_tv_priv { int type ; char *tv_format ; int margin[4U] ; u32 save_TV_H_CTL_1 ; u32 save_TV_H_CTL_2 ; u32 save_TV_H_CTL_3 ; u32 save_TV_V_CTL_1 ; u32 save_TV_V_CTL_2 ; u32 save_TV_V_CTL_3 ; u32 save_TV_V_CTL_4 ; u32 save_TV_V_CTL_5 ; u32 save_TV_V_CTL_6 ; u32 save_TV_V_CTL_7 ; u32 save_TV_SC_CTL_1 ; u32 save_TV_SC_CTL_2 ; u32 save_TV_SC_CTL_3 ; u32 save_TV_CSC_Y ; u32 save_TV_CSC_Y2 ; u32 save_TV_CSC_U ; u32 save_TV_CSC_U2 ; u32 save_TV_CSC_V ; u32 save_TV_CSC_V2 ; u32 save_TV_CLR_KNOBS ; u32 save_TV_CLR_LEVEL ; u32 save_TV_WIN_POS ; u32 save_TV_WIN_SIZE ; u32 save_TV_FILTER_CTL_1 ; u32 save_TV_FILTER_CTL_2 ; u32 save_TV_FILTER_CTL_3 ; u32 save_TV_H_LUMA[60U] ; u32 save_TV_H_CHROMA[60U] ; u32 save_TV_V_LUMA[43U] ; u32 save_TV_V_CHROMA[43U] ; u32 save_TV_DAC ; u32 save_TV_CTL ; }; struct video_levels { int blank ; int black ; int burst ; }; struct color_conversion { u16 ry ; u16 gy ; u16 by ; u16 ay ; u16 ru ; u16 gu ; u16 bu ; u16 au ; u16 rv ; u16 gv ; u16 bv ; u16 av ; }; struct tv_mode { char *name ; int clock ; int refresh ; u32 oversample ; int hsync_end ; int hblank_start ; int hblank_end ; int htotal ; bool progressive ; bool trilevel_sync ; bool component_only ; int vsync_start_f1 ; int vsync_start_f2 ; int vsync_len ; bool veq_ena ; int veq_start_f1 ; int veq_start_f2 ; int veq_len ; int vi_end_f1 ; int vi_end_f2 ; int nbr_end ; bool burst_ena ; int hburst_start ; int hburst_len ; int vburst_start_f1 ; int vburst_end_f1 ; int vburst_start_f2 ; int vburst_end_f2 ; int vburst_start_f3 ; int vburst_end_f3 ; int vburst_start_f4 ; int vburst_end_f4 ; int dda2_size ; int dda3_size ; int dda1_inc ; int dda2_inc ; int dda3_inc ; u32 sc_reset ; bool pal_burst ; struct video_levels const *composite_levels ; struct video_levels const *svideo_levels ; struct color_conversion const *composite_color ; struct color_conversion const *svideo_color ; u32 const *filter_table ; int max_srcw ; }; struct input_res { char *name ; int w ; int h ; }; enum hrtimer_restart; struct intel_dvo_dev_ops; struct intel_dvo_device { char *name ; int type ; u32 dvo_reg ; u32 gpio ; int slave_addr ; struct intel_i2c_chan *i2c_bus ; struct intel_dvo_dev_ops const *dev_ops ; void *dev_priv ; struct drm_display_mode *panel_fixed_mode ; bool panel_wants_dither ; }; struct intel_dvo_dev_ops { bool (*init)(struct intel_dvo_device * , struct intel_i2c_chan * ) ; void (*create_resources)(struct intel_dvo_device * ) ; void (*dpms)(struct intel_dvo_device * , int ) ; void (*save)(struct intel_dvo_device * ) ; void (*restore)(struct intel_dvo_device * ) ; int (*mode_valid)(struct intel_dvo_device * , struct drm_display_mode * ) ; bool (*mode_fixup)(struct intel_dvo_device * , struct drm_display_mode * , struct drm_display_mode * ) ; void (*prepare)(struct intel_dvo_device * ) ; void (*commit)(struct intel_dvo_device * ) ; void (*mode_set)(struct intel_dvo_device * , struct drm_display_mode * , struct drm_display_mode * ) ; enum drm_connector_status (*detect)(struct intel_dvo_device * ) ; struct drm_display_mode *(*get_modes)(struct intel_dvo_device * ) ; void (*destroy)(struct intel_dvo_device * ) ; void (*dump_regs)(struct intel_dvo_device * ) ; }; enum hrtimer_restart; struct ch7xxx_id_struct { uint8_t vid ; char *name ; }; struct ch7xxx_reg_state { uint8_t regs[76U] ; }; struct ch7xxx_priv { bool quiet ; struct ch7xxx_reg_state save_reg ; struct ch7xxx_reg_state mode_reg ; uint8_t save_TCTL ; uint8_t save_TPCP ; uint8_t save_TPD ; uint8_t save_TPVT ; uint8_t save_TLPF ; uint8_t save_TCT ; uint8_t save_PM ; uint8_t save_IDF ; }; enum hrtimer_restart; struct ch7017_priv { uint8_t save_hapi ; uint8_t save_vali ; uint8_t save_valo ; uint8_t save_ailo ; uint8_t save_lvds_pll_vco ; uint8_t save_feedback_div ; uint8_t save_lvds_control_2 ; uint8_t save_outputs_enable ; uint8_t save_lvds_power_down ; uint8_t save_power_management ; }; enum hrtimer_restart; struct ivch_priv { bool quiet ; uint16_t width ; uint16_t height ; uint16_t save_VR01 ; uint16_t save_VR40 ; }; enum hrtimer_restart; struct tfp410_save_rec { uint8_t ctl1 ; uint8_t ctl2 ; }; struct tfp410_priv { bool quiet ; struct tfp410_save_rec saved_reg ; struct tfp410_save_rec mode_reg ; }; enum hrtimer_restart; struct sil164_save_rec { uint8_t reg8 ; uint8_t reg9 ; uint8_t regc ; }; struct sil164_priv { bool quiet ; struct sil164_save_rec save_regs ; struct sil164_save_rec mode_regs ; }; enum hrtimer_restart; struct opregion_header { u8 signature[16U] ; u32 size ; u32 opregion_ver ; u8 bios_ver[32U] ; u8 vbios_ver[16U] ; u8 driver_ver[16U] ; u32 mboxes ; u8 reserved[164U] ; }; struct opregion_acpi { u32 drdy ; u32 csts ; u32 cevt ; u8 rsvd1[20U] ; u32 didl[8U] ; u32 cpdl[8U] ; u32 cadl[8U] ; u32 nadl[8U] ; u32 aslp ; u32 tidx ; u32 chpd ; u32 clid ; u32 cdck ; u32 sxsw ; u32 evts ; u32 cnot ; u32 nrdy ; u8 rsvd2[60U] ; }; struct opregion_swsci { u32 scic ; u32 parm ; u32 dslp ; u8 rsvd[244U] ; }; struct opregion_asle { u32 ardy ; u32 aslc ; u32 tche ; u32 alsi ; u32 bclp ; u32 pfit ; u32 cblv ; u16 bclm[20U] ; u32 cpfm ; u32 epfm ; u8 plut[74U] ; u32 pfmb ; u8 rsvd[102U] ; }; enum hrtimer_restart; typedef int drm_ioctl_compat_t(struct file * , unsigned int , unsigned long ); struct _drm_i915_batchbuffer32 { int start ; int used ; int DR1 ; int DR4 ; int num_cliprects ; u32 cliprects ; }; typedef struct _drm_i915_batchbuffer32 drm_i915_batchbuffer32_t; struct _drm_i915_cmdbuffer32 { u32 buf ; int sz ; int DR1 ; int DR4 ; int num_cliprects ; u32 cliprects ; }; typedef struct _drm_i915_cmdbuffer32 drm_i915_cmdbuffer32_t; struct drm_i915_irq_emit32 { u32 irq_seq ; }; typedef struct drm_i915_irq_emit32 drm_i915_irq_emit32_t; struct drm_i915_getparam32 { int param ; u32 value ; }; typedef struct drm_i915_getparam32 drm_i915_getparam32_t; struct drm_i915_mem_alloc32 { int region ; int alignment ; int size ; u32 region_offset ; }; typedef struct drm_i915_mem_alloc32 drm_i915_mem_alloc32_t; extern int printk(char const * , ...) ; extern void __ldv_spin_lock(spinlock_t * ) ; void ldv___ldv_spin_lock_1(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_4(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_5(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_8(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_10(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_12(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_14(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_16(spinlock_t *ldv_func_arg1 ) ; extern void __ldv_spin_unlock(spinlock_t * ) ; void ldv___ldv_spin_unlock_2(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_6(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_7(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_9(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_11(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_13(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_15(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_17(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_18(spinlock_t *ldv_func_arg1 ) ; extern int __ldv_spin_trylock(spinlock_t * ) ; int ldv___ldv_spin_trylock_3(spinlock_t *ldv_func_arg1 ) ; void ldv_spin_lock_alloc_lock_of_task_struct(void) ; void ldv_spin_unlock_alloc_lock_of_task_struct(void) ; void ldv_spin_lock_d_lock_of_dentry(void) ; void ldv_spin_unlock_d_lock_of_dentry(void) ; void ldv_spin_lock_dcache_lock(void) ; void ldv_spin_unlock_dcache_lock(void) ; void ldv_spin_lock_i_lock_of_inode(void) ; void ldv_spin_unlock_i_lock_of_inode(void) ; void ldv_spin_lock_lock_of_NOT_ARG_SIGN(void) ; void ldv_spin_unlock_lock_of_NOT_ARG_SIGN(void) ; int ldv_spin_trylock_lock_of_NOT_ARG_SIGN(void) ; void ldv_spin_lock_siglock_of_sighand_struct(void) ; void ldv_spin_unlock_siglock_of_sighand_struct(void) ; extern struct module __this_module ; extern int pci_enable_device(struct pci_dev * ) ; extern void pci_disable_device(struct pci_dev * ) ; extern void pci_set_master(struct pci_dev * ) ; extern int pci_save_state(struct pci_dev * ) ; extern int pci_restore_state(struct pci_dev * ) ; extern int pci_set_power_state(struct pci_dev * , pci_power_t ) ; extern int drm_init(struct drm_driver * ) ; extern void drm_exit(struct drm_driver * ) ; extern int drm_ioctl(struct inode * , struct file * , unsigned int , unsigned long ) ; extern int drm_open(struct inode * , struct file * ) ; extern int drm_fasync(int , struct file * , int ) ; extern int drm_release(struct inode * , struct file * ) ; extern unsigned long drm_core_get_map_ofs(struct drm_map * ) ; extern unsigned long drm_core_get_reg_ofs(struct drm_device * ) ; extern unsigned int drm_poll(struct file * , struct poll_table_struct * ) ; extern void drm_core_reclaim_buffers(struct drm_device * , struct drm_file * ) ; extern int drm_gem_mmap(struct file * , struct vm_area_struct * ) ; struct drm_ioctl_desc i915_ioctls[37U] ; int i915_max_ioctl ; unsigned int i915_fbpercrtc ; int i915_master_create(struct drm_device *dev , struct drm_master *master ) ; void i915_master_destroy(struct drm_device *dev , struct drm_master *master ) ; int i915_driver_load(struct drm_device *dev , unsigned long flags ) ; int i915_driver_unload(struct drm_device *dev ) ; int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv ) ; void i915_driver_lastclose(struct drm_device *dev ) ; void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv ) ; void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv ) ; int i915_driver_device_is_agp(struct drm_device *dev ) ; long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ; irqreturn_t i915_driver_irq_handler(int irq , void *arg ) ; void i915_driver_irq_preinstall(struct drm_device *dev ) ; int i915_driver_irq_postinstall(struct drm_device *dev ) ; void i915_driver_irq_uninstall(struct drm_device *dev ) ; int i915_enable_vblank(struct drm_device *dev , int pipe ) ; void i915_disable_vblank(struct drm_device *dev , int pipe ) ; u32 i915_get_vblank_counter(struct drm_device *dev , int pipe ) ; int i915_gem_proc_init(struct drm_minor *minor ) ; void i915_gem_proc_cleanup(struct drm_minor *minor ) ; int i915_gem_init_object(struct drm_gem_object *obj ) ; void i915_gem_free_object(struct drm_gem_object *obj ) ; int i915_gem_fault(struct vm_area_struct *vma , struct vm_fault *vmf ) ; int i915_save_state(struct drm_device *dev ) ; int i915_restore_state(struct drm_device *dev ) ; int intel_opregion_init(struct drm_device *dev ) ; void intel_opregion_free(struct drm_device *dev ) ; extern bool vgacon_text_force(void) ; static unsigned int i915_modeset = 4294967295U; unsigned int i915_fbpercrtc = 0U; static struct pci_device_id pciidlist[24U] = { {32902U, 13687U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 9570U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 13698U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 9586U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 9602U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 9610U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 9618U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10098U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10146U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10158U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10610U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10626U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10642U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10658U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10674U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10690U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10706U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10754U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10770U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 10818U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 11778U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 11794U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {32902U, 11810U, 4294967295U, 4294967295U, 196608U, 16776960U, 0UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; struct pci_device_id const __mod_pci_device_table ; static int i915_suspend(struct drm_device *dev , pm_message_t state ) { struct drm_i915_private *dev_priv ; { dev_priv = (struct drm_i915_private *)dev->dev_private; if ((unsigned long )dev == (unsigned long )((struct drm_device *)0) || (unsigned long )dev_priv == (unsigned long )((struct drm_i915_private *)0)) { printk("<3>dev: %p, dev_priv: %p\n", dev, dev_priv); printk("<3>DRM not initialized, aborting suspend.\n"); return (-19); } else { } if (state.event == 8) { return (0); } else { } pci_save_state(dev->pdev); i915_save_state(dev); intel_opregion_free(dev); if (state.event == 2) { pci_disable_device(dev->pdev); pci_set_power_state(dev->pdev, 3); } else { } return (0); } } static int i915_resume(struct drm_device *dev ) { int tmp ; { pci_set_power_state(dev->pdev, 0); pci_restore_state(dev->pdev); tmp = pci_enable_device(dev->pdev); if (tmp != 0) { return (-1); } else { } pci_set_master(dev->pdev); i915_restore_state(dev); intel_opregion_init(dev); return (0); } } static struct vm_operations_struct i915_gem_vm_ops = {0, 0, & i915_gem_fault, 0, 0, 0, 0, 0}; static struct drm_driver driver = {& i915_driver_load, 0, & i915_driver_open, & i915_driver_preclose, & i915_driver_postclose, & i915_driver_lastclose, & i915_driver_unload, & i915_suspend, & i915_resume, 0, 0, 0, 0, 0, 0, 0, 0, & i915_get_vblank_counter, & i915_enable_vblank, & i915_disable_vblank, & i915_driver_device_is_agp, & i915_driver_irq_handler, & i915_driver_irq_preinstall, & i915_driver_irq_postinstall, & i915_driver_irq_uninstall, & drm_core_reclaim_buffers, 0, 0, & drm_core_get_map_ofs, & drm_core_get_reg_ofs, 0, & i915_master_create, & i915_master_destroy, & i915_gem_proc_init, & i915_gem_proc_cleanup, & i915_gem_init_object, & i915_gem_free_object, & i915_gem_vm_ops, 1, 6, 0, (char *)"i915", (char *)"Intel Graphics", (char *)"20080730", 4291U, 0, (struct drm_ioctl_desc *)(& i915_ioctls), 0, {& __this_module, 0, 0, 0, 0, 0, 0, & drm_poll, & drm_ioctl, 0, & i915_compat_ioctl, & drm_gem_mmap, & drm_open, 0, & drm_release, 0, 0, & drm_fasync, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{0, 0}, (char *)"i915", (struct pci_device_id const *)(& pciidlist), 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{{0U}, 0U, 0U, 0, {0, 0, 0, 0}}, {0, 0}}}, {0, 0}}; static int i915_init(void) { bool tmp ; int tmp___0 ; { driver.num_ioctls = i915_max_ioctl; if (i915_modeset != 0U) { driver.driver_features = driver.driver_features | 8192U; } else { } if (i915_modeset == 1U) { driver.driver_features = driver.driver_features | 8192U; } else { } tmp = vgacon_text_force(); if ((int )tmp && i915_modeset == 4294967295U) { driver.driver_features = driver.driver_features & 4294959103U; } else { } tmp___0 = drm_init(& driver); return (tmp___0); } } static void i915_exit(void) { { drm_exit(& driver); return; } } void ldv_check_final_state(void) ; void ldv_initialize(void) ; extern void ldv_handler_precall(void) ; extern int nondet_int(void) ; int LDV_IN_INTERRUPT ; int main(void) { struct drm_device *var_group1 ; pm_message_t var_i915_suspend_0_p1 ; int tmp ; int tmp___0 ; int tmp___1 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); ldv_handler_precall(); tmp = i915_init(); if (tmp != 0) { goto ldv_final; } else { } goto ldv_25919; ldv_25918: tmp___0 = nondet_int(); switch (tmp___0) { case 0: ldv_handler_precall(); i915_suspend(var_group1, var_i915_suspend_0_p1); goto ldv_25915; case 1: ldv_handler_precall(); i915_resume(var_group1); goto ldv_25915; default: ; goto ldv_25915; } ldv_25915: ; ldv_25919: tmp___1 = nondet_int(); if (tmp___1 != 0) { goto ldv_25918; } else { } ldv_handler_precall(); i915_exit(); ldv_final: ldv_check_final_state(); return 0; } } void ldv___ldv_spin_lock_1(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_2(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_3(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_4(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_5(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_6(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_7(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_8(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_9(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_10(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_11(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_12(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_13(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_14(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_15(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_16(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_17(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_18(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } long ldv__builtin_expect(long exp , long c ) ; extern void warn_slowpath(char const * , int const , char const * , ...) ; extern void *memset(void * , int , size_t ) ; extern char *kstrdup(char const * , gfp_t ) ; extern void __bad_pda_field(void) ; extern struct x8664_pda _proxy_pda ; __inline static struct thread_info *current_thread_info(void) { struct thread_info *ti ; unsigned long ret__ ; { switch (8UL) { case 2UL: __asm__ ("movw %%gs:%c1,%0": "=r" (ret__): "i" (16UL), "m" (_proxy_pda.kernelstack)); goto ldv_4834; case 4UL: __asm__ ("movl %%gs:%c1,%0": "=r" (ret__): "i" (16UL), "m" (_proxy_pda.kernelstack)); goto ldv_4834; case 8UL: __asm__ ("movq %%gs:%c1,%0": "=r" (ret__): "i" (16UL), "m" (_proxy_pda.kernelstack)); goto ldv_4834; default: __bad_pda_field(); } ldv_4834: ti = (struct thread_info *)(ret__ - 8152UL); return (ti); } } extern void __spin_lock_init(spinlock_t * , char const * , struct lock_class_key * ) ; void ldv___ldv_spin_lock_37(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_40(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_41(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_44(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_46(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_48(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_50(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_52(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_38(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_42(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_43(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_45(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_47(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_49(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_51(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_53(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_54(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_39(spinlock_t *ldv_func_arg1 ) ; extern void mutex_lock_nested(struct mutex * , unsigned int ) ; extern void mutex_unlock(struct mutex * ) ; extern unsigned long msleep_interruptible(unsigned int ) ; extern void kfree(void const * ) ; extern void *__kmalloc(size_t , gfp_t ) ; __inline static void *kmalloc(size_t size , gfp_t flags ) { void *tmp___2 ; { tmp___2 = __kmalloc(size, flags); return (tmp___2); } } __inline static void *kcalloc(size_t n , size_t size , gfp_t flags ) { void *tmp ; { if (size != 0UL && 0xffffffffffffffffUL / size < n) { return (0); } else { } tmp = __kmalloc(n * size, flags | 32768U); return (tmp); } } __inline static unsigned int readl(void const volatile *addr ) { unsigned int ret ; { __asm__ volatile ("movl %1,%0": "=r" (ret): "m" (*((unsigned int volatile *)addr)): "memory"); return (ret); } } __inline static void writel(unsigned int val , void volatile *addr ) { { __asm__ volatile ("movl %0,%1": : "r" (val), "m" (*((unsigned int volatile *)addr)): "memory"); return; } } extern void *ioremap_nocache(resource_size_t , unsigned long ) ; __inline static void *ioremap(resource_size_t offset , unsigned long size ) { void *tmp ; { tmp = ioremap_nocache(offset, size); return (tmp); } } extern void iounmap(void volatile * ) ; extern void *ioremap_wc(unsigned long , unsigned long ) ; extern void pci_dev_put(struct pci_dev * ) ; extern struct pci_dev *pci_get_bus_and_slot(unsigned int , unsigned int ) ; extern int pci_bus_read_config_word(struct pci_bus * , unsigned int , int , u16 * ) ; __inline static int pci_read_config_word(struct pci_dev *dev , int where , u16 *val ) { int tmp ; { tmp = pci_bus_read_config_word(dev->bus, dev->devfn, where, val); return (tmp); } } extern int pci_enable_msi(struct pci_dev * ) ; extern void pci_disable_msi(struct pci_dev * ) ; extern unsigned long copy_user_generic(void * , void const * , unsigned int ) ; extern unsigned long copy_to_user(void * , void const * , unsigned int ) ; __inline static int __copy_from_user(void *dst , void const *src , unsigned int size ) { int ret ; unsigned long tmp ; long tmp___0 ; long tmp___1 ; unsigned long tmp___2 ; { ret = 0; tmp = copy_user_generic(dst, src, size); return ((int )tmp); switch (size) { case 1U: __asm__ volatile ("1:\tmovb %2,%b1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorb %b1,%b1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=q" (*((u8 *)dst)): "m" (*((struct __large_struct *)src)), "i" (1), "0" (ret)); return (ret); case 2U: __asm__ volatile ("1:\tmovw %2,%w1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorw %w1,%w1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u16 *)dst)): "m" (*((struct __large_struct *)src)), "i" (2), "0" (ret)); return (ret); case 4U: __asm__ volatile ("1:\tmovl %2,%k1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorl %k1,%k1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u32 *)dst)): "m" (*((struct __large_struct *)src)), "i" (4), "0" (ret)); return (ret); case 8U: __asm__ volatile ("1:\tmovq %2,%1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorq %1,%1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)src)), "i" (8), "0" (ret)); return (ret); case 10U: __asm__ volatile ("1:\tmovq %2,%1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorq %1,%1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)src)), "i" (10), "0" (ret)); tmp___0 = ldv__builtin_expect(ret != 0, 0L); if (tmp___0 != 0L) { return (ret); } else { } __asm__ volatile ("1:\tmovw %2,%w1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorw %w1,%w1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u16 *)dst + 8U)): "m" (*((struct __large_struct *)src + 8U)), "i" (2), "0" (ret)); return (ret); case 16U: __asm__ volatile ("1:\tmovq %2,%1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorq %1,%1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)src)), "i" (16), "0" (ret)); tmp___1 = ldv__builtin_expect(ret != 0, 0L); if (tmp___1 != 0L) { return (ret); } else { } __asm__ volatile ("1:\tmovq %2,%1\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\txorq %1,%1\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (ret), "=r" (*((u64 *)dst + 8U)): "m" (*((struct __large_struct *)src + 8U)), "i" (8), "0" (ret)); return (ret); default: tmp___2 = copy_user_generic(dst, src, size); return ((int )tmp___2); } } } __inline static int drm_core_check_feature(struct drm_device *dev , int feature ) { { return (((dev->driver)->driver_features & (u32 )feature) != 0U); } } extern unsigned long drm_get_resource_start(struct drm_device * , unsigned int ) ; extern unsigned long drm_get_resource_len(struct drm_device * , unsigned int ) ; extern int drm_irq_install(struct drm_device * ) ; extern int drm_irq_uninstall(struct drm_device * ) ; extern int drm_vblank_init(struct drm_device * , int ) ; extern unsigned int drm_debug ; extern drm_dma_handle_t *drm_pci_alloc(struct drm_device * , size_t , size_t , dma_addr_t ) ; extern void drm_pci_free(struct drm_device * , drm_dma_handle_t * ) ; extern int drm_mm_init(struct drm_mm * , unsigned long , unsigned long ) ; extern void drm_mm_takedown(struct drm_mm * ) ; extern void drm_core_ioremap(struct drm_map * , struct drm_device * ) ; extern void drm_core_ioremapfree(struct drm_map * , struct drm_device * ) ; __inline static void *drm_alloc(size_t size , int area ) { void *tmp ; { tmp = kmalloc(size, 208U); return (tmp); } } __inline static void drm_free(void *pt , size_t size , int area ) { { kfree((void const *)pt); return; } } __inline static void *drm_calloc(size_t nmemb , size_t size , int area ) { void *tmp ; { tmp = kcalloc(nmemb, size, 208U); return (tmp); } } extern bool drm_helper_initial_config(struct drm_device * , bool ) ; void intelfb_restore(void) ; bool intel_init_bios(struct drm_device *dev ) ; __inline static struct io_mapping *io_mapping_create_wc(unsigned long base , unsigned long size ) { void *tmp ; { tmp = ioremap_wc(base, size); return ((struct io_mapping *)tmp); } } __inline static void io_mapping_free(struct io_mapping *mapping ) { { iounmap((void volatile *)mapping); return; } } void i915_kernel_lost_context(struct drm_device *dev ) ; int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 , int DR4 ) ; int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; void i915_mem_takedown(struct mem_block **heap ) ; void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap ) ; int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_mmap_gtt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; int i915_gem_get_aperture_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ; void i915_gem_load(struct drm_device *dev ) ; void i915_gem_lastclose(struct drm_device *dev ) ; int i915_gem_init_ringbuffer(struct drm_device *dev ) ; void i915_gem_cleanup_ringbuffer(struct drm_device *dev ) ; int i915_gem_do_init(struct drm_device *dev , unsigned long start , unsigned long end ) ; void intel_modeset_init(struct drm_device *dev ) ; void intel_modeset_cleanup(struct drm_device *dev ) ; int i915_wait_ring(struct drm_device *dev , int n , char const *caller ) ; int i915_wait_ring(struct drm_device *dev , int n , char const *caller ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; drm_i915_ring_buffer_t *ring ; u32 acthd_reg ; u32 last_acthd ; unsigned int tmp ; u32 acthd ; u32 last_head ; unsigned int tmp___0 ; int i ; unsigned int tmp___1 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; ring = & dev_priv->ring; acthd_reg = ((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810 ? 8308U : 8392U; tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )acthd_reg); last_acthd = tmp; tmp___0 = readl((void const volatile *)dev_priv->regs + 8244U); last_head = tmp___0 & 2097148U; i = 0; goto ldv_25872; ldv_25871: tmp___1 = readl((void const volatile *)dev_priv->regs + 8244U); ring->head = (int )tmp___1 & 2097148; acthd = readl((void const volatile *)dev_priv->regs + (unsigned long )acthd_reg); ring->space = ring->head + (-8 - ring->tail); if (ring->space < 0) { ring->space = (int )((unsigned int )ring->space + (unsigned int )ring->Size); } else { } if (ring->space >= n) { return (0); } else { } if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 4; } else { } if ((u32 )ring->head != last_head) { i = 0; } else { } if (acthd != last_acthd) { i = 0; } else { } last_head = (u32 )ring->head; last_acthd = acthd; msleep_interruptible(10U); i = i + 1; ldv_25872: ; if (i <= 99999) { goto ldv_25871; } else { } return (-16); } } static int i915_init_phys_hws(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; dev_priv->status_page_dmah = drm_pci_alloc(dev, 4096UL, 4096UL, 4294967295ULL); if ((unsigned long )dev_priv->status_page_dmah == (unsigned long )((drm_dma_handle_t *)0)) { printk("<3>[drm:%s] *ERROR* Can not allocate hardware status page\n", "i915_init_phys_hws"); return (-12); } else { } dev_priv->hw_status_page = (dev_priv->status_page_dmah)->vaddr; dev_priv->dma_status_page = (dev_priv->status_page_dmah)->busaddr; memset(dev_priv->hw_status_page, 0, 4096UL); writel((unsigned int )dev_priv->dma_status_page, (void volatile *)dev_priv->regs + 8320U); if (drm_debug != 0U) { printk("<7>[drm:%s] Enabled hardware status page\n", "i915_init_phys_hws"); } else { } return (0); } } static void i915_free_hws(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )dev_priv->status_page_dmah != (unsigned long )((drm_dma_handle_t *)0)) { drm_pci_free(dev, dev_priv->status_page_dmah); dev_priv->status_page_dmah = 0; } else { } if (dev_priv->status_gfx_addr != 0U) { dev_priv->status_gfx_addr = 0U; drm_core_ioremapfree(& dev_priv->hws_map, dev); } else { } writel(536866816U, (void volatile *)dev_priv->regs + 8320U); return; } } void i915_kernel_lost_context(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; drm_i915_ring_buffer_t *ring ; int tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ring = & dev_priv->ring; tmp = drm_core_check_feature(dev, 8192); if (tmp != 0) { return; } else { } tmp___0 = readl((void const volatile *)dev_priv->regs + 8244U); ring->head = (int )tmp___0 & 2097148; tmp___1 = readl((void const volatile *)dev_priv->regs + 8240U); ring->tail = (int )tmp___1 & 2097144; ring->space = ring->head + (-8 - ring->tail); if (ring->space < 0) { ring->space = (int )((unsigned int )ring->space + (unsigned int )ring->Size); } else { } if ((unsigned long )(dev->primary)->master == (unsigned long )((struct drm_master *)0)) { return; } else { } master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if (ring->head == ring->tail && (unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 1; } else { } return; } } static int i915_dma_cleanup(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if (dev->irq_enabled != 0) { drm_irq_uninstall(dev); } else { } if ((unsigned long )dev_priv->ring.virtual_start != (unsigned long )((u8 *)0)) { drm_core_ioremapfree(& dev_priv->ring.map, dev); dev_priv->ring.virtual_start = 0; dev_priv->ring.map.handle = 0; dev_priv->ring.map.size = 0UL; } else { } if ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818)) { i915_free_hws(dev); } else { } return (0); } } static int i915_initialize(struct drm_device *dev , drm_i915_init_t *init ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if (init->ring_size != 0U) { if ((unsigned long )dev_priv->ring.ring_obj != (unsigned long )((struct drm_gem_object *)0)) { i915_dma_cleanup(dev); printk("<3>[drm:%s] *ERROR* Client tried to initialize ringbuffer in GEM mode\n", "i915_initialize"); return (-22); } else { } dev_priv->ring.Size = (unsigned long )init->ring_size; dev_priv->ring.tail_mask = (int )((unsigned int )dev_priv->ring.Size - 1U); dev_priv->ring.map.offset = (unsigned long )init->ring_start; dev_priv->ring.map.size = (unsigned long )init->ring_size; dev_priv->ring.map.type = _DRM_FRAME_BUFFER; dev_priv->ring.map.flags = 0; dev_priv->ring.map.mtrr = 0; drm_core_ioremap(& dev_priv->ring.map, dev); if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) { i915_dma_cleanup(dev); printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n", "i915_initialize"); return (-12); } else { } } else { } dev_priv->ring.virtual_start = (u8 *)dev_priv->ring.map.handle; dev_priv->cpp = init->cpp; dev_priv->back_offset = (int )init->back_offset; dev_priv->front_offset = (int )init->front_offset; dev_priv->current_page = 0; if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->pf_current_page = 0; } else { } dev_priv->allow_batchbuffer = 1; return (0); } } static int i915_dma_resume(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if (drm_debug != 0U) { printk("<7>[drm:%s] %s\n", "i915_dma_resume", "i915_dma_resume"); } else { } if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) { printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n", "i915_dma_resume"); return (-12); } else { } if ((unsigned long )dev_priv->hw_status_page == (unsigned long )((void *)0)) { printk("<3>[drm:%s] *ERROR* Can not find hardware status page\n", "i915_dma_resume"); return (-22); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] hw status page @ %p\n", "i915_dma_resume", dev_priv->hw_status_page); } else { } if (dev_priv->status_gfx_addr != 0U) { writel(dev_priv->status_gfx_addr, (void volatile *)dev_priv->regs + 8320U); } else { writel((unsigned int )dev_priv->dma_status_page, (void volatile *)dev_priv->regs + 8320U); } if (drm_debug != 0U) { printk("<7>[drm:%s] Enabled hardware status page\n", "i915_dma_resume"); } else { } return (0); } } static int i915_dma_init(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_init_t *init ; int retcode ; { init = (drm_i915_init_t *)data; retcode = 0; switch ((unsigned int )init->func) { case 1U: retcode = i915_initialize(dev, init); goto ldv_25913; case 2U: retcode = i915_dma_cleanup(dev); goto ldv_25913; case 3U: retcode = i915_dma_resume(dev); goto ldv_25913; default: retcode = -22; goto ldv_25913; } ldv_25913: ; return (retcode); } } static int do_validate_cmd(int cmd ) { { switch ((int )((unsigned int )cmd >> 29)) { case 0: ; switch ((cmd >> 23) & 63) { case 0: ; return (1); case 4: ; return (1); default: ; return (0); } goto ldv_25924; case 1: ; return (0); case 2: ; return ((cmd & 255) + 2); case 3: ; if (((cmd >> 24) & 31) <= 24) { return (1); } else { } switch ((cmd >> 24) & 31) { case 28: ; return (1); case 29: ; switch ((cmd >> 16) & 255) { case 3: ; return ((cmd & 31) + 2); case 4: ; return ((cmd & 15) + 2); default: ; return ((cmd & 65535) + 2); } case 30: ; if ((cmd & 8388608) != 0) { return ((cmd & 65535) + 1); } else { return (1); } case 31: ; if ((cmd & 8388608) == 0) { return ((cmd & 131071) + 2); } else if ((cmd & 131072) != 0) { if ((cmd & 65535) == 0) { return (0); } else { return (((cmd & 65535) + 1) / 2 + 1); } } else { return (2); } default: ; return (0); } default: ; return (0); } ldv_25924: ; return (0); } } static int validate_cmd(int cmd ) { int ret ; int tmp ; { tmp = do_validate_cmd(cmd); ret = tmp; return (ret); } } static int i915_emit_cmds(struct drm_device *dev , int *buffer , int dwords ) { drm_i915_private_t *dev_priv ; int i ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; int cmd ; int sz ; int tmp ; int tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )(dwords + 1) * 4UL >= dev_priv->ring.Size - 8UL) { return (-22); } else { } if (dev_priv->ring.space < ((dwords + 1) & -2) * 4) { i915_wait_ring(dev, ((dwords + 1) & -2) * 4, "i915_emit_cmds"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; i = 0; goto ldv_25959; ldv_25958: tmp = __copy_from_user((void *)(& cmd), (void const *)buffer + (unsigned long )i, 4U); if (tmp != 0) { return (-22); } else { } sz = validate_cmd(cmd); if (sz == 0 || i + sz > dwords) { return (-22); } else { } *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )cmd; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; goto ldv_25956; ldv_25955: tmp___0 = __copy_from_user((void *)(& cmd), (void const *)buffer + (unsigned long )i, 4U); if (tmp___0 != 0) { return (-22); } else { } *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )cmd; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; ldv_25956: i = i + 1; sz = sz - 1; if (sz != 0) { goto ldv_25955; } else { } ldv_25959: ; if (i < dwords) { goto ldv_25958; } else { } if (dwords & 1) { *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; } else { } dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); return (0); } } int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 , int DR4 ) { drm_i915_private_t *dev_priv ; struct drm_clip_rect box ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; tmp = __copy_from_user((void *)(& box), (void const *)boxes + (unsigned long )i, 8U); if (tmp != 0) { return (-14); } else { } if ((((int )box.y2 <= (int )box.y1 || (int )box.x2 <= (int )box.x1) || (unsigned int )box.y2 == 0U) || (unsigned int )box.x2 == 0U) { printk("<3>[drm:%s] *ERROR* Bad box %d,%d..%d,%d\n", "i915_emit_box", (int )box.x1, (int )box.y1, (int )box.x2, (int )box.y2); return (-22); } else { } if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_emit_box"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 2030043138U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )((int )box.x1 | ((int )box.y1 << 16)); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )((((int )box.x2 + -1) & 65535) | (((int )box.y2 + -1) << 16)); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )DR4; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } else { if (dev_priv->ring.space <= 23) { i915_wait_ring(dev, 24, "i915_emit_box"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 2105540611U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )DR1; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )((int )box.x1 | ((int )box.y1 << 16)); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )((((int )box.x2 + -1) & 65535) | (((int )box.y2 + -1) << 16)); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )DR4; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } return (0); } } static void i915_emit_breadcrumb(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; dev_priv->counter = dev_priv->counter + (uint32_t )1; if ((int )dev_priv->counter < 0) { dev_priv->counter = 0U; } else { } if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->last_enqueue = (int )dev_priv->counter; } else { } if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_emit_breadcrumb"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 276824065U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 132U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = dev_priv->counter; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); return; } } static int i915_dispatch_cmdbuffer(struct drm_device *dev , drm_i915_cmdbuffer_t *cmd ) { int nbox ; int i ; int count ; int ret ; { nbox = cmd->num_cliprects; i = 0; if ((cmd->sz & 3) != 0) { printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_cmdbuffer"); return (-22); } else { } i915_kernel_lost_context(dev); count = nbox != 0 ? nbox : 1; i = 0; goto ldv_25995; ldv_25994: ; if (i < nbox) { ret = i915_emit_box(dev, cmd->cliprects, i, cmd->DR1, cmd->DR4); if (ret != 0) { return (ret); } else { } } else { } ret = i915_emit_cmds(dev, (int *)cmd->buf, cmd->sz / 4); if (ret != 0) { return (ret); } else { } i = i + 1; ldv_25995: ; if (i < count) { goto ldv_25994; } else { } i915_emit_breadcrumb(dev); return (0); } } static int i915_dispatch_batchbuffer(struct drm_device *dev , drm_i915_batchbuffer_t *batch ) { drm_i915_private_t *dev_priv ; struct drm_clip_rect *boxes ; int nbox ; int i ; int count ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; int ret ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; boxes = batch->cliprects; nbox = batch->num_cliprects; i = 0; if (((batch->start | batch->used) & 7) != 0) { printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_batchbuffer"); return (-22); } else { } i915_kernel_lost_context(dev); count = nbox != 0 ? nbox : 1; i = 0; goto ldv_26013; ldv_26012: ; if (i < nbox) { tmp = i915_emit_box(dev, boxes, i, batch->DR1, batch->DR4); ret = tmp; if (ret != 0) { return (ret); } else { } } else { } if (dev->pci_device != 13687 && dev->pci_device != 9570) { if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_dispatch_batchbuffer"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { *((unsigned int volatile *)virt + (unsigned long )outring) = 411042176U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )batch->start; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; } else { *((unsigned int volatile *)virt + (unsigned long )outring) = 411041920U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )(batch->start | 1); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; } dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } else { if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_dispatch_batchbuffer"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 402653185U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )(batch->start | 1); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )((batch->start + batch->used) + -4); outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } i = i + 1; ldv_26013: ; if (i < count) { goto ldv_26012; } else { } i915_emit_breadcrumb(dev); return (0); } } static int i915_dispatch_flip(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; uint32_t tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if ((unsigned long )master_priv->sarea_priv == (unsigned long )((struct _drm_i915_sarea *)0)) { return (-22); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] %s: page=%d pfCurrentPage=%d\n", "i915_dispatch_flip", "i915_dispatch_flip", dev_priv->current_page, (master_priv->sarea_priv)->pf_current_page); } else { } i915_kernel_lost_context(dev); if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_dispatch_flip"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 33554433U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); if (dev_priv->ring.space <= 23) { i915_wait_ring(dev, 24, "i915_dispatch_flip"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 171966466U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; if (dev_priv->current_page == 0) { *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )dev_priv->back_offset; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->current_page = 1; } else { *((unsigned int volatile *)virt + (unsigned long )outring) = (unsigned int volatile )dev_priv->front_offset; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->current_page = 0; } *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_dispatch_flip"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 25165828U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); tmp = dev_priv->counter; dev_priv->counter = dev_priv->counter + (uint32_t )1; (master_priv->sarea_priv)->last_enqueue = (int )tmp; if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_dispatch_flip"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 276824065U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 132U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = dev_priv->counter; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); (master_priv->sarea_priv)->pf_current_page = dev_priv->current_page; return (0); } } static int i915_quiescent(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; i915_kernel_lost_context(dev); tmp = i915_wait_ring(dev, (int )((unsigned int )dev_priv->ring.Size - 8U), "i915_quiescent"); return (tmp); } } static int i915_flush_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { int ret ; { if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { if ((int )((file_priv->master)->lock.hw_lock)->lock >= 0 || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n", "i915_flush_ioctl", "i915_flush_ioctl", (unsigned int )((file_priv->master)->lock.hw_lock)->lock & 2147483648U, (file_priv->master)->lock.file_priv, file_priv); return (-22); } else { } } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_quiescent(dev); mutex_unlock(& dev->struct_mutex); return (ret); } } static int i915_batchbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; drm_i915_sarea_t *sarea_priv ; drm_i915_batchbuffer_t *batch ; int ret ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp ; long tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; sarea_priv = master_priv->sarea_priv; batch = (drm_i915_batchbuffer_t *)data; if (dev_priv->allow_batchbuffer == 0) { printk("<3>[drm:%s] *ERROR* Batchbuffer ioctl disabled\n", "i915_batchbuffer"); return (-22); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] i915 batchbuffer, start %x used %d cliprects %d\n", "i915_batchbuffer", batch->start, batch->used, batch->num_cliprects); } else { } if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { if ((int )((file_priv->master)->lock.hw_lock)->lock >= 0 || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n", "i915_batchbuffer", "i915_batchbuffer", (unsigned int )((file_priv->master)->lock.hw_lock)->lock & 2147483648U, (file_priv->master)->lock.file_priv, file_priv); return (-22); } else { } } else { } if (batch->num_cliprects != 0) { tmp = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batch->cliprects), "g" ((long )((unsigned long )batch->num_cliprects * 8UL)), "rm" (tmp->addr_limit.seg)); tmp___0 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___0 == 0L) { return (-14); } else { } } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_dispatch_batchbuffer(dev, batch); mutex_unlock(& dev->struct_mutex); if ((unsigned long )sarea_priv != (unsigned long )((drm_i915_sarea_t *)0)) { sarea_priv->last_dispatch = (int )*((u32 volatile *)dev_priv->hw_status_page + 33UL); } else { } return (ret); } } static int i915_cmdbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; drm_i915_sarea_t *sarea_priv ; drm_i915_cmdbuffer_t *cmdbuf ; int ret ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp ; long tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; sarea_priv = master_priv->sarea_priv; cmdbuf = (drm_i915_cmdbuffer_t *)data; if (drm_debug != 0U) { printk("<7>[drm:%s] i915 cmdbuffer, buf %p sz %d cliprects %d\n", "i915_cmdbuffer", cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects); } else { } if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { if ((int )((file_priv->master)->lock.hw_lock)->lock >= 0 || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n", "i915_cmdbuffer", "i915_cmdbuffer", (unsigned int )((file_priv->master)->lock.hw_lock)->lock & 2147483648U, (file_priv->master)->lock.file_priv, file_priv); return (-22); } else { } } else { } if (cmdbuf->num_cliprects != 0) { tmp = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuf->cliprects), "g" ((long )((unsigned long )cmdbuf->num_cliprects * 8UL)), "rm" (tmp->addr_limit.seg)); tmp___0 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___0 == 0L) { printk("<3>[drm:%s] *ERROR* Fault accessing cliprects\n", "i915_cmdbuffer"); return (-14); } else { } } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_dispatch_cmdbuffer(dev, cmdbuf); mutex_unlock(& dev->struct_mutex); if (ret != 0) { printk("<3>[drm:%s] *ERROR* i915_dispatch_cmdbuffer failed\n", "i915_cmdbuffer"); return (ret); } else { } if ((unsigned long )sarea_priv != (unsigned long )((drm_i915_sarea_t *)0)) { sarea_priv->last_dispatch = (int )*((u32 volatile *)dev_priv->hw_status_page + 33UL); } else { } return (0); } } static int i915_flip_bufs(struct drm_device *dev , void *data , struct drm_file *file_priv ) { int ret ; { if (drm_debug != 0U) { printk("<7>[drm:%s] %s\n", "i915_flip_bufs", "i915_flip_bufs"); } else { } if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { if ((int )((file_priv->master)->lock.hw_lock)->lock >= 0 || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n", "i915_flip_bufs", "i915_flip_bufs", (unsigned int )((file_priv->master)->lock.hw_lock)->lock & 2147483648U, (file_priv->master)->lock.file_priv, file_priv); return (-22); } else { } } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_dispatch_flip(dev); mutex_unlock(& dev->struct_mutex); return (ret); } } static int i915_getparam(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_getparam_t *param ; int value ; unsigned long tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; param = (drm_i915_getparam_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_getparam"); return (-22); } else { } switch (param->param) { case 1: value = (dev->pdev)->irq != 0U; goto ldv_26082; case 2: value = dev_priv->allow_batchbuffer != 0; goto ldv_26082; case 3: value = (int )*((u32 volatile *)dev_priv->hw_status_page + 33UL); goto ldv_26082; case 4: value = dev->pci_device; goto ldv_26082; case 5: value = dev_priv->has_gem; goto ldv_26082; default: printk("<3>[drm:%s] *ERROR* Unknown parameter %d\n", "i915_getparam", param->param); return (-22); } ldv_26082: tmp = copy_to_user((void *)param->value, (void const *)(& value), 4U); if (tmp != 0UL) { printk("<3>[drm:%s] *ERROR* DRM_COPY_TO_USER failed\n", "i915_getparam"); return (-14); } else { } return (0); } } static int i915_setparam(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_setparam_t *param ; { dev_priv = (drm_i915_private_t *)dev->dev_private; param = (drm_i915_setparam_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_setparam"); return (-22); } else { } switch (param->param) { case 1: ; goto ldv_26097; case 2: dev_priv->tex_lru_log_granularity = param->value; goto ldv_26097; case 3: dev_priv->allow_batchbuffer = param->value; goto ldv_26097; default: printk("<3>[drm:%s] *ERROR* unknown parameter %d\n", "i915_setparam", param->param); return (-22); } ldv_26097: ; return (0); } } static int i915_set_status_page(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_hws_addr_t *hws ; int __ret_warn_on ; long tmp ; int tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; hws = (drm_i915_hws_addr_t *)data; if ((((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706) && dev->pci_device != 10818) && (((dev->pci_device != 11778 && dev->pci_device != 11794) && dev->pci_device != 11810) && dev->pci_device != 10818)) { return (-22); } else { } if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_set_status_page"); return (-22); } else { } tmp___0 = drm_core_check_feature(dev, 8192); if (tmp___0 != 0) { __ret_warn_on = 1; tmp = ldv__builtin_expect(__ret_warn_on != 0, 0L); if (tmp != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_dma.c.prepared", 849, "tried to set status page when mode setting active\n"); } else { } ldv__builtin_expect(__ret_warn_on != 0, 0L); return (0); } else { } printk("<7>set status page addr 0x%08x\n", (unsigned int )hws->addr); dev_priv->status_gfx_addr = (unsigned int )hws->addr & 536866816U; dev_priv->hws_map.offset = (unsigned long )((unsigned long long )(dev->agp)->base + hws->addr); dev_priv->hws_map.size = 4096UL; dev_priv->hws_map.type = _DRM_FRAME_BUFFER; dev_priv->hws_map.flags = 0; dev_priv->hws_map.mtrr = 0; drm_core_ioremap(& dev_priv->hws_map, dev); if ((unsigned long )dev_priv->hws_map.handle == (unsigned long )((void *)0)) { i915_dma_cleanup(dev); dev_priv->status_gfx_addr = 0U; printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for G33 hw status page\n", "i915_set_status_page"); return (-12); } else { } dev_priv->hw_status_page = dev_priv->hws_map.handle; memset(dev_priv->hw_status_page, 0, 4096UL); writel(dev_priv->status_gfx_addr, (void volatile *)dev_priv->regs + 8320U); if (drm_debug != 0U) { printk("<7>[drm:%s] load hws HWS_PGA with gfx mem 0x%x\n", "i915_set_status_page", dev_priv->status_gfx_addr); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] load hws at %p\n", "i915_set_status_page", dev_priv->hw_status_page); } else { } return (0); } } static int i915_probe_agp(struct drm_device *dev , unsigned long *aperture_size , unsigned long *preallocated_size ) { struct pci_dev *bridge_dev ; u16 tmp ; unsigned long overhead ; { tmp = 0U; bridge_dev = pci_get_bus_and_slot(0U, 0U); if ((unsigned long )bridge_dev == (unsigned long )((struct pci_dev *)0)) { printk("<3>[drm:%s] *ERROR* bridge device not found\n", "i915_probe_agp"); return (-1); } else { } pci_read_config_word(bridge_dev, 82, & tmp); pci_dev_put(bridge_dev); *aperture_size = 1048576UL; *preallocated_size = 1048576UL; switch ((int )(dev->pdev)->device) { case 13687: ; case 9570: ; case 13698: ; case 9586: ; if ((int )tmp & 1) { *aperture_size = *aperture_size * 64UL; } else { *aperture_size = *aperture_size * 128UL; } goto ldv_26124; default: *aperture_size = (dev->pdev)->resource[2].start != 0ULL || (dev->pdev)->resource[2].end != (dev->pdev)->resource[2].start ? (unsigned long )(((dev->pdev)->resource[2].end - (dev->pdev)->resource[2].start) + 1ULL) : 0UL; goto ldv_26124; } ldv_26124: ; if (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818) { overhead = 4096UL; } else { overhead = *aperture_size / 1024UL + 4096UL; } switch ((int )tmp & 112) { case 16: ; goto ldv_26127; case 32: *preallocated_size = *preallocated_size * 4UL; goto ldv_26127; case 48: *preallocated_size = *preallocated_size * 8UL; goto ldv_26127; case 64: *preallocated_size = *preallocated_size * 16UL; goto ldv_26127; case 80: *preallocated_size = *preallocated_size * 32UL; goto ldv_26127; case 96: *preallocated_size = *preallocated_size * 48UL; goto ldv_26127; case 112: *preallocated_size = *preallocated_size * 64UL; goto ldv_26127; case 0: printk("<3>[drm:%s] *ERROR* video memory is disabled\n", "i915_probe_agp"); return (-1); default: printk("<3>[drm:%s] *ERROR* unexpected GMCH_GMS value: 0x%02x\n", "i915_probe_agp", (int )tmp & 112); return (-1); } ldv_26127: *preallocated_size = *preallocated_size - overhead; return (0); } } static int i915_load_modeset_init(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; unsigned long agp_size ; unsigned long prealloc_size ; int fb_bar ; int ret ; unsigned long tmp ; bool tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; fb_bar = (((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) ? 2 : 0; ret = 0; tmp = drm_get_resource_start(dev, (unsigned int )fb_bar); dev->mode_config.fb_base = tmp & 4278190080UL; if (drm_debug != 0U) { printk("<7>[drm:%s] *** fb base 0x%08lx\n", "i915_load_modeset_init", dev->mode_config.fb_base); } else { } if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) || ((((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706))) { dev_priv->cursor_needs_physical = 1; } else { dev_priv->cursor_needs_physical = 0; } i915_probe_agp(dev, & agp_size, & prealloc_size); drm_mm_init(& dev_priv->vram, 0UL, prealloc_size); i915_gem_do_init(dev, prealloc_size, agp_size); ret = i915_gem_init_ringbuffer(dev); if (ret != 0) { goto out; } else { } dev_priv->mm.gtt_mapping = io_mapping_create_wc((dev->agp)->base, (dev->agp)->agp_info.aper_size * 1048576UL); dev_priv->allow_batchbuffer = 1; tmp___0 = intel_init_bios(dev); ret = (int )tmp___0; if (ret != 0) { printk("<6>[drm] failed to find VBIOS tables\n"); } else { } ret = drm_irq_install(dev); if (ret != 0) { goto destroy_ringbuffer; } else { } dev->vblank_disable_allowed = 1; writel(2097184U, (void volatile *)dev_priv->regs + 8384U); intel_modeset_init(dev); drm_helper_initial_config(dev, 0); dev->devname = kstrdup("i915", 208U); if ((unsigned long )dev->devname == (unsigned long )((char *)0)) { ret = -12; goto modeset_cleanup; } else { } return (0); modeset_cleanup: intel_modeset_cleanup(dev); destroy_ringbuffer: i915_gem_cleanup_ringbuffer(dev); out: ; return (ret); } } int i915_master_create(struct drm_device *dev , struct drm_master *master ) { struct drm_i915_master_private *master_priv ; void *tmp ; { tmp = drm_calloc(1UL, 16UL, 2); master_priv = (struct drm_i915_master_private *)tmp; if ((unsigned long )master_priv == (unsigned long )((struct drm_i915_master_private *)0)) { return (-12); } else { } master->driver_priv = (void *)master_priv; return (0); } } void i915_master_destroy(struct drm_device *dev , struct drm_master *master ) { struct drm_i915_master_private *master_priv ; { master_priv = (struct drm_i915_master_private *)master->driver_priv; if ((unsigned long )master_priv == (unsigned long )((struct drm_i915_master_private *)0)) { return; } else { } drm_free((void *)master_priv, 16UL, 2); master->driver_priv = 0; return; } } int i915_driver_load(struct drm_device *dev , unsigned long flags ) { struct drm_i915_private *dev_priv ; unsigned long base ; unsigned long size ; int ret ; int mmio_bar ; void *tmp ; struct lock_class_key __key ; int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; ret = 0; mmio_bar = (((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706); dev->counters = dev->counters + 4UL; dev->types[6] = _DRM_STAT_IRQ; dev->types[7] = _DRM_STAT_PRIMARY; dev->types[8] = _DRM_STAT_SECONDARY; dev->types[9] = _DRM_STAT_DMA; tmp = drm_alloc(4304UL, 2); dev_priv = (struct drm_i915_private *)tmp; if ((unsigned long )dev_priv == (unsigned long )((struct drm_i915_private *)0)) { return (-12); } else { } memset((void *)dev_priv, 0, 4304UL); dev->dev_private = (void *)dev_priv; dev_priv->dev = dev; base = drm_get_resource_start(dev, (unsigned int )mmio_bar); size = drm_get_resource_len(dev, (unsigned int )mmio_bar); dev_priv->regs = ioremap((resource_size_t )base, size); if ((unsigned long )dev_priv->regs == (unsigned long )((void *)0)) { printk("<3>[drm:%s] *ERROR* failed to map registers\n", "i915_driver_load"); ret = -5; goto free_priv; } else { } dev_priv->has_gem = 1; i915_gem_load(dev); if ((((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706) && dev->pci_device != 10818) && (((dev->pci_device != 11778 && dev->pci_device != 11794) && dev->pci_device != 11810) && dev->pci_device != 10818)) { ret = i915_init_phys_hws(dev); if (ret != 0) { goto out_rmmap; } else { } } else { } if (dev->pci_device != 10098 && (dev->pci_device != 10146 && dev->pci_device != 10158)) { pci_enable_msi(dev->pdev); } else { } intel_opregion_init(dev); __spin_lock_init(& dev_priv->user_irq_lock, "&dev_priv->user_irq_lock", & __key); dev_priv->user_irq_refcount = 0; ret = drm_vblank_init(dev, 2); if (ret != 0) { i915_driver_unload(dev); return (ret); } else { } tmp___0 = drm_core_check_feature(dev, 8192); if (tmp___0 != 0) { ret = i915_load_modeset_init(dev); if (ret < 0) { printk("<3>[drm:%s] *ERROR* failed to init modeset\n", "i915_driver_load"); goto out_rmmap; } else { } } else { } return (0); out_rmmap: iounmap((void volatile *)dev_priv->regs); free_priv: drm_free((void *)dev_priv, 4304UL, 2); return (ret); } } int i915_driver_unload(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; int tmp ; int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = drm_core_check_feature(dev, 8192); if (tmp != 0) { io_mapping_free(dev_priv->mm.gtt_mapping); drm_irq_uninstall(dev); } else { } if ((unsigned int )*((unsigned char *)dev->pdev + 1808UL) != 0U) { pci_disable_msi(dev->pdev); } else { } if ((unsigned long )dev_priv->regs != (unsigned long )((void *)0)) { iounmap((void volatile *)dev_priv->regs); } else { } intel_opregion_free(dev); tmp___0 = drm_core_check_feature(dev, 8192); if (tmp___0 != 0) { intel_modeset_cleanup(dev); mutex_lock_nested(& dev->struct_mutex, 0U); i915_gem_cleanup_ringbuffer(dev); mutex_unlock(& dev->struct_mutex); drm_mm_takedown(& dev_priv->vram); i915_gem_lastclose(dev); } else { } drm_free(dev->dev_private, 4304UL, 2); return (0); } } int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv ) { struct drm_i915_file_private *i915_file_priv ; void *tmp ; { if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "i915_driver_open"); } else { } tmp = drm_alloc(8UL, 10); i915_file_priv = (struct drm_i915_file_private *)tmp; if ((unsigned long )i915_file_priv == (unsigned long )((struct drm_i915_file_private *)0)) { return (-12); } else { } file_priv->driver_priv = (void *)i915_file_priv; i915_file_priv->mm.last_gem_seqno = 0U; i915_file_priv->mm.last_gem_throttle_seqno = 0U; return (0); } } void i915_driver_lastclose(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { intelfb_restore(); return; } else { tmp = drm_core_check_feature(dev, 8192); if (tmp != 0) { intelfb_restore(); return; } else { } } i915_gem_lastclose(dev); if ((unsigned long )dev_priv->agp_heap != (unsigned long )((struct mem_block *)0)) { i915_mem_takedown(& dev_priv->agp_heap); } else { } i915_dma_cleanup(dev); return; } } void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; tmp = drm_core_check_feature(dev, 8192); if (tmp == 0) { i915_mem_release(dev, file_priv, dev_priv->agp_heap); } else { } return; } } void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv ) { struct drm_i915_file_private *i915_file_priv ; { i915_file_priv = (struct drm_i915_file_private *)file_priv->driver_priv; drm_free((void *)i915_file_priv, 8UL, 10); return; } } struct drm_ioctl_desc i915_ioctls[37U] = { {0U, & i915_dma_init, 7}, {1U, & i915_flush_ioctl, 1}, {2U, & i915_flip_bufs, 1}, {3U, & i915_batchbuffer, 1}, {4U, & i915_irq_emit, 1}, {5U, & i915_irq_wait, 1}, {6U, & i915_getparam, 1}, {7U, & i915_setparam, 7}, {8U, & i915_mem_alloc, 1}, {9U, & i915_mem_free, 1}, {10U, & i915_mem_init_heap, 7}, {11U, & i915_cmdbuffer, 1}, {12U, & i915_mem_destroy_heap, 7}, {13U, & i915_vblank_pipe_set, 7}, {14U, & i915_vblank_pipe_get, 1}, {15U, & i915_vblank_swap, 1}, {0U, 0, 0}, {17U, & i915_set_status_page, 7}, {0U, 0, 0}, {19U, & i915_gem_init_ioctl, 7}, {20U, & i915_gem_execbuffer, 1}, {21U, & i915_gem_pin_ioctl, 5}, {22U, & i915_gem_unpin_ioctl, 5}, {23U, & i915_gem_busy_ioctl, 1}, {24U, & i915_gem_throttle_ioctl, 1}, {25U, & i915_gem_entervt_ioctl, 7}, {26U, & i915_gem_leavevt_ioctl, 7}, {27U, & i915_gem_create_ioctl, 0}, {28U, & i915_gem_pread_ioctl, 0}, {29U, & i915_gem_pwrite_ioctl, 0}, {30U, & i915_gem_mmap_ioctl, 0}, {31U, & i915_gem_set_domain_ioctl, 0}, {32U, & i915_gem_sw_finish_ioctl, 0}, {33U, & i915_gem_set_tiling, 0}, {34U, & i915_gem_get_tiling, 0}, {35U, & i915_gem_get_aperture_ioctl, 0}, {36U, & i915_gem_mmap_gtt_ioctl, 0}}; int i915_max_ioctl = 37; int i915_driver_device_is_agp(struct drm_device *dev ) { { return (1); } } void ldv___ldv_spin_lock_37(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_38(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_39(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_40(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_41(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_42(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_43(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_44(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_45(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_46(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_47(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_48(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_49(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_50(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_51(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_52(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_53(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_54(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } __inline static int variable_test_bit(int nr , unsigned long const volatile *addr ) { int oldbit ; { __asm__ volatile ("bt %2,%1\n\tsbb %0,%0": "=r" (oldbit): "m" (*((unsigned long *)addr)), "Ir" (nr)); return (oldbit); } } __inline static struct task_struct *get_current(void) { struct task_struct *ret__ ; { switch (8UL) { case 2UL: __asm__ ("movw %%gs:%c1,%0": "=r" (ret__): "i" (0UL), "m" (_proxy_pda.pcurrent)); goto ldv_4169; case 4UL: __asm__ ("movl %%gs:%c1,%0": "=r" (ret__): "i" (0UL), "m" (_proxy_pda.pcurrent)); goto ldv_4169; case 8UL: __asm__ ("movq %%gs:%c1,%0": "=r" (ret__): "i" (0UL), "m" (_proxy_pda.pcurrent)); goto ldv_4169; default: __bad_pda_field(); } ldv_4169: ; return (ret__); } } __inline static int test_ti_thread_flag(struct thread_info *ti , int flag ) { int tmp ; { tmp = variable_test_bit(flag, (unsigned long const volatile *)(& ti->flags)); return (tmp); } } __inline static void atomic_inc(atomic_t *v ) { { __asm__ volatile (".section .smp_locks,\"a\"\n .balign 8 \n .quad 661f\n.previous\n661:\n\tlock; incl %0": "=m" (v->counter): "m" (v->counter)); return; } } void ldv___ldv_spin_lock_73(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_76(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_77(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_80(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_82(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_84(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_86(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_88(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_91(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_93(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_95(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_97(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_99(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_74(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_78(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_79(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_81(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_83(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_85(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_87(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_89(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_90(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_92(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_94(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_96(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_98(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_100(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_75(spinlock_t *ldv_func_arg1 ) ; void ldv_spin_lock_user_irq_lock_of_drm_i915_private(void) ; void ldv_spin_unlock_user_irq_lock_of_drm_i915_private(void) ; extern int default_wake_function(wait_queue_t * , unsigned int , int , void * ) ; extern void init_waitqueue_head(wait_queue_head_t * ) ; extern void add_wait_queue(wait_queue_head_t * , wait_queue_t * ) ; extern void remove_wait_queue(wait_queue_head_t * , wait_queue_t * ) ; extern void __wake_up(wait_queue_head_t * , unsigned int , int , void * ) ; extern unsigned long volatile jiffies ; extern long schedule_timeout(long ) ; __inline static int test_tsk_thread_flag(struct task_struct *tsk , int flag ) { int tmp ; { tmp = test_ti_thread_flag((struct thread_info *)tsk->stack, flag); return (tmp); } } __inline static int signal_pending(struct task_struct *p ) { int tmp ; long tmp___0 ; { tmp = test_tsk_thread_flag(p, 2); tmp___0 = ldv__builtin_expect(tmp != 0, 0L); return ((int )tmp___0); } } extern void drm_handle_vblank(struct drm_device * , int ) ; void i915_user_irq_get(struct drm_device *dev ) ; void i915_user_irq_put(struct drm_device *dev ) ; void i915_enable_interrupt(struct drm_device *dev ) ; void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask ) ; void i915_enable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) ; void i915_disable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) ; uint32_t i915_get_gem_seqno(struct drm_device *dev ) ; void opregion_asle_intr(struct drm_device *dev ) ; void opregion_enable_asle(struct drm_device *dev ) ; void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask ) { { if ((dev_priv->irq_mask_reg & mask) != 0U) { dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & ~ mask; writel(dev_priv->irq_mask_reg, (void volatile *)dev_priv->regs + 8360U); readl((void const volatile *)dev_priv->regs + 8360U); } else { } return; } } __inline static void i915_disable_irq(drm_i915_private_t *dev_priv , u32 mask ) { { if ((dev_priv->irq_mask_reg & mask) != mask) { dev_priv->irq_mask_reg = dev_priv->irq_mask_reg | mask; writel(dev_priv->irq_mask_reg, (void volatile *)dev_priv->regs + 8360U); readl((void const volatile *)dev_priv->regs + 8360U); } else { } return; } } __inline static u32 i915_pipestat(int pipe ) { { if (pipe == 0) { return (458788U); } else { } if (pipe == 1) { return (462884U); } else { } __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_irq.c.prepared"), "i" (158), "i" (24UL)); ldv_25909: ; goto ldv_25909; } } void i915_enable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) { u32 reg ; u32 tmp ; { if ((dev_priv->pipestat[pipe] & mask) != mask) { tmp = i915_pipestat(pipe); reg = tmp; dev_priv->pipestat[pipe] = dev_priv->pipestat[pipe] | mask; writel(dev_priv->pipestat[pipe] | (mask >> 16), (void volatile *)dev_priv->regs + (unsigned long )reg); readl((void const volatile *)dev_priv->regs + (unsigned long )reg); } else { } return; } } void i915_disable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) { u32 reg ; u32 tmp ; { if ((dev_priv->pipestat[pipe] & mask) != 0U) { tmp = i915_pipestat(pipe); reg = tmp; dev_priv->pipestat[pipe] = dev_priv->pipestat[pipe] & ~ mask; writel(dev_priv->pipestat[pipe], (void volatile *)dev_priv->regs + (unsigned long )reg); readl((void const volatile *)dev_priv->regs + (unsigned long )reg); } else { } return; } } static int i915_pipe_enabled(struct drm_device *dev , int pipe ) { drm_i915_private_t *dev_priv ; unsigned long pipeconf ; unsigned int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; pipeconf = pipe != 0 ? 462856UL : 458760UL; tmp = readl((void const volatile *)(dev_priv->regs + pipeconf)); if ((int )tmp < 0) { return (1); } else { } return (0); } } u32 i915_get_vblank_counter(struct drm_device *dev , int pipe ) { drm_i915_private_t *dev_priv ; unsigned long high_frame ; unsigned long low_frame ; u32 high1 ; u32 high2 ; u32 low ; u32 count ; int tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; unsigned int tmp___2 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; high_frame = pipe != 0 ? 462912UL : 458816UL; low_frame = pipe != 0 ? 462916UL : 458820UL; tmp = i915_pipe_enabled(dev, pipe); if (tmp == 0) { printk("<3>[drm:%s] *ERROR* trying to get vblank count for disabled pipe %d\n", "i915_get_vblank_counter", pipe); return (0U); } else { } ldv_25940: tmp___0 = readl((void const volatile *)(dev_priv->regs + high_frame)); high1 = tmp___0 & 65535U; tmp___1 = readl((void const volatile *)(dev_priv->regs + low_frame)); low = tmp___1 >> 24; tmp___2 = readl((void const volatile *)(dev_priv->regs + high_frame)); high2 = tmp___2 & 65535U; if (high1 != high2) { goto ldv_25940; } else { } count = (high1 << 8) | low; return (count); } } irqreturn_t i915_driver_irq_handler(int irq , void *arg ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; u32 iir ; u32 new_iir ; u32 pipea_stats ; u32 pipeb_stats ; u32 vblank_status ; u32 vblank_enable ; int vblank ; int irq_received ; int ret ; { dev = (struct drm_device *)arg; dev_priv = (drm_i915_private_t *)dev->dev_private; vblank = 0; ret = 0; atomic_inc(& dev_priv->irq_received); iir = readl((void const volatile *)dev_priv->regs + 8356U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { vblank_status = 4U; vblank_enable = 262144U; } else { vblank_status = 2U; vblank_enable = 131072U; } ldv_25960: irq_received = iir != 0U; ldv___ldv_spin_lock_91(& dev_priv->user_irq_lock); pipea_stats = readl((void const volatile *)dev_priv->regs + 458788U); pipeb_stats = readl((void const volatile *)dev_priv->regs + 462884U); if ((pipea_stats & 2147549183U) != 0U) { writel(pipea_stats, (void volatile *)dev_priv->regs + 458788U); irq_received = 1; } else { } if ((pipeb_stats & 2147549183U) != 0U) { writel(pipeb_stats, (void volatile *)dev_priv->regs + 462884U); irq_received = 1; } else { } ldv___ldv_spin_unlock_92(& dev_priv->user_irq_lock); if (irq_received == 0) { goto ldv_25959; } else { } ret = 1; writel(iir, (void volatile *)dev_priv->regs + 8356U); new_iir = readl((void const volatile *)dev_priv->regs + 8356U); if ((unsigned long )(dev->primary)->master != (unsigned long )((struct drm_master *)0)) { master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->last_dispatch = (int )*((u32 volatile *)dev_priv->hw_status_page + 33UL); } else { } } else { } if ((iir & 2U) != 0U) { dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev); __wake_up(& dev_priv->irq_queue, 1U, 1, 0); } else { } if ((pipea_stats & vblank_status) != 0U) { vblank = vblank + 1; drm_handle_vblank(dev, 0); } else { } if ((pipeb_stats & vblank_status) != 0U) { vblank = vblank + 1; drm_handle_vblank(dev, 1); } else { } if (((unsigned long )pipeb_stats & 64UL) != 0UL || (int )iir & 1) { opregion_asle_intr(dev); } else { } iir = new_iir; goto ldv_25960; ldv_25959: ; return (ret); } } static int i915_emit_irq(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; i915_kernel_lost_context(dev); if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "i915_emit_irq"); } else { } dev_priv->counter = dev_priv->counter + (uint32_t )1; if ((int )dev_priv->counter < 0) { dev_priv->counter = 1U; } else { } if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->last_enqueue = (int )dev_priv->counter; } else { } if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_emit_irq"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 276824065U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 132U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = dev_priv->counter; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 16777216U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); return ((int )dev_priv->counter); } } void i915_user_irq_get(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ldv___ldv_spin_lock_93(& dev_priv->user_irq_lock); if (dev->irq_enabled != 0) { dev_priv->user_irq_refcount = dev_priv->user_irq_refcount + 1; if (dev_priv->user_irq_refcount == 1) { i915_enable_irq(dev_priv, 2U); } else { } } else { } ldv___ldv_spin_unlock_94(& dev_priv->user_irq_lock); return; } } void i915_user_irq_put(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; long tmp ; long tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ldv___ldv_spin_lock_95(& dev_priv->user_irq_lock); tmp = ldv__builtin_expect(dev->irq_enabled != 0, 0L); if (tmp != 0L) { tmp___0 = ldv__builtin_expect(dev_priv->user_irq_refcount <= 0, 0L); if (tmp___0 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_irq.c.prepared"), "i" (394), "i" (24UL)); ldv_25981: ; goto ldv_25981; } else { } } else { } if (dev->irq_enabled != 0) { dev_priv->user_irq_refcount = dev_priv->user_irq_refcount - 1; if (dev_priv->user_irq_refcount == 0) { i915_disable_irq(dev_priv, 2U); } else { } } else { } ldv___ldv_spin_unlock_96(& dev_priv->user_irq_lock); return; } } static int i915_wait_irq(struct drm_device *dev , int irq_nr ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; int ret ; wait_queue_t entry ; struct task_struct *tmp ; unsigned long end ; struct task_struct *tmp___0 ; struct task_struct *tmp___1 ; int tmp___2 ; struct task_struct *tmp___3 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; ret = 0; if (drm_debug != 0U) { printk("<7>[drm:%s] irq_nr=%d breadcrumb=%d\n", "i915_wait_irq", irq_nr, *((u32 volatile *)dev_priv->hw_status_page + 33UL)); } else { } if ((unsigned int )*((u32 volatile *)dev_priv->hw_status_page + 33UL) >= (unsigned int )irq_nr) { if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->last_dispatch = (int )*((u32 volatile *)dev_priv->hw_status_page + 33UL); } else { } return (0); } else { } if ((unsigned long )master_priv->sarea_priv != (unsigned long )((struct _drm_i915_sarea *)0)) { (master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 4; } else { } i915_user_irq_get(dev); tmp = get_current(); entry.flags = 0U; entry.private = (void *)tmp; entry.func = & default_wake_function; entry.task_list.next = 0; entry.task_list.prev = 0; end = (unsigned long )jiffies + 750UL; add_wait_queue(& dev_priv->irq_queue, & entry); ldv_25999: tmp___0 = get_current(); tmp___0->state = 1L; if ((unsigned int )*((u32 volatile *)dev_priv->hw_status_page + 33UL) >= (unsigned int )irq_nr) { goto ldv_25992; } else { } if ((1 != 0 && 1 != 0) && (long )jiffies - (long )end >= 0L) { ret = -16; goto ldv_25992; } else { } schedule_timeout(2L); tmp___1 = get_current(); tmp___2 = signal_pending(tmp___1); if (tmp___2 != 0) { ret = -4; goto ldv_25992; } else { } goto ldv_25999; ldv_25992: tmp___3 = get_current(); tmp___3->state = 0L; remove_wait_queue(& dev_priv->irq_queue, & entry); i915_user_irq_put(dev); if (ret == -16) { printk("<3>[drm:%s] *ERROR* EBUSY -- rec: %d emitted: %d\n", "i915_wait_irq", *((u32 volatile *)dev_priv->hw_status_page + 33UL), (int )dev_priv->counter); } else { } return (ret); } } int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_irq_emit_t *emit ; int result ; unsigned long tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; emit = (drm_i915_irq_emit_t *)data; if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { if ((int )((file_priv->master)->lock.hw_lock)->lock >= 0 || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n", "i915_irq_emit", "i915_irq_emit", (unsigned int )((file_priv->master)->lock.hw_lock)->lock & 2147483648U, (file_priv->master)->lock.file_priv, file_priv); return (-22); } else { } } else { } if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_emit"); return (-22); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); result = i915_emit_irq(dev); mutex_unlock(& dev->struct_mutex); tmp = copy_to_user((void *)emit->irq_seq, (void const *)(& result), 4U); if (tmp != 0UL) { printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_irq_emit"); return (-14); } else { } return (0); } } int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_irq_wait_t *irqwait ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; irqwait = (drm_i915_irq_wait_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_wait"); return (-22); } else { } tmp = i915_wait_irq(dev, irqwait->irq_seq); return (tmp); } } int i915_enable_vblank(struct drm_device *dev , int pipe ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ldv___ldv_spin_lock_97(& dev_priv->user_irq_lock); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { i915_enable_pipestat(dev_priv, pipe, 262144U); } else { i915_enable_pipestat(dev_priv, pipe, 131072U); } ldv___ldv_spin_unlock_98(& dev_priv->user_irq_lock); return (0); } } void i915_disable_vblank(struct drm_device *dev , int pipe ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ldv___ldv_spin_lock_99(& dev_priv->user_irq_lock); i915_disable_pipestat(dev_priv, pipe, 393216U); ldv___ldv_spin_unlock_100(& dev_priv->user_irq_lock); return; } } void i915_enable_interrupt(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; { dev_priv = (struct drm_i915_private *)dev->dev_private; opregion_enable_asle(dev); dev_priv->irq_enabled = 1; return; } } int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_set"); return (-22); } else { } return (0); } } int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_vblank_pipe_t *pipe ; { dev_priv = (drm_i915_private_t *)dev->dev_private; pipe = (drm_i915_vblank_pipe_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_get"); return (-22); } else { } pipe->pipe = 3; return (0); } } int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv ) { { return (-22); } } void i915_driver_irq_preinstall(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; dev_priv->irq_received.counter = 0; writel(61438U, (void volatile *)dev_priv->regs + 8344U); writel(0U, (void volatile *)dev_priv->regs + 458788U); writel(0U, (void volatile *)dev_priv->regs + 462884U); writel(4294967295U, (void volatile *)dev_priv->regs + 8360U); writel(0U, (void volatile *)dev_priv->regs + 8352U); readl((void const volatile *)dev_priv->regs + 8352U); return; } } int i915_driver_irq_postinstall(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; unsigned int tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; dev_priv->vblank_pipe = 3; dev->max_vblank_count = 16777215U; dev_priv->irq_mask_reg = 4294967214U; dev_priv->pipestat[0] = 0U; dev_priv->pipestat[1] = 0U; tmp = readl((void const volatile *)dev_priv->regs + 458788U); writel(tmp & 2147549183U, (void volatile *)dev_priv->regs + 458788U); tmp___0 = readl((void const volatile *)dev_priv->regs + 462884U); writel(tmp___0 & 2147549183U, (void volatile *)dev_priv->regs + 462884U); tmp___1 = readl((void const volatile *)dev_priv->regs + 8356U); writel(tmp___1, (void volatile *)dev_priv->regs + 8356U); writel(83U, (void volatile *)dev_priv->regs + 8352U); writel(dev_priv->irq_mask_reg, (void volatile *)dev_priv->regs + 8360U); readl((void const volatile *)dev_priv->regs + 8352U); opregion_enable_asle(dev); init_waitqueue_head(& dev_priv->irq_queue); return (0); } } void i915_driver_irq_uninstall(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; unsigned int tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { return; } else { } dev_priv->vblank_pipe = 0; writel(4294967295U, (void volatile *)dev_priv->regs + 8344U); writel(0U, (void volatile *)dev_priv->regs + 458788U); writel(0U, (void volatile *)dev_priv->regs + 462884U); writel(4294967295U, (void volatile *)dev_priv->regs + 8360U); writel(0U, (void volatile *)dev_priv->regs + 8352U); tmp = readl((void const volatile *)dev_priv->regs + 458788U); writel(tmp & 2147549183U, (void volatile *)dev_priv->regs + 458788U); tmp___0 = readl((void const volatile *)dev_priv->regs + 462884U); writel(tmp___0 & 2147549183U, (void volatile *)dev_priv->regs + 462884U); tmp___1 = readl((void const volatile *)dev_priv->regs + 8356U); writel(tmp___1, (void volatile *)dev_priv->regs + 8356U); return; } } void ldv___ldv_spin_lock_73(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_74(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_75(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_76(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_77(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_78(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_79(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_80(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_81(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_82(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_83(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_84(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_85(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_86(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_87(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_88(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_89(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_90(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_91(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_92(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_93(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_94(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_95(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_96(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_97(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_98(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_99(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_100(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_129(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_132(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_133(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_136(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_138(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_140(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_142(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_144(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_130(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_134(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_135(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_137(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_139(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_141(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_143(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_145(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_146(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_131(spinlock_t *ldv_func_arg1 ) ; static void mark_block(struct drm_device *dev , struct mem_block *p , int in_use ) { drm_i915_private_t *dev_priv ; struct drm_i915_master_private *master_priv ; drm_i915_sarea_t *sarea_priv ; struct drm_tex_region *list ; unsigned int shift ; unsigned int nr ; unsigned int start ; unsigned int end ; unsigned int i ; int age ; { dev_priv = (drm_i915_private_t *)dev->dev_private; master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; sarea_priv = master_priv->sarea_priv; shift = (unsigned int )dev_priv->tex_lru_log_granularity; nr = 255U; start = (unsigned int )(p->start >> (int )shift); end = (unsigned int )(((p->start + p->size) + -1) >> (int )shift); sarea_priv->texAge = sarea_priv->texAge + 1; age = sarea_priv->texAge; list = (struct drm_tex_region *)(& sarea_priv->texList); i = start; goto ldv_25662; ldv_25661: (list + (unsigned long )i)->in_use = (unsigned char )in_use; (list + (unsigned long )i)->age = (unsigned int )age; (list + (unsigned long )(list + (unsigned long )i)->next)->prev = (list + (unsigned long )i)->prev; (list + (unsigned long )(list + (unsigned long )i)->prev)->next = (list + (unsigned long )i)->next; (list + (unsigned long )i)->prev = (unsigned char )nr; (list + (unsigned long )i)->next = (list + (unsigned long )nr)->next; (list + (unsigned long )(list + (unsigned long )nr)->next)->prev = (unsigned char )i; (list + (unsigned long )nr)->next = (unsigned char )i; i = i + 1U; ldv_25662: ; if (i <= end) { goto ldv_25661; } else { } return; } } static struct mem_block *split_block(struct mem_block *p , int start , int size , struct drm_file *file_priv ) { struct mem_block *newblock ; void *tmp ; struct mem_block *newblock___0 ; void *tmp___0 ; { if (p->start < start) { tmp = drm_alloc(32UL, 14); newblock = (struct mem_block *)tmp; if ((unsigned long )newblock == (unsigned long )((struct mem_block *)0)) { goto out; } else { } newblock->start = start; newblock->size = p->size + (p->start - start); newblock->file_priv = 0; newblock->next = p->next; newblock->prev = p; (p->next)->prev = newblock; p->next = newblock; p->size = p->size - newblock->size; p = newblock; } else { } if (p->size > size) { tmp___0 = drm_alloc(32UL, 14); newblock___0 = (struct mem_block *)tmp___0; if ((unsigned long )newblock___0 == (unsigned long )((struct mem_block *)0)) { goto out; } else { } newblock___0->start = start + size; newblock___0->size = p->size - size; newblock___0->file_priv = 0; newblock___0->next = p->next; newblock___0->prev = p; (p->next)->prev = newblock___0; p->next = newblock___0; p->size = size; } else { } out: p->file_priv = file_priv; return (p); } } static struct mem_block *alloc_block(struct mem_block *heap , int size , int align2 , struct drm_file *file_priv ) { struct mem_block *p ; int mask ; int start ; struct mem_block *tmp ; { mask = (1 << align2) + -1; p = heap->next; goto ldv_25683; ldv_25682: start = (p->start + mask) & ~ mask; if ((unsigned long )p->file_priv == (unsigned long )((struct drm_file *)0) && start + size <= p->start + p->size) { tmp = split_block(p, start, size, file_priv); return (tmp); } else { } p = p->next; ldv_25683: ; if ((unsigned long )p != (unsigned long )heap) { goto ldv_25682; } else { } return (0); } } static struct mem_block *find_block(struct mem_block *heap , int start ) { struct mem_block *p ; { p = heap->next; goto ldv_25691; ldv_25690: ; if (p->start == start) { return (p); } else { } p = p->next; ldv_25691: ; if ((unsigned long )p != (unsigned long )heap) { goto ldv_25690; } else { } return (0); } } static void free_block(struct mem_block *p ) { struct mem_block *q ; struct mem_block *q___0 ; { p->file_priv = 0; if ((unsigned long )(p->next)->file_priv == (unsigned long )((struct drm_file *)0)) { q = p->next; p->size = p->size + q->size; p->next = q->next; (p->next)->prev = p; drm_free((void *)q, 32UL, 14); } else { } if ((unsigned long )(p->prev)->file_priv == (unsigned long )((struct drm_file *)0)) { q___0 = p->prev; q___0->size = q___0->size + p->size; q___0->next = p->next; (q___0->next)->prev = q___0; drm_free((void *)p, 32UL, 14); } else { } return; } } static int init_heap(struct mem_block **heap , int start , int size ) { struct mem_block *blocks ; void *tmp ; void *tmp___0 ; struct mem_block *tmp___1 ; struct mem_block *tmp___2 ; { tmp = drm_alloc(32UL, 14); blocks = (struct mem_block *)tmp; if ((unsigned long )blocks == (unsigned long )((struct mem_block *)0)) { return (-12); } else { } tmp___0 = drm_alloc(32UL, 14); *heap = (struct mem_block *)tmp___0; if ((unsigned long )*heap == (unsigned long )((struct mem_block *)0)) { drm_free((void *)blocks, 32UL, 14); return (-12); } else { } blocks->start = start; blocks->size = size; blocks->file_priv = 0; tmp___1 = *heap; blocks->prev = tmp___1; blocks->next = tmp___1; memset((void *)*heap, 0, 32UL); (*heap)->file_priv = 0xffffffffffffffffUL; tmp___2 = blocks; (*heap)->prev = tmp___2; (*heap)->next = tmp___2; return (0); } } void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap ) { struct mem_block *p ; struct mem_block *q ; { if ((unsigned long )heap == (unsigned long )((struct mem_block *)0) || (unsigned long )heap->next == (unsigned long )((struct mem_block *)0)) { return; } else { } p = heap->next; goto ldv_25711; ldv_25710: ; if ((unsigned long )p->file_priv == (unsigned long )file_priv) { p->file_priv = 0; mark_block(dev, p, 0); } else { } p = p->next; ldv_25711: ; if ((unsigned long )p != (unsigned long )heap) { goto ldv_25710; } else { } p = heap->next; goto ldv_25718; ldv_25717: ; goto ldv_25715; ldv_25714: q = p->next; p->size = p->size + q->size; p->next = q->next; (p->next)->prev = p; drm_free((void *)q, 32UL, 14); ldv_25715: ; if ((unsigned long )p->file_priv == (unsigned long )((struct drm_file *)0) && (unsigned long )(p->next)->file_priv == (unsigned long )((struct drm_file *)0)) { goto ldv_25714; } else { } p = p->next; ldv_25718: ; if ((unsigned long )p != (unsigned long )heap) { goto ldv_25717; } else { } return; } } void i915_mem_takedown(struct mem_block **heap ) { struct mem_block *p ; struct mem_block *q ; { if ((unsigned long )*heap == (unsigned long )((struct mem_block *)0)) { return; } else { } p = (*heap)->next; goto ldv_25726; ldv_25725: q = p; p = p->next; drm_free((void *)q, 32UL, 14); ldv_25726: ; if ((unsigned long )*heap != (unsigned long )p) { goto ldv_25725; } else { } drm_free((void *)*heap, 32UL, 14); *heap = 0; return; } } static struct mem_block **get_heap(drm_i915_private_t *dev_priv , int region ) { { switch (region) { case 1: ; return (& dev_priv->agp_heap); default: ; return (0); } } } int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_mem_alloc_t *alloc ; struct mem_block *block ; struct mem_block **heap ; unsigned long tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; alloc = (drm_i915_mem_alloc_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_alloc"); return (-22); } else { } heap = get_heap(dev_priv, alloc->region); if ((unsigned long )heap == (unsigned long )((struct mem_block **)0) || (unsigned long )*heap == (unsigned long )((struct mem_block *)0)) { return (-14); } else { } if (alloc->alignment <= 11) { alloc->alignment = 12; } else { } block = alloc_block(*heap, alloc->size, alloc->alignment, file_priv); if ((unsigned long )block == (unsigned long )((struct mem_block *)0)) { return (-12); } else { } mark_block(dev, block, 1); tmp = copy_to_user((void *)alloc->region_offset, (void const *)(& block->start), 4U); if (tmp != 0UL) { printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_mem_alloc"); return (-14); } else { } return (0); } } int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_mem_free_t *memfree ; struct mem_block *block ; struct mem_block **heap ; { dev_priv = (drm_i915_private_t *)dev->dev_private; memfree = (drm_i915_mem_free_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_free"); return (-22); } else { } heap = get_heap(dev_priv, memfree->region); if ((unsigned long )heap == (unsigned long )((struct mem_block **)0) || (unsigned long )*heap == (unsigned long )((struct mem_block *)0)) { return (-14); } else { } block = find_block(*heap, memfree->region_offset); if ((unsigned long )block == (unsigned long )((struct mem_block *)0)) { return (-14); } else { } if ((unsigned long )block->file_priv != (unsigned long )file_priv) { return (-1); } else { } mark_block(dev, block, 0); free_block(block); return (0); } } int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_mem_init_heap_t *initheap ; struct mem_block **heap ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; initheap = (drm_i915_mem_init_heap_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_init_heap"); return (-22); } else { } heap = get_heap(dev_priv, initheap->region); if ((unsigned long )heap == (unsigned long )((struct mem_block **)0)) { return (-14); } else { } if ((unsigned long )*heap != (unsigned long )((struct mem_block *)0)) { printk("<3>[drm:%s] *ERROR* heap already initialized?", "i915_mem_init_heap"); return (-14); } else { } tmp = init_heap(heap, initheap->start, initheap->size); return (tmp); } } int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; drm_i915_mem_destroy_heap_t *destroyheap ; struct mem_block **heap ; { dev_priv = (drm_i915_private_t *)dev->dev_private; destroyheap = (drm_i915_mem_destroy_heap_t *)data; if ((unsigned long )dev_priv == (unsigned long )((drm_i915_private_t *)0)) { printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_destroy_heap"); return (-22); } else { } heap = get_heap(dev_priv, destroyheap->region); if ((unsigned long )heap == (unsigned long )((struct mem_block **)0)) { printk("<3>[drm:%s] *ERROR* get_heap failed", "i915_mem_destroy_heap"); return (-14); } else { } if ((unsigned long )*heap == (unsigned long )((struct mem_block *)0)) { printk("<3>[drm:%s] *ERROR* heap not initialized?", "i915_mem_destroy_heap"); return (-14); } else { } i915_mem_takedown(heap); return (0); } } void ldv___ldv_spin_lock_129(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_130(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_131(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_132(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_133(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_134(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_135(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_136(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_137(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_138(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_139(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_140(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_141(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_142(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_143(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_144(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_145(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_146(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_165(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_168(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_169(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_172(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_174(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_176(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_178(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_180(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_166(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_170(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_171(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_173(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_175(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_177(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_179(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_181(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_182(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_167(spinlock_t *ldv_func_arg1 ) ; extern void __const_udelay(unsigned long ) ; __inline static unsigned char readb(void const volatile *addr ) { unsigned char ret ; { __asm__ volatile ("movb %1,%0": "=q" (ret): "m" (*((unsigned char volatile *)addr)): "memory"); return (ret); } } __inline static void writeb(unsigned char val , void volatile *addr ) { { __asm__ volatile ("movb %0,%1": : "q" (val), "m" (*((unsigned char volatile *)addr)): "memory"); return; } } extern int pci_bus_read_config_byte(struct pci_bus * , unsigned int , int , u8 * ) ; extern int pci_bus_write_config_byte(struct pci_bus * , unsigned int , int , u8 ) ; __inline static int pci_read_config_byte(struct pci_dev *dev , int where , u8 *val ) { int tmp ; { tmp = pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); return (tmp); } } __inline static int pci_write_config_byte(struct pci_dev *dev , int where , u8 val ) { int tmp ; { tmp = pci_bus_write_config_byte(dev->bus, dev->devfn, where, (int )val); return (tmp); } } static bool i915_pipe_enabled___0(struct drm_device *dev , enum pipe pipe ) { struct drm_i915_private *dev_priv ; unsigned int tmp ; unsigned int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; if ((unsigned int )pipe == 0U) { tmp = readl((void const volatile *)dev_priv->regs + 24596U); return ((tmp & 2147483648U) != 0U); } else { tmp___0 = readl((void const volatile *)dev_priv->regs + 24600U); return ((tmp___0 & 2147483648U) != 0U); } } } static void i915_save_palette(struct drm_device *dev , enum pipe pipe ) { struct drm_i915_private *dev_priv ; unsigned long reg ; u32 *array ; int i ; bool tmp ; int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; reg = (unsigned int )pipe == 0U ? 40960UL : 43008UL; tmp = i915_pipe_enabled___0(dev, pipe); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } if ((unsigned int )pipe == 0U) { array = (u32 *)(& dev_priv->save_palette_a); } else { array = (u32 *)(& dev_priv->save_palette_b); } i = 0; goto ldv_25660; ldv_25659: *(array + (unsigned long )i) = readl((void const volatile *)(dev_priv->regs + ((unsigned long )(i << 2) + reg))); i = i + 1; ldv_25660: ; if (i <= 255) { goto ldv_25659; } else { } return; } } static void i915_restore_palette(struct drm_device *dev , enum pipe pipe ) { struct drm_i915_private *dev_priv ; unsigned long reg ; u32 *array ; int i ; bool tmp ; int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; reg = (unsigned int )pipe == 0U ? 40960UL : 43008UL; tmp = i915_pipe_enabled___0(dev, pipe); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } if ((unsigned int )pipe == 0U) { array = (u32 *)(& dev_priv->save_palette_a); } else { array = (u32 *)(& dev_priv->save_palette_b); } i = 0; goto ldv_25671; ldv_25670: writel(*(array + (unsigned long )i), (void volatile *)(dev_priv->regs + ((unsigned long )(i << 2) + reg))); i = i + 1; ldv_25671: ; if (i <= 255) { goto ldv_25670; } else { } return; } } static u8 i915_read_indexed(struct drm_device *dev , u16 index_port , u16 data_port , u8 reg ) { struct drm_i915_private *dev_priv ; unsigned char tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; writeb((int )reg, (void volatile *)dev_priv->regs + (unsigned long )index_port); tmp = readb((void const volatile *)dev_priv->regs + (unsigned long )data_port); return (tmp); } } static u8 i915_read_ar(struct drm_device *dev , u16 st01 , u8 reg , u16 palette_enable ) { struct drm_i915_private *dev_priv ; unsigned char tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; readb((void const volatile *)dev_priv->regs + (unsigned long )st01); writeb((int )((unsigned char )palette_enable) | (int )reg, (void volatile *)dev_priv->regs + 960U); tmp = readb((void const volatile *)dev_priv->regs + 961U); return (tmp); } } static void i915_write_ar(struct drm_device *dev , u16 st01 , u8 reg , u8 val , u16 palette_enable ) { struct drm_i915_private *dev_priv ; { dev_priv = (struct drm_i915_private *)dev->dev_private; readb((void const volatile *)dev_priv->regs + (unsigned long )st01); writeb((int )((unsigned char )palette_enable) | (int )reg, (void volatile *)dev_priv->regs + 960U); writeb((int )val, (void volatile *)dev_priv->regs + 960U); return; } } static void i915_write_indexed(struct drm_device *dev , u16 index_port , u16 data_port , u8 reg , u8 val ) { struct drm_i915_private *dev_priv ; { dev_priv = (struct drm_i915_private *)dev->dev_private; writeb((int )reg, (void volatile *)dev_priv->regs + (unsigned long )index_port); writeb((int )val, (void volatile *)dev_priv->regs + (unsigned long )data_port); return; } } static void i915_save_vga(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; int i ; u16 cr_index ; u16 cr_data ; u16 st01 ; u8 tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; dev_priv->saveDACMASK = readb((void const volatile *)dev_priv->regs + 966U); writeb(0, (void volatile *)dev_priv->regs + 967U); i = 0; goto ldv_25712; ldv_25711: dev_priv->saveDACDATA[i] = readb((void const volatile *)dev_priv->regs + 969U); i = i + 1; ldv_25712: ; if (i <= 767) { goto ldv_25711; } else { } dev_priv->saveMSR = readb((void const volatile *)dev_priv->regs + 972U); if ((int )dev_priv->saveMSR & 1) { cr_index = 980U; cr_data = 981U; st01 = 986U; } else { cr_index = 948U; cr_data = 949U; st01 = 954U; } tmp = i915_read_indexed(dev, (int )cr_index, (int )cr_data, 17); i915_write_indexed(dev, (int )cr_index, (int )cr_data, 17, (int )tmp & 127); i = 0; goto ldv_25715; ldv_25714: dev_priv->saveCR[i] = i915_read_indexed(dev, (int )cr_index, (int )cr_data, (int )((u8 )i)); i = i + 1; ldv_25715: ; if (i <= 36) { goto ldv_25714; } else { } dev_priv->saveCR[17] = (unsigned int )dev_priv->saveCR[17] & 127U; readb((void const volatile *)dev_priv->regs + (unsigned long )st01); dev_priv->saveAR_INDEX = readb((void const volatile *)dev_priv->regs + 960U); i = 0; goto ldv_25718; ldv_25717: dev_priv->saveAR[i] = i915_read_ar(dev, (int )st01, (int )((u8 )i), 0); i = i + 1; ldv_25718: ; if (i <= 20) { goto ldv_25717; } else { } readb((void const volatile *)dev_priv->regs + (unsigned long )st01); writeb((int )dev_priv->saveAR_INDEX, (void volatile *)dev_priv->regs + 960U); readb((void const volatile *)dev_priv->regs + (unsigned long )st01); i = 0; goto ldv_25721; ldv_25720: dev_priv->saveGR[i] = i915_read_indexed(dev, 974, 975, (int )((u8 )i)); i = i + 1; ldv_25721: ; if (i <= 8) { goto ldv_25720; } else { } dev_priv->saveGR[16] = i915_read_indexed(dev, 974, 975, 16); dev_priv->saveGR[17] = i915_read_indexed(dev, 974, 975, 17); dev_priv->saveGR[24] = i915_read_indexed(dev, 974, 975, 24); i = 0; goto ldv_25724; ldv_25723: dev_priv->saveSR[i] = i915_read_indexed(dev, 964, 965, (int )((u8 )i)); i = i + 1; ldv_25724: ; if (i <= 7) { goto ldv_25723; } else { } return; } } static void i915_restore_vga(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; int i ; u16 cr_index ; u16 cr_data ; u16 st01 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; writeb((int )dev_priv->saveMSR, (void volatile *)dev_priv->regs + 962U); if ((int )dev_priv->saveMSR & 1) { cr_index = 980U; cr_data = 981U; st01 = 986U; } else { cr_index = 948U; cr_data = 949U; st01 = 954U; } i = 0; goto ldv_25735; ldv_25734: i915_write_indexed(dev, 964, 965, (int )((u8 )i), (int )dev_priv->saveSR[i]); i = i + 1; ldv_25735: ; if (i <= 6) { goto ldv_25734; } else { } i915_write_indexed(dev, (int )cr_index, (int )cr_data, 17, (int )dev_priv->saveCR[17]); i = 0; goto ldv_25738; ldv_25737: i915_write_indexed(dev, (int )cr_index, (int )cr_data, (int )((u8 )i), (int )dev_priv->saveCR[i]); i = i + 1; ldv_25738: ; if (i <= 36) { goto ldv_25737; } else { } i = 0; goto ldv_25741; ldv_25740: i915_write_indexed(dev, 974, 975, (int )((u8 )i), (int )dev_priv->saveGR[i]); i = i + 1; ldv_25741: ; if (i <= 8) { goto ldv_25740; } else { } i915_write_indexed(dev, 974, 975, 16, (int )dev_priv->saveGR[16]); i915_write_indexed(dev, 974, 975, 17, (int )dev_priv->saveGR[17]); i915_write_indexed(dev, 974, 975, 24, (int )dev_priv->saveGR[24]); readb((void const volatile *)dev_priv->regs + (unsigned long )st01); i = 0; goto ldv_25744; ldv_25743: i915_write_ar(dev, (int )st01, (int )((u8 )i), (int )dev_priv->saveAR[i], 0); i = i + 1; ldv_25744: ; if (i <= 20) { goto ldv_25743; } else { } readb((void const volatile *)dev_priv->regs + (unsigned long )st01); writeb((int )((unsigned int )dev_priv->saveAR_INDEX | 32U), (void volatile *)dev_priv->regs + 960U); readb((void const volatile *)dev_priv->regs + (unsigned long )st01); writeb((int )dev_priv->saveDACMASK, (void volatile *)dev_priv->regs + 966U); writeb(0, (void volatile *)dev_priv->regs + 968U); i = 0; goto ldv_25747; ldv_25746: writeb((int )dev_priv->saveDACDATA[i], (void volatile *)dev_priv->regs + 969U); i = i + 1; ldv_25747: ; if (i <= 767) { goto ldv_25746; } else { } return; } } int i915_save_state(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; int i ; { dev_priv = (struct drm_i915_private *)dev->dev_private; pci_read_config_byte(dev->pdev, 244, & dev_priv->saveLBB); if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818)) { dev_priv->saveRENDERSTANDBY = readl((void const volatile *)dev_priv->regs + 70072U); } else { } dev_priv->saveHWS = readl((void const volatile *)dev_priv->regs + 8320U); dev_priv->saveDSPARB = readl((void const volatile *)dev_priv->regs + 458800U); dev_priv->savePIPEACONF = readl((void const volatile *)dev_priv->regs + 458760U); dev_priv->savePIPEASRC = readl((void const volatile *)dev_priv->regs + 393244U); dev_priv->saveFPA0 = readl((void const volatile *)dev_priv->regs + 24640U); dev_priv->saveFPA1 = readl((void const volatile *)dev_priv->regs + 24644U); dev_priv->saveDPLL_A = readl((void const volatile *)dev_priv->regs + 24596U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev_priv->saveDPLL_A_MD = readl((void const volatile *)dev_priv->regs + 24604U); } else { } dev_priv->saveHTOTAL_A = readl((void const volatile *)dev_priv->regs + 393216U); dev_priv->saveHBLANK_A = readl((void const volatile *)dev_priv->regs + 393220U); dev_priv->saveHSYNC_A = readl((void const volatile *)dev_priv->regs + 393224U); dev_priv->saveVTOTAL_A = readl((void const volatile *)dev_priv->regs + 393228U); dev_priv->saveVBLANK_A = readl((void const volatile *)dev_priv->regs + 393232U); dev_priv->saveVSYNC_A = readl((void const volatile *)dev_priv->regs + 393236U); dev_priv->saveBCLRPAT_A = readl((void const volatile *)dev_priv->regs + 393248U); dev_priv->saveDSPACNTR = readl((void const volatile *)dev_priv->regs + 459136U); dev_priv->saveDSPASTRIDE = readl((void const volatile *)dev_priv->regs + 459144U); dev_priv->saveDSPASIZE = readl((void const volatile *)dev_priv->regs + 459152U); dev_priv->saveDSPAPOS = readl((void const volatile *)dev_priv->regs + 459148U); dev_priv->saveDSPAADDR = readl((void const volatile *)dev_priv->regs + 459140U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev_priv->saveDSPASURF = readl((void const volatile *)dev_priv->regs + 459164U); dev_priv->saveDSPATILEOFF = readl((void const volatile *)dev_priv->regs + 459172U); } else { } i915_save_palette(dev, PIPE_A); dev_priv->savePIPEASTAT = readl((void const volatile *)dev_priv->regs + 458788U); dev_priv->savePIPEBCONF = readl((void const volatile *)dev_priv->regs + 462856U); dev_priv->savePIPEBSRC = readl((void const volatile *)dev_priv->regs + 397340U); dev_priv->saveFPB0 = readl((void const volatile *)dev_priv->regs + 24648U); dev_priv->saveFPB1 = readl((void const volatile *)dev_priv->regs + 24652U); dev_priv->saveDPLL_B = readl((void const volatile *)dev_priv->regs + 24600U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev_priv->saveDPLL_B_MD = readl((void const volatile *)dev_priv->regs + 24608U); } else { } dev_priv->saveHTOTAL_B = readl((void const volatile *)dev_priv->regs + 397312U); dev_priv->saveHBLANK_B = readl((void const volatile *)dev_priv->regs + 397316U); dev_priv->saveHSYNC_B = readl((void const volatile *)dev_priv->regs + 397320U); dev_priv->saveVTOTAL_B = readl((void const volatile *)dev_priv->regs + 397324U); dev_priv->saveVBLANK_B = readl((void const volatile *)dev_priv->regs + 397328U); dev_priv->saveVSYNC_B = readl((void const volatile *)dev_priv->regs + 397332U); dev_priv->saveBCLRPAT_A = readl((void const volatile *)dev_priv->regs + 393248U); dev_priv->saveDSPBCNTR = readl((void const volatile *)dev_priv->regs + 463232U); dev_priv->saveDSPBSTRIDE = readl((void const volatile *)dev_priv->regs + 463240U); dev_priv->saveDSPBSIZE = readl((void const volatile *)dev_priv->regs + 463248U); dev_priv->saveDSPBPOS = readl((void const volatile *)dev_priv->regs + 463244U); dev_priv->saveDSPBADDR = readl((void const volatile *)dev_priv->regs + 463236U); if (dev->pci_device == 10754 || dev->pci_device == 10818) { dev_priv->saveDSPBSURF = readl((void const volatile *)dev_priv->regs + 463260U); dev_priv->saveDSPBTILEOFF = readl((void const volatile *)dev_priv->regs + 463268U); } else { } i915_save_palette(dev, PIPE_B); dev_priv->savePIPEBSTAT = readl((void const volatile *)dev_priv->regs + 462884U); dev_priv->saveADPA = readl((void const volatile *)dev_priv->regs + 397568U); dev_priv->savePP_CONTROL = readl((void const volatile *)dev_priv->regs + 397828U); dev_priv->savePFIT_PGM_RATIOS = readl((void const volatile *)dev_priv->regs + 397876U); dev_priv->saveBLC_PWM_CTL = readl((void const volatile *)dev_priv->regs + 397908U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev_priv->saveBLC_PWM_CTL2 = readl((void const volatile *)dev_priv->regs + 397904U); } else { } if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && dev->pci_device != 13687) { dev_priv->saveLVDS = readl((void const volatile *)dev_priv->regs + 397696U); } else { } if (dev->pci_device != 13687 && dev->pci_device != 9570) { dev_priv->savePFIT_CONTROL = readl((void const volatile *)dev_priv->regs + 397872U); } else { } dev_priv->savePP_ON_DELAYS = readl((void const volatile *)dev_priv->regs + 397832U); dev_priv->savePP_OFF_DELAYS = readl((void const volatile *)dev_priv->regs + 397836U); dev_priv->savePP_DIVISOR = readl((void const volatile *)dev_priv->regs + 397840U); dev_priv->saveFBC_CFB_BASE = readl((void const volatile *)dev_priv->regs + 12800U); dev_priv->saveFBC_LL_BASE = readl((void const volatile *)dev_priv->regs + 12804U); dev_priv->saveFBC_CONTROL2 = readl((void const volatile *)dev_priv->regs + 12820U); dev_priv->saveFBC_CONTROL = readl((void const volatile *)dev_priv->regs + 12808U); dev_priv->saveIIR = readl((void const volatile *)dev_priv->regs + 8356U); dev_priv->saveIER = readl((void const volatile *)dev_priv->regs + 8352U); dev_priv->saveIMR = readl((void const volatile *)dev_priv->regs + 8360U); dev_priv->saveVGA0 = readl((void const volatile *)dev_priv->regs + 24576U); dev_priv->saveVGA1 = readl((void const volatile *)dev_priv->regs + 24580U); dev_priv->saveVGA_PD = readl((void const volatile *)dev_priv->regs + 24592U); dev_priv->saveVGACNTRL = readl((void const volatile *)dev_priv->regs + 463872U); dev_priv->saveD_STATE = readl((void const volatile *)dev_priv->regs + 24836U); dev_priv->saveCG_2D_DIS = readl((void const volatile *)dev_priv->regs + 25088U); dev_priv->saveCACHE_MODE_0 = readl((void const volatile *)dev_priv->regs + 8480U); dev_priv->saveMI_ARB_STATE = readl((void const volatile *)dev_priv->regs + 8420U); i = 0; goto ldv_25755; ldv_25754: dev_priv->saveSWF0[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 463888)); dev_priv->saveSWF1[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 459792)); i = i + 1; ldv_25755: ; if (i <= 15) { goto ldv_25754; } else { } i = 0; goto ldv_25758; ldv_25757: dev_priv->saveSWF2[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 467988)); i = i + 1; ldv_25758: ; if (i <= 2) { goto ldv_25757; } else { } i915_save_vga(dev); return (0); } } int i915_restore_state(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; int i ; unsigned int tmp ; unsigned int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; pci_write_config_byte(dev->pdev, 244, (int )dev_priv->saveLBB); if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818)) { writel(dev_priv->saveRENDERSTANDBY, (void volatile *)dev_priv->regs + 70072U); } else { } writel(dev_priv->saveHWS, (void volatile *)dev_priv->regs + 8320U); writel(dev_priv->saveDSPARB, (void volatile *)dev_priv->regs + 458800U); if ((int )dev_priv->saveDPLL_A < 0) { writel(dev_priv->saveDPLL_A & 2147483647U, (void volatile *)dev_priv->regs + 24596U); __const_udelay(644250UL); } else { } writel(dev_priv->saveFPA0, (void volatile *)dev_priv->regs + 24640U); writel(dev_priv->saveFPA1, (void volatile *)dev_priv->regs + 24644U); writel(dev_priv->saveDPLL_A, (void volatile *)dev_priv->regs + 24596U); __const_udelay(644250UL); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel(dev_priv->saveDPLL_A_MD, (void volatile *)dev_priv->regs + 24604U); } else { } __const_udelay(644250UL); writel(dev_priv->saveHTOTAL_A, (void volatile *)dev_priv->regs + 393216U); writel(dev_priv->saveHBLANK_A, (void volatile *)dev_priv->regs + 393220U); writel(dev_priv->saveHSYNC_A, (void volatile *)dev_priv->regs + 393224U); writel(dev_priv->saveVTOTAL_A, (void volatile *)dev_priv->regs + 393228U); writel(dev_priv->saveVBLANK_A, (void volatile *)dev_priv->regs + 393232U); writel(dev_priv->saveVSYNC_A, (void volatile *)dev_priv->regs + 393236U); writel(dev_priv->saveBCLRPAT_A, (void volatile *)dev_priv->regs + 393248U); writel(dev_priv->saveDSPASIZE, (void volatile *)dev_priv->regs + 459152U); writel(dev_priv->saveDSPAPOS, (void volatile *)dev_priv->regs + 459148U); writel(dev_priv->savePIPEASRC, (void volatile *)dev_priv->regs + 393244U); writel(dev_priv->saveDSPAADDR, (void volatile *)dev_priv->regs + 459140U); writel(dev_priv->saveDSPASTRIDE, (void volatile *)dev_priv->regs + 459144U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel(dev_priv->saveDSPASURF, (void volatile *)dev_priv->regs + 459164U); writel(dev_priv->saveDSPATILEOFF, (void volatile *)dev_priv->regs + 459172U); } else { } writel(dev_priv->savePIPEACONF, (void volatile *)dev_priv->regs + 458760U); i915_restore_palette(dev, PIPE_A); writel(dev_priv->saveDSPACNTR, (void volatile *)dev_priv->regs + 459136U); tmp = readl((void const volatile *)dev_priv->regs + 459140U); writel(tmp, (void volatile *)dev_priv->regs + 459140U); if ((int )dev_priv->saveDPLL_B < 0) { writel(dev_priv->saveDPLL_B & 2147483647U, (void volatile *)dev_priv->regs + 24600U); __const_udelay(644250UL); } else { } writel(dev_priv->saveFPB0, (void volatile *)dev_priv->regs + 24648U); writel(dev_priv->saveFPB1, (void volatile *)dev_priv->regs + 24652U); writel(dev_priv->saveDPLL_B, (void volatile *)dev_priv->regs + 24600U); __const_udelay(644250UL); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel(dev_priv->saveDPLL_B_MD, (void volatile *)dev_priv->regs + 24608U); } else { } __const_udelay(644250UL); writel(dev_priv->saveHTOTAL_B, (void volatile *)dev_priv->regs + 397312U); writel(dev_priv->saveHBLANK_B, (void volatile *)dev_priv->regs + 397316U); writel(dev_priv->saveHSYNC_B, (void volatile *)dev_priv->regs + 397320U); writel(dev_priv->saveVTOTAL_B, (void volatile *)dev_priv->regs + 397324U); writel(dev_priv->saveVBLANK_B, (void volatile *)dev_priv->regs + 397328U); writel(dev_priv->saveVSYNC_B, (void volatile *)dev_priv->regs + 397332U); writel(dev_priv->saveBCLRPAT_B, (void volatile *)dev_priv->regs + 397344U); writel(dev_priv->saveDSPBSIZE, (void volatile *)dev_priv->regs + 463248U); writel(dev_priv->saveDSPBPOS, (void volatile *)dev_priv->regs + 463244U); writel(dev_priv->savePIPEBSRC, (void volatile *)dev_priv->regs + 397340U); writel(dev_priv->saveDSPBADDR, (void volatile *)dev_priv->regs + 463236U); writel(dev_priv->saveDSPBSTRIDE, (void volatile *)dev_priv->regs + 463240U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel(dev_priv->saveDSPBSURF, (void volatile *)dev_priv->regs + 463260U); writel(dev_priv->saveDSPBTILEOFF, (void volatile *)dev_priv->regs + 463268U); } else { } writel(dev_priv->savePIPEBCONF, (void volatile *)dev_priv->regs + 462856U); i915_restore_palette(dev, PIPE_B); writel(dev_priv->saveDSPBCNTR, (void volatile *)dev_priv->regs + 463232U); tmp___0 = readl((void const volatile *)dev_priv->regs + 463236U); writel(tmp___0, (void volatile *)dev_priv->regs + 463236U); writel(dev_priv->saveADPA, (void volatile *)dev_priv->regs + 397568U); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel(dev_priv->saveBLC_PWM_CTL2, (void volatile *)dev_priv->regs + 397904U); } else { } if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && dev->pci_device != 13687) { writel(dev_priv->saveLVDS, (void volatile *)dev_priv->regs + 397696U); } else { } if (dev->pci_device != 13687 && dev->pci_device != 9570) { writel(dev_priv->savePFIT_CONTROL, (void volatile *)dev_priv->regs + 397872U); } else { } writel(dev_priv->savePFIT_PGM_RATIOS, (void volatile *)dev_priv->regs + 397876U); writel(dev_priv->saveBLC_PWM_CTL, (void volatile *)dev_priv->regs + 397908U); writel(dev_priv->savePP_ON_DELAYS, (void volatile *)dev_priv->regs + 397832U); writel(dev_priv->savePP_OFF_DELAYS, (void volatile *)dev_priv->regs + 397836U); writel(dev_priv->savePP_DIVISOR, (void volatile *)dev_priv->regs + 397840U); writel(dev_priv->savePP_CONTROL, (void volatile *)dev_priv->regs + 397828U); writel(dev_priv->saveFBC_CFB_BASE, (void volatile *)dev_priv->regs + 12800U); writel(dev_priv->saveFBC_LL_BASE, (void volatile *)dev_priv->regs + 12804U); writel(dev_priv->saveFBC_CONTROL2, (void volatile *)dev_priv->regs + 12820U); writel(dev_priv->saveFBC_CONTROL, (void volatile *)dev_priv->regs + 12808U); writel(dev_priv->saveVGACNTRL, (void volatile *)dev_priv->regs + 463872U); writel(dev_priv->saveVGA0, (void volatile *)dev_priv->regs + 24576U); writel(dev_priv->saveVGA1, (void volatile *)dev_priv->regs + 24580U); writel(dev_priv->saveVGA_PD, (void volatile *)dev_priv->regs + 24592U); __const_udelay(644250UL); writel(dev_priv->saveD_STATE, (void volatile *)dev_priv->regs + 24836U); writel(dev_priv->saveCG_2D_DIS, (void volatile *)dev_priv->regs + 25088U); writel(dev_priv->saveCACHE_MODE_0 | 4294901760U, (void volatile *)dev_priv->regs + 8480U); writel(dev_priv->saveMI_ARB_STATE | 4294901760U, (void volatile *)dev_priv->regs + 8420U); i = 0; goto ldv_25766; ldv_25765: writel(dev_priv->saveSWF0[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 463888)); writel(dev_priv->saveSWF1[i + 7], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 459792)); i = i + 1; ldv_25766: ; if (i <= 15) { goto ldv_25765; } else { } i = 0; goto ldv_25769; ldv_25768: writel(dev_priv->saveSWF2[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 467988)); i = i + 1; ldv_25769: ; if (i <= 2) { goto ldv_25768; } else { } i915_restore_vga(dev); return (0); } } void ldv___ldv_spin_lock_165(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_166(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_167(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_168(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_169(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_170(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_171(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_172(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_173(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_174(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_175(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_176(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_177(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_178(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_179(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_180(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_181(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_182(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } extern void warn_on_slowpath(char const * , int const ) ; extern void __might_sleep(char * , int ) ; __inline static int get_order(unsigned long size ) { int order ; { size = (size - 1UL) >> 11; order = -1; ldv_3872: size = size >> 1; order = order + 1; if (size != 0UL) { goto ldv_3872; } else { } return (order); } } __inline static void INIT_LIST_HEAD(struct list_head *list ) { { list->next = list; list->prev = list; return; } } extern void __list_add(struct list_head * , struct list_head * , struct list_head * ) ; __inline static void list_add(struct list_head *new , struct list_head *head ) { { __list_add(new, head, head->next); return; } } __inline static void list_add_tail(struct list_head *new , struct list_head *head ) { { __list_add(new, head->prev, head); return; } } __inline static void __list_del(struct list_head *prev , struct list_head *next ) { { next->prev = prev; prev->next = next; return; } } extern void list_del(struct list_head * ) ; __inline static void list_del_init(struct list_head *entry ) { { __list_del(entry->prev, entry->next); INIT_LIST_HEAD(entry); return; } } __inline static void list_move_tail(struct list_head *list , struct list_head *head ) { { __list_del(list->prev, list->next); list_add_tail(list, head); return; } } __inline static int list_empty(struct list_head const *head ) { { return ((unsigned long )((struct list_head const *)head->next) == (unsigned long )head); } } extern void lockdep_init_map(struct lockdep_map * , char const * , struct lock_class_key * , int ) ; __inline static void atomic_add(int i , atomic_t *v ) { { __asm__ volatile (".section .smp_locks,\"a\"\n .balign 8 \n .quad 661f\n.previous\n661:\n\tlock; addl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter)); return; } } __inline static void atomic_sub(int i , atomic_t *v ) { { __asm__ volatile (".section .smp_locks,\"a\"\n .balign 8 \n .quad 661f\n.previous\n661:\n\tlock; subl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter)); return; } } __inline static void atomic_dec(atomic_t *v ) { { __asm__ volatile (".section .smp_locks,\"a\"\n .balign 8 \n .quad 661f\n.previous\n661:\n\tlock; decl %0": "=m" (v->counter): "m" (v->counter)); return; } } void ldv___ldv_spin_lock_201(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_204(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_205(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_208(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_210(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_212(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_214(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_216(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_202(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_206(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_207(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_209(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_211(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_213(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_215(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_217(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_218(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_203(spinlock_t *ldv_func_arg1 ) ; extern void prepare_to_wait(wait_queue_head_t * , wait_queue_t * , int ) ; extern void finish_wait(wait_queue_head_t * , wait_queue_t * ) ; extern int autoremove_wake_function(wait_queue_t * , unsigned int , int , void * ) ; extern void down_write(struct rw_semaphore * ) ; extern void up_write(struct rw_semaphore * ) ; extern void msleep(unsigned int ) ; extern void kref_get(struct kref * ) ; extern int kref_put(struct kref * , void (*)(struct kref * ) ) ; extern void init_timer(struct timer_list * ) ; extern int schedule_delayed_work(struct delayed_work * , unsigned long ) ; extern int cancel_delayed_work_sync(struct delayed_work * ) ; extern ssize_t vfs_read(struct file * , char * , size_t , loff_t * ) ; extern ssize_t vfs_write(struct file * , char const * , size_t , loff_t * ) ; __inline static long PTR_ERR(void const *ptr ) { { return ((long )ptr); } } __inline static long IS_ERR(void const *ptr ) { long tmp ; { tmp = ldv__builtin_expect((unsigned long )ptr > 0xfffffffffffff000UL, 0L); return (tmp); } } __inline static void writeq(unsigned long val , void volatile *addr ) { { __asm__ volatile ("movq %0,%1": : "r" (val), "m" (*((unsigned long volatile *)addr)): "memory"); return; } } extern void put_page(struct page * ) ; __inline static void *lowmem_page_address(struct page *page ) { { return ((void *)((unsigned long )(((long )page + 32985348833280L) / 96L << 12) + 0xffff880000000000UL)); } } extern void unmap_mapping_range(struct address_space * , loff_t const , loff_t const , int ) ; extern int set_page_dirty(struct page * ) ; extern unsigned long do_mmap_pgoff(struct file * , unsigned long , unsigned long , unsigned long , unsigned long , unsigned long ) ; __inline static unsigned long do_mmap(struct file *file , unsigned long addr , unsigned long len , unsigned long prot , unsigned long flag , unsigned long offset ) { unsigned long ret ; { ret = 0xffffffffffffffeaUL; if (((len + 4095UL) & 0xfffffffffffff000UL) + offset < offset) { goto out; } else { } if ((offset & 4095UL) == 0UL) { ret = do_mmap_pgoff(file, addr, len, prot, flag, offset >> 12); } else { } out: ; return (ret); } } extern int vm_insert_pfn(struct vm_area_struct * , unsigned long , unsigned long ) ; extern void schedule(void) ; extern unsigned long copy_from_user(void * , void const * , unsigned int ) ; extern long __copy_user_nocache(void * , void const * , unsigned int , int ) ; __inline static int __copy_from_user_inatomic_nocache(void *dst , void const *src , unsigned int size ) { long tmp ; { tmp = __copy_user_nocache(dst, src, size, 0); return ((int )tmp); } } __inline static void *kmap(struct page *page ) { void *tmp ; { __might_sleep((char *)"include/linux/highmem.h", 41); tmp = lowmem_page_address(page); return (tmp); } } extern struct page *read_cache_page(struct address_space * , unsigned long , filler_t * , void * ) ; __inline static struct page *read_mapping_page(struct address_space *mapping , unsigned long index , void *data ) { filler_t *filler ; struct page *tmp ; { filler = (filler_t *)(mapping->a_ops)->readpage; tmp = read_cache_page(mapping, index, filler, data); return (tmp); } } extern int drm_ht_insert_item(struct drm_open_hash * , struct drm_hash_item * ) ; extern int drm_ht_remove_item(struct drm_open_hash * , struct drm_hash_item * ) ; extern int drm_free_agp(struct agp_memory * , int ) ; extern struct agp_memory *drm_agp_bind_pages(struct drm_device * , struct page ** , unsigned long , uint32_t , uint32_t ) ; extern int drm_unbind_agp(struct agp_memory * ) ; extern void drm_clflush_pages(struct page ** , unsigned long ) ; extern void drm_agp_chipset_flush(struct drm_device * ) ; extern struct drm_mm_node *drm_mm_get_block(struct drm_mm_node * , unsigned long , unsigned int ) ; extern void drm_mm_put_block(struct drm_mm_node * ) ; extern struct drm_mm_node *drm_mm_search_free(struct drm_mm const * , unsigned long , unsigned int , int ) ; extern void drm_gem_object_free(struct kref * ) ; extern struct drm_gem_object *drm_gem_object_alloc(struct drm_device * , size_t ) ; extern void drm_gem_object_handle_free(struct kref * ) ; __inline static void drm_gem_object_reference(struct drm_gem_object *obj ) { { kref_get(& obj->refcount); return; } } __inline static void drm_gem_object_unreference(struct drm_gem_object *obj ) { { if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return; } else { } kref_put(& obj->refcount, & drm_gem_object_free); return; } } extern int drm_gem_handle_create(struct drm_file * , struct drm_gem_object * , int * ) ; __inline static void drm_gem_object_handle_unreference(struct drm_gem_object *obj ) { { if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return; } else { } kref_put(& obj->handlecount, & drm_gem_object_handle_free); drm_gem_object_unreference(obj); return; } } extern struct drm_gem_object *drm_gem_object_lookup(struct drm_device * , struct drm_file * , int ) ; extern void drm_core_ioremap_wc(struct drm_map * , struct drm_device * ) ; __inline static void *io_mapping_map_atomic_wc(struct io_mapping *mapping , unsigned long offset ) { { return ((void *)mapping + offset); } } __inline static void io_mapping_unmap_atomic(void *vaddr ) { { return; } } int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment ) ; void i915_gem_object_unpin(struct drm_gem_object *obj ) ; void i915_gem_retire_requests(struct drm_device *dev ) ; void i915_gem_retire_work_handler(struct work_struct *work ) ; void i915_gem_clflush_object(struct drm_gem_object *obj ) ; int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj , int write ) ; void i915_gem_detect_bit_6_swizzle(struct drm_device *dev ) ; extern void mark_page_accessed(struct page * ) ; static void i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj , uint32_t read_domains , uint32_t write_domain ) ; static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj ) ; static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj ) ; static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj ) ; static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj , int write ) ; static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj , uint64_t offset , uint64_t size ) ; static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj ) ; static int i915_gem_object_get_page_list(struct drm_gem_object *obj ) ; static void i915_gem_object_free_page_list(struct drm_gem_object *obj ) ; static int i915_gem_object_wait_rendering(struct drm_gem_object *obj ) ; static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj , unsigned int alignment ) ; static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj ) ; static void i915_gem_clear_fence_reg(struct drm_gem_object *obj ) ; static int i915_gem_evict_something(struct drm_device *dev ) ; int i915_gem_do_init(struct drm_device *dev , unsigned long start , unsigned long end ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((start >= end || (start & 4095UL) != 0UL) || (end & 4095UL) != 0UL) { return (-22); } else { } drm_mm_init(& dev_priv->mm.gtt_space, start, end - start); dev->gtt_total = (unsigned int )end - (unsigned int )start; return (0); } } int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_init *args ; int ret ; { args = (struct drm_i915_gem_init *)data; mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_gem_do_init(dev, (unsigned long )args->gtt_start, (unsigned long )args->gtt_end); mutex_unlock(& dev->struct_mutex); return (ret); } } int i915_gem_get_aperture_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_get_aperture *args ; { args = (struct drm_i915_gem_get_aperture *)data; if (((dev->driver)->driver_features & 4096U) == 0U) { return (-19); } else { } args->aper_size = (uint64_t )dev->gtt_total; args->aper_available_size = args->aper_size - (uint64_t )dev->pin_memory.counter; return (0); } } int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_create *args ; struct drm_gem_object *obj ; int handle ; int ret ; { args = (struct drm_i915_gem_create *)data; args->size = ((args->size + 4095ULL) / 4096ULL) * 4096ULL; obj = drm_gem_object_alloc(dev, (size_t )args->size); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-12); } else { } ret = drm_gem_handle_create(file_priv, obj, & handle); mutex_lock_nested(& dev->struct_mutex, 0U); drm_gem_object_handle_unreference(obj); mutex_unlock(& dev->struct_mutex); if (ret != 0) { return (ret); } else { } args->handle = (uint32_t )handle; return (0); } } int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_pread *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; ssize_t read ; loff_t offset ; int ret ; { args = (struct drm_i915_gem_pread *)data; obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((args->offset > (unsigned long long )obj->size || args->size > (unsigned long long )obj->size) || args->offset + args->size > (unsigned long long )obj->size) { drm_gem_object_unreference(obj); return (-22); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset, args->size); if (ret != 0) { drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (ret); } else { } offset = (loff_t )args->offset; read = vfs_read(obj->filp, (char *)args->data_ptr, (size_t )args->size, & offset); if ((unsigned long long )read != args->size) { drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); if (read < 0L) { return ((int )read); } else { return (-22); } } else { } drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (0); } } __inline static int fast_user_write(struct io_mapping *mapping , loff_t page_base , int page_offset___0 , char *user_data , int length ) { char *vaddr_atomic ; unsigned long unwritten ; void *tmp ; int tmp___0 ; { tmp = io_mapping_map_atomic_wc(mapping, (unsigned long )page_base); vaddr_atomic = (char *)tmp; tmp___0 = __copy_from_user_inatomic_nocache((void *)vaddr_atomic + (unsigned long )page_offset___0, (void const *)user_data, (unsigned int )length); unwritten = (unsigned long )tmp___0; io_mapping_unmap_atomic((void *)vaddr_atomic); if (unwritten != 0UL) { return (-14); } else { } return (0); } } __inline static int slow_user_write(struct io_mapping *mapping , loff_t page_base , int page_offset___0 , char *user_data , int length ) { char *vaddr ; unsigned long unwritten ; void *tmp ; int tmp___0 ; { tmp = io_mapping_map_atomic_wc(mapping, (unsigned long )page_base); vaddr = (char *)tmp; if ((unsigned long )vaddr == (unsigned long )((char *)0)) { return (-14); } else { } tmp___0 = __copy_from_user((void *)vaddr + (unsigned long )page_offset___0, (void const *)user_data, (unsigned int )length); unwritten = (unsigned long )tmp___0; io_mapping_unmap_atomic((void *)vaddr); if (unwritten != 0UL) { return (-14); } else { } return (0); } } static int i915_gem_gtt_pwrite(struct drm_device *dev , struct drm_gem_object *obj , struct drm_i915_gem_pwrite *args , struct drm_file *file_priv ) { struct drm_i915_gem_object *obj_priv ; drm_i915_private_t *dev_priv ; ssize_t remain ; loff_t offset ; loff_t page_base ; char *user_data ; int page_offset___0 ; int page_length ; int ret ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp ; long tmp___0 ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; dev_priv = (drm_i915_private_t *)dev->dev_private; user_data = (char *)args->data_ptr; remain = (ssize_t )args->size; tmp = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (user_data), "g" (remain), "rm" (tmp->addr_limit.seg)); tmp___0 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___0 == 0L) { return (-14); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_gem_object_pin(obj, 0U); if (ret != 0) { mutex_unlock(& dev->struct_mutex); return (ret); } else { } ret = i915_gem_object_set_to_gtt_domain(obj, 1); if (ret != 0) { goto fail; } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; offset = (loff_t )((uint64_t )obj_priv->gtt_offset + args->offset); obj_priv->dirty = 1; goto ldv_26164; ldv_26163: page_base = offset & -4096LL; page_offset___0 = (int )offset & 4095; page_length = (int )remain; if ((unsigned long )((ssize_t )page_offset___0 + remain) > 4096UL) { page_length = (int )(4096U - (unsigned int )page_offset___0); } else { } ret = fast_user_write(dev_priv->mm.gtt_mapping, page_base, page_offset___0, user_data, page_length); if (ret != 0) { ret = slow_user_write(dev_priv->mm.gtt_mapping, page_base, page_offset___0, user_data, page_length); if (ret != 0) { goto fail; } else { } } else { } remain = remain - (ssize_t )page_length; user_data = user_data + (unsigned long )page_length; offset = (loff_t )page_length + offset; ldv_26164: ; if (remain > 0L) { goto ldv_26163; } else { } fail: i915_gem_object_unpin(obj); mutex_unlock(& dev->struct_mutex); return (ret); } } static int i915_gem_shmem_pwrite(struct drm_device *dev , struct drm_gem_object *obj , struct drm_i915_gem_pwrite *args , struct drm_file *file_priv ) { int ret ; loff_t offset ; ssize_t written ; { mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_gem_object_set_to_cpu_domain(obj, 1); if (ret != 0) { mutex_unlock(& dev->struct_mutex); return (ret); } else { } offset = (loff_t )args->offset; written = vfs_write(obj->filp, (char const *)args->data_ptr, (size_t )args->size, & offset); if ((unsigned long long )written != args->size) { mutex_unlock(& dev->struct_mutex); if (written < 0L) { return ((int )written); } else { return (-22); } } else { } mutex_unlock(& dev->struct_mutex); return (0); } } int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_pwrite *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; { args = (struct drm_i915_gem_pwrite *)data; ret = 0; obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((args->offset > (unsigned long long )obj->size || args->size > (unsigned long long )obj->size) || args->offset + args->size > (unsigned long long )obj->size) { drm_gem_object_unreference(obj); return (-22); } else { } if (obj_priv->tiling_mode == 0U && dev->gtt_total != 0U) { ret = i915_gem_gtt_pwrite(dev, obj, args, file_priv); } else { ret = i915_gem_shmem_pwrite(dev, obj, args, file_priv); } drm_gem_object_unreference(obj); return (ret); } } int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_set_domain *args ; struct drm_gem_object *obj ; uint32_t read_domains ; uint32_t write_domain ; int ret ; { args = (struct drm_i915_gem_set_domain *)data; read_domains = args->read_domains; write_domain = args->write_domain; if (((dev->driver)->driver_features & 4096U) == 0U) { return (-19); } else { } if ((write_domain & 4294967230U) != 0U) { return (-22); } else { } if ((read_domains & 4294967230U) != 0U) { return (-22); } else { } if (write_domain != 0U && read_domains != write_domain) { return (-22); } else { } obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-9); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); if ((read_domains & 64U) != 0U) { ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0U); if (ret == -22) { ret = 0; } else { } } else { ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0U); } drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (ret); } } int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_sw_finish *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; { args = (struct drm_i915_gem_sw_finish *)data; ret = 0; if (((dev->driver)->driver_features & 4096U) == 0U) { return (-19); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { mutex_unlock(& dev->struct_mutex); return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (obj_priv->pin_count != 0) { i915_gem_object_flush_cpu_write_domain(obj); } else { } drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (ret); } } int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_mmap *args ; struct drm_gem_object *obj ; loff_t offset ; unsigned long addr ; struct task_struct *tmp ; struct task_struct *tmp___0 ; long tmp___1 ; { args = (struct drm_i915_gem_mmap *)data; if (((dev->driver)->driver_features & 4096U) == 0U) { return (-19); } else { } obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-9); } else { } offset = (loff_t )args->offset; tmp = get_current(); down_write(& (tmp->mm)->mmap_sem); addr = do_mmap(obj->filp, 0UL, (unsigned long )args->size, 3UL, 1UL, (unsigned long )args->offset); tmp___0 = get_current(); up_write(& (tmp___0->mm)->mmap_sem); mutex_lock_nested(& dev->struct_mutex, 0U); drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); tmp___1 = IS_ERR((void const *)addr); if (tmp___1 != 0L) { return ((int )addr); } else { } args->addr_ptr = (unsigned long long )addr; return (0); } } int i915_gem_fault(struct vm_area_struct *vma , struct vm_fault *vmf ) { struct drm_gem_object *obj ; struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_i915_gem_object *obj_priv ; unsigned long page_offset___0 ; unsigned long pfn ; int ret ; { obj = (struct drm_gem_object *)vma->vm_private_data; dev = obj->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; ret = 0; page_offset___0 = ((unsigned long )vmf->virtual_address - vma->vm_start) >> 12; mutex_lock_nested(& dev->struct_mutex, 0U); if ((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { ret = i915_gem_object_bind_to_gtt(obj, obj_priv->gtt_alignment); if (ret != 0) { mutex_unlock(& dev->struct_mutex); return (2); } else { } list_add(& obj_priv->list, & dev_priv->mm.inactive_list); } else { } if (obj_priv->fence_reg == -1 && obj_priv->tiling_mode != 0U) { i915_gem_object_get_fence_reg(obj); } else { } pfn = (((dev->agp)->base + (unsigned long )obj_priv->gtt_offset) >> 12) + page_offset___0; ret = vm_insert_pfn(vma, (unsigned long )vmf->virtual_address, pfn); mutex_unlock(& dev->struct_mutex); switch (ret) { case -12: ; case -11: ; return (1); case -14: ; case -16: printk("<3>[drm:%s] *ERROR* can\'t insert pfn?? fault or busy...\n", "i915_gem_fault"); return (2); default: ; return (256); } } } static int i915_gem_create_mmap_offset(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_gem_mm *mm ; struct drm_i915_gem_object *obj_priv ; struct drm_map_list *list ; struct drm_map *map ; int ret ; void *tmp ; int tmp___0 ; { dev = obj->dev; mm = (struct drm_gem_mm *)dev->mm_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; ret = 0; list = & obj->map_list; tmp = drm_calloc(1UL, 72UL, 2); list->map = (struct drm_map *)tmp; if ((unsigned long )list->map == (unsigned long )((struct drm_map *)0)) { return (-12); } else { } map = list->map; map->type = _DRM_GEM; map->size = obj->size; map->handle = (void *)obj; list->file_offset_node = drm_mm_search_free((struct drm_mm const *)(& mm->offset_manager), obj->size / 4096UL, 0U, 0); if ((unsigned long )list->file_offset_node == (unsigned long )((struct drm_mm_node *)0)) { printk("<3>[drm:%s] *ERROR* failed to allocate offset for bo %d\n", "i915_gem_create_mmap_offset", obj->name); ret = -12; goto out_free_list; } else { } list->file_offset_node = drm_mm_get_block(list->file_offset_node, obj->size / 4096UL, 0U); if ((unsigned long )list->file_offset_node == (unsigned long )((struct drm_mm_node *)0)) { ret = -12; goto out_free_list; } else { } list->hash.key = (list->file_offset_node)->start; tmp___0 = drm_ht_insert_item(& mm->offset_hash, & list->hash); if (tmp___0 != 0) { printk("<3>[drm:%s] *ERROR* failed to add to map hash\n", "i915_gem_create_mmap_offset"); goto out_free_mm; } else { } obj_priv->mmap_offset = (unsigned long long )list->hash.key << 12; return (0); out_free_mm: drm_mm_put_block(list->file_offset_node); out_free_list: drm_free((void *)list->map, 72UL, 2); return (ret); } } static uint32_t i915_gem_get_gtt_alignment(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; int start ; int i ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) || obj_priv->tiling_mode == 0U) { return (4096U); } else { } if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { start = 1048576; } else { start = 524288; } i = start; goto ldv_26249; ldv_26248: i = i << 1; ldv_26249: ; if ((size_t )i < obj->size) { goto ldv_26248; } else { } return ((uint32_t )i); } } int i915_gem_mmap_gtt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_mmap_gtt *args ; struct drm_i915_private *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; { args = (struct drm_i915_gem_mmap_gtt *)data; dev_priv = (struct drm_i915_private *)dev->dev_private; if (((dev->driver)->driver_features & 4096U) == 0U) { return (-19); } else { } obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-9); } else { } mutex_lock_nested(& dev->struct_mutex, 0U); obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (obj_priv->mmap_offset == 0ULL) { ret = i915_gem_create_mmap_offset(obj); if (ret != 0) { return (ret); } else { } } else { } args->offset = obj_priv->mmap_offset; obj_priv->gtt_alignment = i915_gem_get_gtt_alignment(obj); if ((unsigned long )obj_priv->agp_mem != (unsigned long )((struct agp_memory *)0) && (obj_priv->gtt_offset & (obj_priv->gtt_alignment - 1U)) != 0U) { drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (-22); } else { } if ((unsigned long )obj_priv->agp_mem == (unsigned long )((struct agp_memory *)0)) { ret = i915_gem_object_bind_to_gtt(obj, obj_priv->gtt_alignment); if (ret != 0) { drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (ret); } else { } list_add(& obj_priv->list, & dev_priv->mm.inactive_list); } else { } drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (0); } } static void i915_gem_object_free_page_list(struct drm_gem_object *obj ) { struct drm_i915_gem_object *obj_priv ; int page_count___0 ; int i ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; page_count___0 = (int )(obj->size / 4096UL); if ((unsigned long )obj_priv->page_list == (unsigned long )((struct page **)0)) { return; } else { } i = 0; goto ldv_26268; ldv_26267: ; if ((unsigned long )*(obj_priv->page_list + (unsigned long )i) != (unsigned long )((struct page *)0)) { if (obj_priv->dirty != 0) { set_page_dirty(*(obj_priv->page_list + (unsigned long )i)); } else { } mark_page_accessed(*(obj_priv->page_list + (unsigned long )i)); put_page(*(obj_priv->page_list + (unsigned long )i)); } else { } i = i + 1; ldv_26268: ; if (i < page_count___0) { goto ldv_26267; } else { } obj_priv->dirty = 0; drm_free((void *)obj_priv->page_list, (unsigned long )page_count___0 * 8UL, 2); obj_priv->page_list = 0; return; } } static void i915_gem_object_move_to_active(struct drm_gem_object *obj , uint32_t seqno ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (obj_priv->active == 0) { drm_gem_object_reference(obj); obj_priv->active = 1; } else { } list_move_tail(& obj_priv->list, & dev_priv->mm.active_list); obj_priv->last_rendering_seqno = seqno; return; } } static void i915_gem_object_move_to_flushing(struct drm_gem_object *obj ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; long tmp ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; tmp = ldv__builtin_expect(obj_priv->active == 0, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (904), "i" (24UL)); ldv_26283: ; goto ldv_26283; } else { } list_move_tail(& obj_priv->list, & dev_priv->mm.flushing_list); obj_priv->last_rendering_seqno = 0U; return; } } static void i915_gem_object_move_to_inactive(struct drm_gem_object *obj ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (obj_priv->pin_count != 0) { list_del_init(& obj_priv->list); } else { list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list); } obj_priv->last_rendering_seqno = 0U; if (obj_priv->active != 0) { obj_priv->active = 0; drm_gem_object_unreference(obj); } else { } return; } } static uint32_t i915_add_request(struct drm_device *dev , uint32_t flush_domains ) { drm_i915_private_t *dev_priv ; struct drm_i915_gem_request *request ; uint32_t seqno ; int was_empty ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; void *tmp ; struct drm_i915_gem_object *obj_priv ; struct drm_i915_gem_object *next ; struct list_head const *__mptr ; struct list_head const *__mptr___0 ; struct drm_gem_object *obj ; struct list_head const *__mptr___1 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; tmp = drm_calloc(1UL, 32UL, 2); request = (struct drm_i915_gem_request *)tmp; if ((unsigned long )request == (unsigned long )((struct drm_i915_gem_request *)0)) { return (0U); } else { } seqno = dev_priv->mm.next_gem_seqno; dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1; if (dev_priv->mm.next_gem_seqno == 0U) { dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1; } else { } if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_add_request"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 276824065U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 128U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = seqno; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 16777216U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); if (drm_debug != 0U) { printk("<7>[drm:%s] %d\n", "i915_add_request", seqno); } else { } request->seqno = seqno; request->emitted_jiffies = jiffies; was_empty = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); list_add_tail(& request->list, & dev_priv->mm.request_list); if (flush_domains != 0U) { __mptr = (struct list_head const *)dev_priv->mm.flushing_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; __mptr___0 = (struct list_head const *)obj_priv->list.next; next = (struct drm_i915_gem_object *)__mptr___0 + 0xfffffffffffffff0UL; goto ldv_26313; ldv_26312: obj = obj_priv->obj; if ((obj->write_domain & flush_domains) == obj->write_domain) { obj->write_domain = 0U; i915_gem_object_move_to_active(obj, seqno); } else { } obj_priv = next; __mptr___1 = (struct list_head const *)next->list.next; next = (struct drm_i915_gem_object *)__mptr___1 + 0xfffffffffffffff0UL; ldv_26313: ; if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.flushing_list)) { goto ldv_26312; } else { } } else { } if (was_empty != 0 && dev_priv->mm.suspended == 0) { schedule_delayed_work(& dev_priv->mm.retire_work, 250UL); } else { } return (seqno); } } static uint32_t i915_retire_commands(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; uint32_t cmd ; uint32_t flush_domains ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; { dev_priv = (drm_i915_private_t *)dev->dev_private; cmd = 33554436U; flush_domains = 0U; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { flush_domains = flush_domains | 4U; } else { } if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_retire_commands"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = cmd; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); return (flush_domains); } } static void i915_gem_retire_request(struct drm_device *dev , struct drm_i915_gem_request *request ) { drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; struct list_head const *__mptr ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; goto ldv_26336; ldv_26335: __mptr = (struct list_head const *)dev_priv->mm.active_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; obj = obj_priv->obj; if (obj_priv->last_rendering_seqno != request->seqno) { return; } else { } if (obj->write_domain != 0U) { i915_gem_object_move_to_flushing(obj); } else { i915_gem_object_move_to_inactive(obj); } ldv_26336: tmp = list_empty((struct list_head const *)(& dev_priv->mm.active_list)); if (tmp == 0) { goto ldv_26335; } else { } return; } } static int i915_seqno_passed(uint32_t seq1 , uint32_t seq2 ) { { return ((int )(seq1 - seq2) >= 0); } } uint32_t i915_get_gem_seqno(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; return ((uint32_t )*((u32 volatile *)dev_priv->hw_status_page + 32UL)); } } void i915_gem_retire_requests(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; uint32_t seqno ; struct drm_i915_gem_request *request ; uint32_t retiring_seqno ; struct list_head const *__mptr ; int tmp ; int tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; seqno = i915_get_gem_seqno(dev); goto ldv_26357; ldv_26356: __mptr = (struct list_head const *)dev_priv->mm.request_list.next; request = (struct drm_i915_gem_request *)__mptr + 0xfffffffffffffff0UL; retiring_seqno = request->seqno; tmp = i915_seqno_passed(seqno, retiring_seqno); if (tmp != 0 || dev_priv->mm.wedged != 0) { i915_gem_retire_request(dev, request); list_del(& request->list); drm_free((void *)request, 32UL, 2); } else { goto ldv_26355; } ldv_26357: tmp___0 = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); if (tmp___0 == 0) { goto ldv_26356; } else { } ldv_26355: ; return; } } void i915_gem_retire_work_handler(struct work_struct *work ) { drm_i915_private_t *dev_priv ; struct drm_device *dev ; struct work_struct const *__mptr ; int tmp ; { __mptr = (struct work_struct const *)work; dev_priv = (drm_i915_private_t *)__mptr + 0xffffffffffffefe0UL; dev = dev_priv->dev; mutex_lock_nested(& dev->struct_mutex, 0U); i915_gem_retire_requests(dev); if (dev_priv->mm.suspended == 0) { tmp = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); if (tmp == 0) { schedule_delayed_work(& dev_priv->mm.retire_work, 250UL); } else { } } else { } mutex_unlock(& dev->struct_mutex); return; } } static int i915_wait_request(struct drm_device *dev , uint32_t seqno ) { drm_i915_private_t *dev_priv ; int ret ; long tmp ; int __ret ; wait_queue_t __wait ; struct task_struct *tmp___0 ; uint32_t tmp___1 ; int tmp___2 ; struct task_struct *tmp___3 ; int tmp___4 ; uint32_t tmp___5 ; int tmp___6 ; uint32_t tmp___7 ; int tmp___8 ; uint32_t tmp___9 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ret = 0; tmp = ldv__builtin_expect(seqno == 0U, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1139), "i" (24UL)); ldv_26371: ; goto ldv_26371; } else { } tmp___7 = i915_get_gem_seqno(dev); tmp___8 = i915_seqno_passed(tmp___7, seqno); if (tmp___8 == 0) { dev_priv->mm.waiting_gem_seqno = seqno; i915_user_irq_get(dev); __ret = 0; tmp___5 = i915_get_gem_seqno(dev); tmp___6 = i915_seqno_passed(tmp___5, seqno); if (tmp___6 == 0 && dev_priv->mm.wedged == 0) { tmp___0 = get_current(); __wait.flags = 0U; __wait.private = (void *)tmp___0; __wait.func = & autoremove_wake_function; __wait.task_list.next = & __wait.task_list; __wait.task_list.prev = & __wait.task_list; ldv_26376: prepare_to_wait(& dev_priv->irq_queue, & __wait, 1); tmp___1 = i915_get_gem_seqno(dev); tmp___2 = i915_seqno_passed(tmp___1, seqno); if (tmp___2 != 0 || dev_priv->mm.wedged != 0) { goto ldv_26374; } else { } tmp___3 = get_current(); tmp___4 = signal_pending(tmp___3); if (tmp___4 == 0) { schedule(); goto ldv_26375; } else { } __ret = -512; goto ldv_26374; ldv_26375: ; goto ldv_26376; ldv_26374: finish_wait(& dev_priv->irq_queue, & __wait); } else { } ret = __ret; i915_user_irq_put(dev); dev_priv->mm.waiting_gem_seqno = 0U; } else { } if (dev_priv->mm.wedged != 0) { ret = -5; } else { } if (ret != 0 && ret != -512) { tmp___9 = i915_get_gem_seqno(dev); printk("<3>[drm:%s] *ERROR* %s returns %d (awaiting %d at %d)\n", "i915_wait_request", "i915_wait_request", ret, seqno, tmp___9); } else { } if (ret == 0) { i915_gem_retire_requests(dev); } else { } return (ret); } } static void i915_gem_flush(struct drm_device *dev , uint32_t invalidate_domains , uint32_t flush_domains ) { drm_i915_private_t *dev_priv ; uint32_t cmd ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((int )flush_domains & 1) { drm_agp_chipset_flush(dev); } else { } if (((invalidate_domains | flush_domains) & 4294967230U) != 0U) { cmd = 33554436U; if (((invalidate_domains | flush_domains) & 2U) != 0U) { cmd = cmd & 4294967291U; } else { } if (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810) { if ((invalidate_domains & 4U) != 0U) { cmd = cmd | 1U; } else { } } else { } if ((invalidate_domains & 16U) != 0U) { cmd = cmd | 2U; } else { } if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_gem_flush"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = cmd; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } else { } return; } } static int i915_gem_object_wait_rendering(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; int ret ; long tmp ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; tmp = ldv__builtin_expect((obj->write_domain & 4294967230U) != 0U, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1255), "i" (24UL)); ldv_26397: ; goto ldv_26397; } else { } if (obj_priv->active != 0) { ret = i915_wait_request(dev, obj_priv->last_rendering_seqno); if (ret != 0) { return (ret); } else { } } else { } return (0); } } static int i915_gem_object_unbind(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; loff_t offset ; int ret ; long tmp ; int tmp___0 ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; ret = 0; if ((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { return (0); } else { } if (obj_priv->pin_count != 0) { printk("<3>[drm:%s] *ERROR* Attempting to unbind pinned buffer\n", "i915_gem_object_unbind"); return (-22); } else { } ret = i915_gem_object_set_to_cpu_domain(obj, 1); if (ret != 0) { if (ret != -512) { printk("<3>[drm:%s] *ERROR* set_domain failed: %d\n", "i915_gem_object_unbind", ret); } else { } return (ret); } else { } if ((unsigned long )obj_priv->agp_mem != (unsigned long )((struct agp_memory *)0)) { drm_unbind_agp(obj_priv->agp_mem); drm_free_agp(obj_priv->agp_mem, (int )(obj->size / 4096UL)); obj_priv->agp_mem = 0; } else { } tmp = ldv__builtin_expect(obj_priv->active != 0, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1315), "i" (24UL)); ldv_26406: ; goto ldv_26406; } else { } offset = (long long )obj->map_list.hash.key << 12; if ((unsigned long )dev->dev_mapping != (unsigned long )((struct address_space *)0)) { unmap_mapping_range(dev->dev_mapping, offset, (loff_t const )obj->size, 1); } else { } if (obj_priv->fence_reg != -1) { i915_gem_clear_fence_reg(obj); } else { } i915_gem_object_free_page_list(obj); if ((unsigned long )obj_priv->gtt_space != (unsigned long )((struct drm_mm_node *)0)) { atomic_dec(& dev->gtt_count); atomic_sub((int )obj->size, & dev->gtt_memory); drm_mm_put_block(obj_priv->gtt_space); obj_priv->gtt_space = 0; } else { } tmp___0 = list_empty((struct list_head const *)(& obj_priv->list)); if (tmp___0 == 0) { list_del_init(& obj_priv->list); } else { } return (0); } } static int i915_gem_evict_something(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; struct list_head const *__mptr ; long tmp ; long tmp___0 ; int tmp___1 ; struct drm_i915_gem_request *request ; struct list_head const *__mptr___0 ; int tmp___2 ; int tmp___3 ; struct list_head const *__mptr___1 ; int tmp___4 ; int tmp___5 ; int tmp___6 ; int tmp___7 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ret = 0; ldv_26426: tmp___1 = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); if (tmp___1 == 0) { __mptr = (struct list_head const *)dev_priv->mm.inactive_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; obj = obj_priv->obj; tmp = ldv__builtin_expect(obj_priv->pin_count != 0, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1359), "i" (24UL)); ldv_26416: ; goto ldv_26416; } else { } tmp___0 = ldv__builtin_expect(obj_priv->active != 0, 0L); if (tmp___0 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1363), "i" (24UL)); ldv_26417: ; goto ldv_26417; } else { } ret = i915_gem_object_unbind(obj); goto ldv_26418; } else { } tmp___3 = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); if (tmp___3 == 0) { __mptr___0 = (struct list_head const *)dev_priv->mm.request_list.next; request = (struct drm_i915_gem_request *)__mptr___0 + 0xfffffffffffffff0UL; ret = i915_wait_request(dev, request->seqno); if (ret != 0) { goto ldv_26418; } else { } tmp___2 = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); if (tmp___2 == 0) { goto ldv_26422; } else { } goto ldv_26418; } else { } tmp___4 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); if (tmp___4 == 0) { __mptr___1 = (struct list_head const *)dev_priv->mm.flushing_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr___1 + 0xfffffffffffffff0UL; obj = obj_priv->obj; i915_gem_flush(dev, obj->write_domain, obj->write_domain); i915_add_request(dev, obj->write_domain); obj = 0; goto ldv_26422; } else { } tmp___5 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); tmp___6 = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); tmp___7 = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); printk("<3>[drm:%s] *ERROR* inactive empty %d request empty %d flushing empty %d\n", "i915_gem_evict_something", tmp___7, tmp___6, tmp___5); return (-12); ldv_26422: ; goto ldv_26426; ldv_26418: ; return (ret); } } static int i915_gem_evict_everything(struct drm_device *dev ) { int ret ; { ldv_26432: ret = i915_gem_evict_something(dev); if (ret != 0) { goto ldv_26431; } else { } goto ldv_26432; ldv_26431: ; if (ret == -12) { return (0); } else { } return (ret); } } static int i915_gem_object_get_page_list(struct drm_gem_object *obj ) { struct drm_i915_gem_object *obj_priv ; int page_count___0 ; int i ; struct address_space *mapping ; struct inode *inode ; struct page *page ; int ret ; long tmp ; void *tmp___0 ; long tmp___1 ; long tmp___2 ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->page_list != (unsigned long )((struct page **)0)) { return (0); } else { } page_count___0 = (int )(obj->size / 4096UL); tmp = ldv__builtin_expect((unsigned long )obj_priv->page_list != (unsigned long )((struct page **)0), 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1460), "i" (24UL)); ldv_26443: ; goto ldv_26443; } else { } tmp___0 = drm_calloc((size_t )page_count___0, 8UL, 2); obj_priv->page_list = (struct page **)tmp___0; if ((unsigned long )obj_priv->page_list == (unsigned long )((struct page **)0)) { printk("<3>[drm:%s] *ERROR* Faled to allocate page list\n", "i915_gem_object_get_page_list"); return (-12); } else { } inode = ((obj->filp)->f_path.dentry)->d_inode; mapping = inode->i_mapping; i = 0; goto ldv_26446; ldv_26445: page = read_mapping_page(mapping, (unsigned long )i, 0); tmp___2 = IS_ERR((void const *)page); if (tmp___2 != 0L) { tmp___1 = PTR_ERR((void const *)page); ret = (int )tmp___1; printk("<3>[drm:%s] *ERROR* read_mapping_page failed: %d\n", "i915_gem_object_get_page_list", ret); i915_gem_object_free_page_list(obj); return (ret); } else { } *(obj_priv->page_list + (unsigned long )i) = page; i = i + 1; ldv_26446: ; if (i < page_count___0) { goto ldv_26445; } else { } return (0); } } static void i965_write_fence_reg(struct drm_i915_fence_reg *reg ) { struct drm_gem_object *obj ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int regnum ; uint64_t val ; { obj = reg->obj; dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; regnum = obj_priv->fence_reg; val = ((unsigned long long )(((size_t )obj_priv->gtt_offset + obj->size) - 4096UL) & 4294963200ULL) << 32; val = ((uint64_t )obj_priv->gtt_offset & 4294963200ULL) | val; val = (uint64_t )((obj_priv->stride / 128U - 1U) << 2) | val; if (obj_priv->tiling_mode == 2U) { val = val | 2ULL; } else { } val = val | 1ULL; writeq((unsigned long )val, (void volatile *)dev_priv->regs + (unsigned long )((regnum + 1536) * 8)); return; } } static void i915_write_fence_reg(struct drm_i915_fence_reg *reg ) { struct drm_gem_object *obj ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int regnum ; uint32_t val ; uint32_t pitch_val ; int __ret_warn_on ; long tmp ; int tmp___0 ; { obj = reg->obj; dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; regnum = obj_priv->fence_reg; if ((obj_priv->gtt_offset & 4027580415U) != 0U || ((size_t )obj_priv->gtt_offset & (obj->size - 1UL)) != 0UL) { __ret_warn_on = 1; tmp = ldv__builtin_expect(__ret_warn_on != 0, 0L); if (tmp != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1515, "%s: object not 1M or size aligned\n", "i915_write_fence_reg"); } else { } ldv__builtin_expect(__ret_warn_on != 0, 0L); return; } else { } if (obj_priv->tiling_mode == 2U && ((dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) { pitch_val = obj_priv->stride / 128U - 1U; } else { pitch_val = obj_priv->stride / 512U - 1U; } val = obj_priv->gtt_offset; if (obj_priv->tiling_mode == 2U) { val = val | 4096U; } else { } tmp___0 = get_order(obj->size >> 20); val = (uint32_t )((tmp___0 + -1) << 8) | val; val = (pitch_val << 4) | val; val = val | 1U; writel(val, (void volatile *)dev_priv->regs + (unsigned long )((regnum + 2048) * 4)); return; } } static void i830_write_fence_reg(struct drm_i915_fence_reg *reg ) { struct drm_gem_object *obj ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int regnum ; uint32_t val ; uint32_t pitch_val ; int __ret_warn_on ; long tmp ; int tmp___0 ; { obj = reg->obj; dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; regnum = obj_priv->fence_reg; if ((obj_priv->gtt_offset & 4027580415U) != 0U || ((size_t )obj_priv->gtt_offset & (obj->size - 1UL)) != 0UL) { __ret_warn_on = 1; tmp = ldv__builtin_expect(__ret_warn_on != 0, 0L); if (tmp != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1548, "%s: object not 1M or size aligned\n", "i830_write_fence_reg"); } else { } ldv__builtin_expect(__ret_warn_on != 0, 0L); return; } else { } pitch_val = obj_priv->stride / 128U - 1U; val = obj_priv->gtt_offset; if (obj_priv->tiling_mode == 2U) { val = val | 4096U; } else { } tmp___0 = get_order(obj->size >> 19); val = (uint32_t )((tmp___0 + -1) << 8) | val; val = (pitch_val << 4) | val; val = val | 1U; writel(val, (void volatile *)dev_priv->regs + (unsigned long )((regnum + 2048) * 4)); return; } } static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_i915_gem_object *obj_priv ; struct drm_i915_fence_reg *reg ; int i ; int ret ; int __ret_warn_on ; long tmp ; int __ret_warn_on___0 ; long tmp___0 ; int __ret_warn_on___1 ; long tmp___1 ; struct drm_i915_gem_object *old_obj_priv ; loff_t offset ; int __ret_warn_on___2 ; long tmp___2 ; { dev = obj->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; reg = 0; switch (obj_priv->tiling_mode) { case (uint32_t )0: __ret_warn_on = 1; tmp = ldv__builtin_expect(__ret_warn_on != 0, 0L); if (tmp != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1589, "allocating a fence for non-tiled object?\n"); } else { } ldv__builtin_expect(__ret_warn_on != 0, 0L); goto ldv_26495; case (uint32_t )1: __ret_warn_on___0 = (obj_priv->stride & 511U) != 0U; tmp___0 = ldv__builtin_expect(__ret_warn_on___0 != 0, 0L); if (tmp___0 != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1593, "object is X tiled but has non-512B pitch\n"); } else { } ldv__builtin_expect(__ret_warn_on___0 != 0, 0L); goto ldv_26495; case (uint32_t )2: __ret_warn_on___1 = (obj_priv->stride & 127U) != 0U; tmp___1 = ldv__builtin_expect(__ret_warn_on___1 != 0, 0L); if (tmp___1 != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1597, "object is Y tiled but has non-128B pitch\n"); } else { } ldv__builtin_expect(__ret_warn_on___1 != 0, 0L); goto ldv_26495; } ldv_26495: i = dev_priv->fence_reg_start; goto ldv_26504; ldv_26503: reg = (struct drm_i915_fence_reg *)(& dev_priv->fence_regs) + (unsigned long )i; if ((unsigned long )reg->obj == (unsigned long )((struct drm_gem_object *)0)) { goto ldv_26502; } else { } i = i + 1; ldv_26504: ; if (dev_priv->num_fence_regs > i) { goto ldv_26503; } else { } ldv_26502: ; if (dev_priv->num_fence_regs == i) { old_obj_priv = 0; try_again: i = dev_priv->fence_reg_start; goto ldv_26510; ldv_26509: reg = (struct drm_i915_fence_reg *)(& dev_priv->fence_regs) + (unsigned long )i; old_obj_priv = (struct drm_i915_gem_object *)(reg->obj)->driver_private; if (old_obj_priv->pin_count == 0) { goto ldv_26508; } else { } i = i + 1; ldv_26510: ; if (dev_priv->num_fence_regs > i) { goto ldv_26509; } else { } ldv_26508: ; if (dev_priv->num_fence_regs == i) { ret = i915_gem_object_wait_rendering(reg->obj); if (ret != 0) { __ret_warn_on___2 = ret != 0; tmp___2 = ldv__builtin_expect(__ret_warn_on___2 != 0, 0L); if (tmp___2 != 0L) { warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 1630, "wait_rendering failed: %d\n", ret); } else { } ldv__builtin_expect(__ret_warn_on___2 != 0, 0L); return; } else { } goto try_again; } else { } offset = (long long )(reg->obj)->map_list.hash.key << 12; if ((unsigned long )dev->dev_mapping != (unsigned long )((struct address_space *)0)) { unmap_mapping_range(dev->dev_mapping, offset, (loff_t const )(reg->obj)->size, 1); } else { } old_obj_priv->fence_reg = -1; } else { } obj_priv->fence_reg = i; reg->obj = obj; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { i965_write_fence_reg(reg); } else if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { i915_write_fence_reg(reg); } else { i830_write_fence_reg(reg); } return; } } static void i915_gem_clear_fence_reg(struct drm_gem_object *obj ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writeq(0UL, (void volatile *)dev_priv->regs + (unsigned long )((obj_priv->fence_reg + 1536) * 8)); } else { writel(0U, (void volatile *)dev_priv->regs + (unsigned long )((obj_priv->fence_reg + 2048) * 4)); } dev_priv->fence_regs[obj_priv->fence_reg].obj = 0; obj_priv->fence_reg = -1; return; } } static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj , unsigned int alignment ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; struct drm_mm_node *free_space ; int page_count___0 ; int ret ; int tmp ; int tmp___0 ; int tmp___1 ; long tmp___2 ; long tmp___3 ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (alignment == 0U) { alignment = 4096U; } else { } if (((unsigned long )alignment & 4095UL) != 0UL) { printk("<3>[drm:%s] *ERROR* Invalid object alignment requested %u\n", "i915_gem_object_bind_to_gtt", alignment); return (-22); } else { } search_free: free_space = drm_mm_search_free((struct drm_mm const *)(& dev_priv->mm.gtt_space), obj->size, alignment, 0); if ((unsigned long )free_space != (unsigned long )((struct drm_mm_node *)0)) { obj_priv->gtt_space = drm_mm_get_block(free_space, obj->size, alignment); if ((unsigned long )obj_priv->gtt_space != (unsigned long )((struct drm_mm_node *)0)) { (obj_priv->gtt_space)->private = (void *)obj; obj_priv->gtt_offset = (uint32_t )(obj_priv->gtt_space)->start; } else { } } else { } if ((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { tmp = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); if (tmp != 0) { tmp___0 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); if (tmp___0 != 0) { tmp___1 = list_empty((struct list_head const *)(& dev_priv->mm.active_list)); if (tmp___1 != 0) { printk("<3>[drm:%s] *ERROR* GTT full, but LRU list empty\n", "i915_gem_object_bind_to_gtt"); return (-12); } else { } } else { } } else { } ret = i915_gem_evict_something(dev); if (ret != 0) { if (ret != -512) { printk("<3>[drm:%s] *ERROR* Failed to evict a buffer %d\n", "i915_gem_object_bind_to_gtt", ret); } else { } return (ret); } else { } goto search_free; } else { } ret = i915_gem_object_get_page_list(obj); if (ret != 0) { drm_mm_put_block(obj_priv->gtt_space); obj_priv->gtt_space = 0; return (ret); } else { } page_count___0 = (int )(obj->size / 4096UL); obj_priv->agp_mem = drm_agp_bind_pages(dev, obj_priv->page_list, (unsigned long )page_count___0, obj_priv->gtt_offset, obj_priv->agp_type); if ((unsigned long )obj_priv->agp_mem == (unsigned long )((struct agp_memory *)0)) { i915_gem_object_free_page_list(obj); drm_mm_put_block(obj_priv->gtt_space); obj_priv->gtt_space = 0; return (-12); } else { } atomic_inc(& dev->gtt_count); atomic_add((int )obj->size, & dev->gtt_memory); tmp___2 = ldv__builtin_expect((obj->read_domains & 4294967230U) != 0U, 0L); if (tmp___2 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1767), "i" (24UL)); ldv_26531: ; goto ldv_26531; } else { } tmp___3 = ldv__builtin_expect((obj->write_domain & 4294967230U) != 0U, 0L); if (tmp___3 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1768), "i" (24UL)); ldv_26532: ; goto ldv_26532; } else { } return (0); } } void i915_gem_clflush_object(struct drm_gem_object *obj ) { struct drm_i915_gem_object *obj_priv ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->page_list == (unsigned long )((struct page **)0)) { return; } else { } drm_clflush_pages(obj_priv->page_list, obj->size / 4096UL); return; } } static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj ) { struct drm_device *dev ; uint32_t seqno ; { dev = obj->dev; if ((obj->write_domain & 4294967230U) == 0U) { return; } else { } i915_gem_flush(dev, 0U, obj->write_domain); seqno = i915_add_request(dev, obj->write_domain); obj->write_domain = 0U; i915_gem_object_move_to_active(obj, seqno); return; } } static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj ) { { if (obj->write_domain != 64U) { return; } else { } obj->write_domain = 0U; return; } } static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj ) { struct drm_device *dev ; { dev = obj->dev; if (obj->write_domain != 1U) { return; } else { } i915_gem_clflush_object(obj); drm_agp_chipset_flush(dev); obj->write_domain = 0U; return; } } int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj , int write ) { struct drm_i915_gem_object *obj_priv ; int ret ; long tmp ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { return (-22); } else { } i915_gem_object_flush_gpu_write_domain(obj); ret = i915_gem_object_wait_rendering(obj); if (ret != 0) { return (ret); } else { } if (write != 0) { obj->read_domains = obj->read_domains & 64U; } else { } i915_gem_object_flush_cpu_write_domain(obj); tmp = ldv__builtin_expect((obj->write_domain & 4294967231U) != 0U, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1866), "i" (24UL)); ldv_26555: ; goto ldv_26555; } else { } obj->read_domains = obj->read_domains | 64U; if (write != 0) { obj->write_domain = 64U; obj_priv->dirty = 1; } else { } return (0); } } static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj , int write ) { struct drm_device *dev ; int ret ; long tmp ; { dev = obj->dev; i915_gem_object_flush_gpu_write_domain(obj); ret = i915_gem_object_wait_rendering(obj); if (ret != 0) { return (ret); } else { } i915_gem_object_flush_gtt_write_domain(obj); i915_gem_object_set_to_full_cpu_read_domain(obj); if ((obj->read_domains & 1U) == 0U) { i915_gem_clflush_object(obj); drm_agp_chipset_flush(dev); obj->read_domains = obj->read_domains | 1U; } else { } tmp = ldv__builtin_expect((obj->write_domain & 4294967294U) != 0U, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (1912), "i" (24UL)); ldv_26562: ; goto ldv_26562; } else { } if (write != 0) { obj->read_domains = obj->read_domains & 1U; obj->write_domain = 1U; } else { } return (0); } } static void i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj , uint32_t read_domains , uint32_t write_domain ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; uint32_t invalidate_domains ; uint32_t flush_domains ; long tmp ; long tmp___0 ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; invalidate_domains = 0U; flush_domains = 0U; tmp = ldv__builtin_expect((long )((int )read_domains) & 1L, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2046), "i" (24UL)); ldv_26572: ; goto ldv_26572; } else { } tmp___0 = ldv__builtin_expect(write_domain == 1U, 0L); if (tmp___0 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2047), "i" (24UL)); ldv_26573: ; goto ldv_26573; } else { } if (write_domain == 0U) { read_domains = obj->read_domains | read_domains; } else { obj_priv->dirty = 1; } if (obj->write_domain != 0U && obj->write_domain != read_domains) { flush_domains = obj->write_domain | flush_domains; invalidate_domains = (~ obj->write_domain & read_domains) | invalidate_domains; } else { } invalidate_domains = (~ obj->read_domains & read_domains) | invalidate_domains; if ((int )(flush_domains | invalidate_domains) & 1) { i915_gem_clflush_object(obj); } else { } if ((write_domain | flush_domains) != 0U) { obj->write_domain = write_domain; } else { } obj->read_domains = read_domains; dev->invalidate_domains = dev->invalidate_domains | invalidate_domains; dev->flush_domains = dev->flush_domains | flush_domains; return; } } static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; int i ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((uint8_t *)0)) { return; } else { } if ((int )obj->read_domains & 1) { i = 0; goto ldv_26582; ldv_26581: ; if ((unsigned int )*(obj_priv->page_cpu_valid + (unsigned long )i) != 0U) { goto ldv_26580; } else { } drm_clflush_pages(obj_priv->page_list + (unsigned long )i, 1UL); ldv_26580: i = i + 1; ldv_26582: ; if ((unsigned long )i <= (obj->size - 1UL) / 4096UL) { goto ldv_26581; } else { } drm_agp_chipset_flush(dev); } else { } drm_free((void *)obj_priv->page_cpu_valid, obj->size / 4096UL, 2); obj_priv->page_cpu_valid = 0; return; } } static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj , uint64_t offset , uint64_t size ) { struct drm_i915_gem_object *obj_priv ; int i ; int ret ; int tmp ; void *tmp___0 ; long tmp___1 ; { obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if (offset == 0ULL && (unsigned long long )obj->size == size) { tmp = i915_gem_object_set_to_cpu_domain(obj, 0); return (tmp); } else { } i915_gem_object_flush_gpu_write_domain(obj); ret = i915_gem_object_wait_rendering(obj); if (ret != 0) { return (ret); } else { } i915_gem_object_flush_gtt_write_domain(obj); if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((uint8_t *)0) && (int )obj->read_domains & 1) { return (0); } else { } if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((uint8_t *)0)) { tmp___0 = drm_calloc(1UL, obj->size / 4096UL, 2); obj_priv->page_cpu_valid = (uint8_t *)tmp___0; if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((uint8_t *)0)) { return (-12); } else { } } else if ((obj->read_domains & 1U) == 0U) { memset((void *)obj_priv->page_cpu_valid, 0, obj->size / 4096UL); } else { } i = (int )(offset / 4096ULL); goto ldv_26594; ldv_26593: ; if ((unsigned int )*(obj_priv->page_cpu_valid + (unsigned long )i) != 0U) { goto ldv_26592; } else { } drm_clflush_pages(obj_priv->page_list + (unsigned long )i, 1UL); *(obj_priv->page_cpu_valid + (unsigned long )i) = 1U; ldv_26592: i = i + 1; ldv_26594: ; if ((unsigned long long )i <= ((offset + size) - 1ULL) / 4096ULL) { goto ldv_26593; } else { } tmp___1 = ldv__builtin_expect((obj->write_domain & 4294967294U) != 0U, 0L); if (tmp___1 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2198), "i" (24UL)); ldv_26596: ; goto ldv_26596; } else { } obj->read_domains = obj->read_domains | 1U; return (0); } } static int i915_gem_object_pin_and_relocate(struct drm_gem_object *obj , struct drm_file *file_priv , struct drm_i915_gem_exec_object *entry ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_relocation_entry reloc ; struct drm_i915_gem_relocation_entry *relocs ; struct drm_i915_gem_object *obj_priv ; int i ; int ret ; void *reloc_page ; struct drm_gem_object *target_obj ; struct drm_i915_gem_object *target_obj_priv ; uint32_t reloc_val ; uint32_t reloc_offset ; uint32_t *reloc_entry ; unsigned long tmp ; unsigned long tmp___0 ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; ret = i915_gem_object_pin(obj, (unsigned int )entry->alignment); if (ret != 0) { return (ret); } else { } entry->offset = (uint64_t )obj_priv->gtt_offset; relocs = (struct drm_i915_gem_relocation_entry *)entry->relocs_ptr; i = 0; goto ldv_26618; ldv_26617: tmp = copy_from_user((void *)(& reloc), (void const *)relocs + (unsigned long )i, 32U); ret = (int )tmp; if (ret != 0) { i915_gem_object_unpin(obj); return (ret); } else { } target_obj = drm_gem_object_lookup(obj->dev, file_priv, (int )reloc.target_handle); if ((unsigned long )target_obj == (unsigned long )((struct drm_gem_object *)0)) { i915_gem_object_unpin(obj); return (-9); } else { } target_obj_priv = (struct drm_i915_gem_object *)target_obj->driver_private; if ((unsigned long )target_obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { printk("<3>[drm:%s] *ERROR* No GTT space found for object %d\n", "i915_gem_object_pin_and_relocate", reloc.target_handle); drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (-22); } else { } if (reloc.offset > (unsigned long long )(obj->size - 4UL)) { printk("<3>[drm:%s] *ERROR* Relocation beyond object bounds: obj %p target %d offset %d size %d.\n", "i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset, (int )obj->size); drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (-22); } else { } if ((reloc.offset & 3ULL) != 0ULL) { printk("<3>[drm:%s] *ERROR* Relocation not 4-byte aligned: obj %p target %d offset %d.\n", "i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset); drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (-22); } else { } if ((int )reloc.write_domain & 1 || (int )reloc.read_domains & 1) { printk("<3>[drm:%s] *ERROR* reloc with read/write CPU domains: obj %p target %d offset %d read %08x write %08x", "i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset, reloc.read_domains, reloc.write_domain); return (-22); } else { } if ((reloc.write_domain != 0U && target_obj->pending_write_domain != 0U) && reloc.write_domain != target_obj->pending_write_domain) { printk("<3>[drm:%s] *ERROR* Write domain conflict: obj %p target %d offset %d new %08x old %08x\n", "i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset, reloc.write_domain, target_obj->pending_write_domain); drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (-22); } else { } target_obj->pending_read_domains = target_obj->pending_read_domains | reloc.read_domains; target_obj->pending_write_domain = target_obj->pending_write_domain | reloc.write_domain; if ((uint64_t )target_obj_priv->gtt_offset == reloc.presumed_offset) { drm_gem_object_unreference(target_obj); goto ldv_26616; } else { } ret = i915_gem_object_set_to_gtt_domain(obj, 1); if (ret != 0) { drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (-22); } else { } reloc_offset = obj_priv->gtt_offset + (uint32_t )reloc.offset; reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, (unsigned long )reloc_offset & 0xfffffffffffff000UL); reloc_entry = (uint32_t *)(reloc_page + ((unsigned long )reloc_offset & 4095UL)); reloc_val = target_obj_priv->gtt_offset + reloc.delta; writel(reloc_val, (void volatile *)reloc_entry); io_mapping_unmap_atomic(reloc_page); reloc.presumed_offset = (uint64_t )target_obj_priv->gtt_offset; tmp___0 = copy_to_user((void *)relocs + (unsigned long )i, (void const *)(& reloc), 32U); ret = (int )tmp___0; if (ret != 0) { drm_gem_object_unreference(target_obj); i915_gem_object_unpin(obj); return (ret); } else { } drm_gem_object_unreference(target_obj); ldv_26616: i = i + 1; ldv_26618: ; if ((uint32_t )i < entry->relocation_count) { goto ldv_26617; } else { } return (0); } } static int i915_dispatch_gem_execbuffer(struct drm_device *dev , struct drm_i915_gem_execbuffer *exec , uint64_t exec_offset ) { drm_i915_private_t *dev_priv ; struct drm_clip_rect *boxes ; int nbox ; int i ; int count ; uint32_t exec_start ; uint32_t exec_len ; unsigned int outring ; unsigned int ringmask ; unsigned int outcount ; char volatile *virt ; int ret ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; boxes = (struct drm_clip_rect *)exec->cliprects_ptr; nbox = (int )exec->num_cliprects; i = 0; exec_start = (unsigned int )exec_offset + exec->batch_start_offset; exec_len = exec->batch_len; if (((exec_start | exec_len) & 7U) != 0U) { printk("<3>[drm:%s] *ERROR* alignment\n", "i915_dispatch_gem_execbuffer"); return (-22); } else { } if (exec_start == 0U) { return (-22); } else { } count = nbox != 0 ? nbox : 1; i = 0; goto ldv_26639; ldv_26638: ; if (i < nbox) { tmp = i915_emit_box(dev, boxes, i, (int )exec->DR1, (int )exec->DR4); ret = tmp; if (ret != 0) { return (ret); } else { } } else { } if (dev->pci_device == 13687 || dev->pci_device == 9570) { if (dev_priv->ring.space <= 15) { i915_wait_ring(dev, 16, "i915_dispatch_gem_execbuffer"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; *((unsigned int volatile *)virt + (unsigned long )outring) = 402653185U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = exec_start | 1U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = (exec_start + exec_len) - 4U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = 0U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } else { if (dev_priv->ring.space <= 7) { i915_wait_ring(dev, 8, "i915_dispatch_gem_execbuffer"); } else { } outcount = 0U; outring = (unsigned int )dev_priv->ring.tail; ringmask = (unsigned int )dev_priv->ring.tail_mask; virt = (char volatile *)dev_priv->ring.virtual_start; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { *((unsigned int volatile *)virt + (unsigned long )outring) = 411042176U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = exec_start; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; } else { *((unsigned int volatile *)virt + (unsigned long )outring) = 411041920U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; *((unsigned int volatile *)virt + (unsigned long )outring) = exec_start | 1U; outcount = outcount + 1U; outring = outring + 4U; outring = outring & ringmask; } dev_priv->ring.tail = (int )outring; dev_priv->ring.space = (int )((unsigned int )dev_priv->ring.space - outcount * 4U); writel(outring, (void volatile *)dev_priv->regs + 8240U); } i = i + 1; ldv_26639: ; if (i < count) { goto ldv_26638; } else { } return (0); } } static int i915_gem_ring_throttle(struct drm_device *dev , struct drm_file *file_priv ) { struct drm_i915_file_private *i915_file_priv ; int ret ; uint32_t seqno ; { i915_file_priv = (struct drm_i915_file_private *)file_priv->driver_priv; ret = 0; mutex_lock_nested(& dev->struct_mutex, 0U); seqno = i915_file_priv->mm.last_gem_throttle_seqno; i915_file_priv->mm.last_gem_throttle_seqno = i915_file_priv->mm.last_gem_seqno; if (seqno != 0U) { ret = i915_wait_request(dev, seqno); } else { } mutex_unlock(& dev->struct_mutex); return (ret); } } int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; struct drm_i915_file_private *i915_file_priv ; struct drm_i915_gem_execbuffer *args ; struct drm_i915_gem_exec_object *exec_list ; struct drm_gem_object **object_list ; struct drm_gem_object *batch_obj ; int ret ; int i ; int pinned ; uint64_t exec_offset ; uint32_t seqno ; uint32_t flush_domains ; int pin_tries ; void *tmp ; void *tmp___0 ; unsigned long tmp___1 ; struct drm_gem_object *obj ; long tmp___2 ; struct drm_gem_object *obj___0 ; unsigned long tmp___3 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; i915_file_priv = (struct drm_i915_file_private *)file_priv->driver_priv; args = (struct drm_i915_gem_execbuffer *)data; exec_list = 0; object_list = 0; pinned = 0; if (args->buffer_count == 0U) { printk("<3>[drm:%s] *ERROR* execbuf with %d buffers\n", "i915_gem_execbuffer", args->buffer_count); return (-22); } else { } tmp = drm_calloc(32UL, (size_t )args->buffer_count, 2); exec_list = (struct drm_i915_gem_exec_object *)tmp; tmp___0 = drm_calloc(8UL, (size_t )args->buffer_count, 2); object_list = (struct drm_gem_object **)tmp___0; if ((unsigned long )exec_list == (unsigned long )((struct drm_i915_gem_exec_object *)0) || (unsigned long )object_list == (unsigned long )((struct drm_gem_object **)0)) { printk("<3>[drm:%s] *ERROR* Failed to allocate exec or object list for %d buffers\n", "i915_gem_execbuffer", args->buffer_count); ret = -12; goto pre_mutex_err; } else { } tmp___1 = copy_from_user((void *)exec_list, (void const *)args->buffers_ptr, args->buffer_count * 32U); ret = (int )tmp___1; if (ret != 0) { printk("<3>[drm:%s] *ERROR* copy %d exec entries failed %d\n", "i915_gem_execbuffer", args->buffer_count, ret); goto pre_mutex_err; } else { } mutex_lock_nested(& dev->struct_mutex, 0U); if (dev_priv->mm.wedged != 0) { printk("<3>[drm:%s] *ERROR* Execbuf while wedged\n", "i915_gem_execbuffer"); mutex_unlock(& dev->struct_mutex); return (-5); } else { } if (dev_priv->mm.suspended != 0) { printk("<3>[drm:%s] *ERROR* Execbuf while VT-switched.\n", "i915_gem_execbuffer"); mutex_unlock(& dev->struct_mutex); return (-16); } else { } i = 0; goto ldv_26671; ldv_26670: *(object_list + (unsigned long )i) = drm_gem_object_lookup(dev, file_priv, (int )(exec_list + (unsigned long )i)->handle); if ((unsigned long )*(object_list + (unsigned long )i) == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Invalid object handle %d at index %d\n", "i915_gem_execbuffer", (exec_list + (unsigned long )i)->handle, i); ret = -9; goto err; } else { } i = i + 1; ldv_26671: ; if ((uint32_t )i < args->buffer_count) { goto ldv_26670; } else { } pin_tries = 0; ldv_26680: ret = 0; i = 0; goto ldv_26675; ldv_26674: (*(object_list + (unsigned long )i))->pending_read_domains = 0U; (*(object_list + (unsigned long )i))->pending_write_domain = 0U; ret = i915_gem_object_pin_and_relocate(*(object_list + (unsigned long )i), file_priv, exec_list + (unsigned long )i); if (ret != 0) { goto ldv_26673; } else { } pinned = i + 1; i = i + 1; ldv_26675: ; if ((uint32_t )i < args->buffer_count) { goto ldv_26674; } else { } ldv_26673: ; if (ret == 0) { goto ldv_26676; } else { } if (ret != -12 || pin_tries > 0) { printk("<3>[drm:%s] *ERROR* Failed to pin buffers %d\n", "i915_gem_execbuffer", ret); goto err; } else { } i = 0; goto ldv_26678; ldv_26677: i915_gem_object_unpin(*(object_list + (unsigned long )i)); i = i + 1; ldv_26678: ; if (i < pinned) { goto ldv_26677; } else { } pinned = 0; ret = i915_gem_evict_everything(dev); if (ret != 0) { goto err; } else { } pin_tries = pin_tries + 1; goto ldv_26680; ldv_26676: batch_obj = *(object_list + (unsigned long )(args->buffer_count - 1U)); batch_obj->pending_read_domains = 8U; batch_obj->pending_write_domain = 0U; dev->invalidate_domains = 0U; dev->flush_domains = 0U; i = 0; goto ldv_26683; ldv_26682: obj = *(object_list + (unsigned long )i); i915_gem_object_set_to_gpu_domain(obj, obj->pending_read_domains, obj->pending_write_domain); i = i + 1; ldv_26683: ; if ((uint32_t )i < args->buffer_count) { goto ldv_26682; } else { } if ((dev->invalidate_domains | dev->flush_domains) != 0U) { i915_gem_flush(dev, dev->invalidate_domains, dev->flush_domains); if (dev->flush_domains != 0U) { i915_add_request(dev, dev->flush_domains); } else { } } else { } exec_offset = (exec_list + (unsigned long )(args->buffer_count - 1U))->offset; ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset); if (ret != 0) { printk("<3>[drm:%s] *ERROR* dispatch failed %d\n", "i915_gem_execbuffer", ret); goto err; } else { } flush_domains = i915_retire_commands(dev); seqno = i915_add_request(dev, flush_domains); tmp___2 = ldv__builtin_expect(seqno == 0U, 0L); if (tmp___2 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2656), "i" (24UL)); ldv_26685: ; goto ldv_26685; } else { } i915_file_priv->mm.last_gem_seqno = seqno; i = 0; goto ldv_26688; ldv_26687: obj___0 = *(object_list + (unsigned long )i); i915_gem_object_move_to_active(obj___0, seqno); i = i + 1; ldv_26688: ; if ((uint32_t )i < args->buffer_count) { goto ldv_26687; } else { } tmp___3 = copy_to_user((void *)args->buffers_ptr, (void const *)exec_list, args->buffer_count * 32U); ret = (int )tmp___3; if (ret != 0) { printk("<3>[drm:%s] *ERROR* failed to copy %d exec entries back to user (%d)\n", "i915_gem_execbuffer", args->buffer_count, ret); } else { } err: ; if ((unsigned long )object_list != (unsigned long )((struct drm_gem_object **)0)) { i = 0; goto ldv_26691; ldv_26690: i915_gem_object_unpin(*(object_list + (unsigned long )i)); i = i + 1; ldv_26691: ; if (i < pinned) { goto ldv_26690; } else { } i = 0; goto ldv_26694; ldv_26693: drm_gem_object_unreference(*(object_list + (unsigned long )i)); i = i + 1; ldv_26694: ; if ((uint32_t )i < args->buffer_count) { goto ldv_26693; } else { } } else { } mutex_unlock(& dev->struct_mutex); pre_mutex_err: drm_free((void *)object_list, (unsigned long )args->buffer_count * 8UL, 2); drm_free((void *)exec_list, (unsigned long )args->buffer_count * 32UL, 2); return (ret); } } int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment ) { struct drm_device *dev ; struct drm_i915_gem_object *obj_priv ; int ret ; int tmp ; { dev = obj->dev; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0)) { ret = i915_gem_object_bind_to_gtt(obj, alignment); if (ret != 0) { printk("<3>[drm:%s] *ERROR* Failure to bind: %d", "i915_gem_object_pin", ret); return (ret); } else { } } else { } obj_priv->pin_count = obj_priv->pin_count + 1; if (obj_priv->pin_count == 1) { atomic_inc(& dev->pin_count); atomic_add((int )obj->size, & dev->pin_memory); if (obj_priv->active == 0 && (obj->write_domain & 4294967230U) == 0U) { tmp = list_empty((struct list_head const *)(& obj_priv->list)); if (tmp == 0) { list_del_init(& obj_priv->list); } else { } } else { } } else { } return (0); } } void i915_gem_object_unpin(struct drm_gem_object *obj ) { struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; long tmp ; long tmp___0 ; { dev = obj->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; obj_priv->pin_count = obj_priv->pin_count - 1; tmp = ldv__builtin_expect(obj_priv->pin_count < 0, 0L); if (tmp != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2743), "i" (24UL)); ldv_26710: ; goto ldv_26710; } else { } tmp___0 = ldv__builtin_expect((unsigned long )obj_priv->gtt_space == (unsigned long )((struct drm_mm_node *)0), 0L); if (tmp___0 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (2744), "i" (24UL)); ldv_26711: ; goto ldv_26711; } else { } if (obj_priv->pin_count == 0) { if (obj_priv->active == 0 && (obj->write_domain & 4294967230U) == 0U) { list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list); } else { } atomic_dec(& dev->pin_count); atomic_sub((int )obj->size, & dev->pin_memory); } else { } return; } } int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_pin *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; { args = (struct drm_i915_gem_pin *)data; mutex_lock_nested(& dev->struct_mutex, 0U); obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_pin_ioctl(): %d\n", "i915_gem_pin_ioctl", args->handle); mutex_unlock(& dev->struct_mutex); return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->pin_filp != (unsigned long )((struct drm_file *)0) && (unsigned long )obj_priv->pin_filp != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* Already pinned in i915_gem_pin_ioctl(): %d\n", "i915_gem_pin_ioctl", args->handle); mutex_unlock(& dev->struct_mutex); return (-22); } else { } obj_priv->user_pin_count = obj_priv->user_pin_count + (uint32_t )1; obj_priv->pin_filp = file_priv; if (obj_priv->user_pin_count == 1U) { ret = i915_gem_object_pin(obj, (uint32_t )args->alignment); if (ret != 0) { drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (ret); } else { } } else { } i915_gem_object_flush_cpu_write_domain(obj); args->offset = (uint64_t )obj_priv->gtt_offset; drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (0); } } int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_pin *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; { args = (struct drm_i915_gem_pin *)data; mutex_lock_nested(& dev->struct_mutex, 0U); obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_unpin_ioctl(): %d\n", "i915_gem_unpin_ioctl", args->handle); mutex_unlock(& dev->struct_mutex); return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; if ((unsigned long )obj_priv->pin_filp != (unsigned long )file_priv) { printk("<3>[drm:%s] *ERROR* Not pinned by caller in i915_gem_pin_ioctl(): %d\n", "i915_gem_unpin_ioctl", args->handle); drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (-22); } else { } obj_priv->user_pin_count = obj_priv->user_pin_count - (uint32_t )1; if (obj_priv->user_pin_count == 0U) { obj_priv->pin_filp = 0; i915_gem_object_unpin(obj); } else { } drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (0); } } int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_busy *args ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; { args = (struct drm_i915_gem_busy *)data; mutex_lock_nested(& dev->struct_mutex, 0U); obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_busy_ioctl(): %d\n", "i915_gem_busy_ioctl", args->handle); mutex_unlock(& dev->struct_mutex); return (-9); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; args->busy = (uint32_t )(obj_priv->active != 0 && obj_priv->last_rendering_seqno != 0U); drm_gem_object_unreference(obj); mutex_unlock(& dev->struct_mutex); return (0); } } int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { int tmp ; { tmp = i915_gem_ring_throttle(dev, file_priv); return (tmp); } } int i915_gem_init_object(struct drm_gem_object *obj ) { struct drm_i915_gem_object *obj_priv ; void *tmp ; { tmp = drm_calloc(1UL, 128UL, 2); obj_priv = (struct drm_i915_gem_object *)tmp; if ((unsigned long )obj_priv == (unsigned long )((struct drm_i915_gem_object *)0)) { return (-12); } else { } obj->write_domain = 1U; obj->read_domains = 1U; obj_priv->agp_type = 65536U; obj->driver_private = (void *)obj_priv; obj_priv->obj = obj; obj_priv->fence_reg = -1; INIT_LIST_HEAD(& obj_priv->list); return (0); } } void i915_gem_free_object(struct drm_gem_object *obj ) { struct drm_device *dev ; struct drm_gem_mm *mm ; struct drm_map_list *list ; struct drm_map *map ; struct drm_i915_gem_object *obj_priv ; { dev = obj->dev; mm = (struct drm_gem_mm *)dev->mm_private; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; goto ldv_26758; ldv_26757: i915_gem_object_unpin(obj); ldv_26758: ; if (obj_priv->pin_count > 0) { goto ldv_26757; } else { } i915_gem_object_unbind(obj); list = & obj->map_list; drm_ht_remove_item(& mm->offset_hash, & list->hash); if ((unsigned long )list->file_offset_node != (unsigned long )((struct drm_mm_node *)0)) { drm_mm_put_block(list->file_offset_node); list->file_offset_node = 0; } else { } map = list->map; if ((unsigned long )map != (unsigned long )((struct drm_map *)0)) { drm_free((void *)map, 40UL, 2); list->map = 0; } else { } drm_free((void *)obj_priv->page_cpu_valid, 1UL, 2); drm_free(obj->driver_private, 1UL, 2); return; } } static int i915_gem_evict_from_list(struct drm_device *dev , struct list_head *head ) { struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; struct list_head const *__mptr ; int tmp ; { goto ldv_26771; ldv_26770: __mptr = (struct list_head const *)head->next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; obj = obj_priv->obj; if (obj_priv->pin_count != 0) { printk("<3>[drm:%s] *ERROR* Pinned object in unbind list\n", "i915_gem_evict_from_list"); mutex_unlock(& dev->struct_mutex); return (-22); } else { } ret = i915_gem_object_unbind(obj); if (ret != 0) { printk("<3>[drm:%s] *ERROR* Error unbinding object in LeaveVT: %d\n", "i915_gem_evict_from_list", ret); mutex_unlock(& dev->struct_mutex); return (ret); } else { } ldv_26771: tmp = list_empty((struct list_head const *)head); if (tmp == 0) { goto ldv_26770; } else { } return (0); } } static int i915_gem_idle(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; uint32_t seqno ; uint32_t cur_seqno ; uint32_t last_seqno ; int stuck ; int ret ; int tmp ; int tmp___0 ; int __ret_warn_on ; int tmp___1 ; long tmp___2 ; int __ret_warn_on___0 ; int tmp___3 ; long tmp___4 ; int __ret_warn_on___1 ; int tmp___5 ; long tmp___6 ; struct drm_i915_gem_object *obj_priv ; struct list_head const *__mptr ; int tmp___7 ; struct drm_i915_gem_object *obj_priv___0 ; struct list_head const *__mptr___0 ; int tmp___8 ; int __ret_warn_on___2 ; int tmp___9 ; long tmp___10 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; mutex_lock_nested(& dev->struct_mutex, 0U); if (dev_priv->mm.suspended != 0 || (unsigned long )dev_priv->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { mutex_unlock(& dev->struct_mutex); return (0); } else { } dev_priv->mm.suspended = 1; mutex_unlock(& dev->struct_mutex); cancel_delayed_work_sync(& dev_priv->mm.retire_work); mutex_lock_nested(& dev->struct_mutex, 0U); i915_kernel_lost_context(dev); i915_gem_flush(dev, 4294967230U, 4294967230U); seqno = i915_add_request(dev, 4294967294U); if (seqno == 0U) { mutex_unlock(& dev->struct_mutex); return (-12); } else { } dev_priv->mm.waiting_gem_seqno = seqno; last_seqno = 0U; stuck = 0; ldv_26784: cur_seqno = i915_get_gem_seqno(dev); tmp = i915_seqno_passed(cur_seqno, seqno); if (tmp != 0) { goto ldv_26782; } else { } if (last_seqno == cur_seqno) { tmp___0 = stuck; stuck = stuck + 1; if (tmp___0 > 100) { printk("<3>[drm:%s] *ERROR* hardware wedged\n", "i915_gem_idle"); dev_priv->mm.wedged = 1; __wake_up(& dev_priv->irq_queue, 1U, 1, 0); goto ldv_26782; } else { } } else { } msleep(10U); last_seqno = cur_seqno; goto ldv_26784; ldv_26782: dev_priv->mm.waiting_gem_seqno = 0U; i915_gem_retire_requests(dev); if (dev_priv->mm.wedged == 0) { tmp___1 = list_empty((struct list_head const *)(& dev_priv->mm.active_list)); __ret_warn_on = tmp___1 == 0; tmp___2 = ldv__builtin_expect(__ret_warn_on != 0, 0L); if (tmp___2 != 0L) { warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 3042); } else { } ldv__builtin_expect(__ret_warn_on != 0, 0L); tmp___3 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); __ret_warn_on___0 = tmp___3 == 0; tmp___4 = ldv__builtin_expect(__ret_warn_on___0 != 0, 0L); if (tmp___4 != 0L) { warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 3043); } else { } ldv__builtin_expect(__ret_warn_on___0 != 0, 0L); tmp___5 = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); __ret_warn_on___1 = tmp___5 == 0; tmp___6 = ldv__builtin_expect(__ret_warn_on___1 != 0, 0L); if (tmp___6 != 0L) { warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 3047); } else { } ldv__builtin_expect(__ret_warn_on___1 != 0, 0L); } else { } goto ldv_26795; ldv_26794: __mptr = (struct list_head const *)dev_priv->mm.active_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; (obj_priv->obj)->write_domain = (obj_priv->obj)->write_domain & 65U; i915_gem_object_move_to_inactive(obj_priv->obj); ldv_26795: tmp___7 = list_empty((struct list_head const *)(& dev_priv->mm.active_list)); if (tmp___7 == 0) { goto ldv_26794; } else { } goto ldv_26801; ldv_26800: __mptr___0 = (struct list_head const *)dev_priv->mm.flushing_list.next; obj_priv___0 = (struct drm_i915_gem_object *)__mptr___0 + 0xfffffffffffffff0UL; (obj_priv___0->obj)->write_domain = (obj_priv___0->obj)->write_domain & 65U; i915_gem_object_move_to_inactive(obj_priv___0->obj); ldv_26801: tmp___8 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); if (tmp___8 == 0) { goto ldv_26800; } else { } ret = i915_gem_evict_from_list(dev, & dev_priv->mm.inactive_list); tmp___9 = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); __ret_warn_on___2 = tmp___9 == 0; tmp___10 = ldv__builtin_expect(__ret_warn_on___2 != 0, 0L); if (tmp___10 != 0L) { warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared", 3078); } else { } ldv__builtin_expect(__ret_warn_on___2 != 0, 0L); if (ret != 0) { mutex_unlock(& dev->struct_mutex); return (ret); } else { } i915_gem_cleanup_ringbuffer(dev); mutex_unlock(& dev->struct_mutex); return (0); } } static int i915_gem_init_hws(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; int ret ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706) && dev->pci_device != 10818) && (((dev->pci_device != 11778 && dev->pci_device != 11794) && dev->pci_device != 11810) && dev->pci_device != 10818)) { return (0); } else { } obj = drm_gem_object_alloc(dev, 4096UL); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Failed to allocate status page\n", "i915_gem_init_hws"); return (-12); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; obj_priv->agp_type = 65537U; ret = i915_gem_object_pin(obj, 4096U); if (ret != 0) { drm_gem_object_unreference(obj); return (ret); } else { } dev_priv->status_gfx_addr = obj_priv->gtt_offset; dev_priv->hw_status_page = kmap(*(obj_priv->page_list)); if ((unsigned long )dev_priv->hw_status_page == (unsigned long )((void *)0)) { printk("<3>[drm:%s] *ERROR* Failed to map status page.\n", "i915_gem_init_hws"); memset((void *)(& dev_priv->hws_map), 0, 40UL); drm_gem_object_unreference(obj); return (-22); } else { } dev_priv->hws_obj = obj; memset(dev_priv->hw_status_page, 0, 4096UL); writel(dev_priv->status_gfx_addr, (void volatile *)dev_priv->regs + 8320U); readl((void const volatile *)dev_priv->regs + 8320U); if (drm_debug != 0U) { printk("<7>[drm:%s] hws offset: 0x%08x\n", "i915_gem_init_hws", dev_priv->status_gfx_addr); } else { } return (0); } } int i915_gem_init_ringbuffer(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; drm_i915_ring_buffer_t *ring ; int ret ; u32 head ; unsigned int tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; unsigned int tmp___2 ; unsigned int tmp___3 ; unsigned int tmp___4 ; unsigned int tmp___5 ; unsigned int tmp___6 ; unsigned int tmp___7 ; unsigned int tmp___8 ; unsigned int tmp___9 ; unsigned int tmp___10 ; unsigned int tmp___11 ; unsigned int tmp___12 ; unsigned int tmp___13 ; unsigned int tmp___14 ; int tmp___15 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; ring = & dev_priv->ring; ret = i915_gem_init_hws(dev); if (ret != 0) { return (ret); } else { } obj = drm_gem_object_alloc(dev, 131072UL); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>[drm:%s] *ERROR* Failed to allocate ringbuffer\n", "i915_gem_init_ringbuffer"); return (-12); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; ret = i915_gem_object_pin(obj, 4096U); if (ret != 0) { drm_gem_object_unreference(obj); return (ret); } else { } ring->Size = obj->size; ring->tail_mask = (int )((unsigned int )obj->size - 1U); ring->map.offset = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset; ring->map.size = obj->size; ring->map.type = _DRM_FRAME_BUFFER; ring->map.flags = 0; ring->map.mtrr = 0; drm_core_ioremap_wc(& ring->map, dev); if ((unsigned long )ring->map.handle == (unsigned long )((void *)0)) { printk("<3>[drm:%s] *ERROR* Failed to map ringbuffer.\n", "i915_gem_init_ringbuffer"); memset((void *)(& dev_priv->ring), 0, 88UL); drm_gem_object_unreference(obj); return (-22); } else { } ring->ring_obj = obj; ring->virtual_start = (u8 *)ring->map.handle; writel(0U, (void volatile *)dev_priv->regs + 8252U); writel(0U, (void volatile *)dev_priv->regs + 8240U); writel(0U, (void volatile *)dev_priv->regs + 8244U); writel(obj_priv->gtt_offset, (void volatile *)dev_priv->regs + 8248U); tmp = readl((void const volatile *)dev_priv->regs + 8244U); head = tmp & 2097148U; if (head != 0U) { tmp___0 = readl((void const volatile *)dev_priv->regs + 8248U); tmp___1 = readl((void const volatile *)dev_priv->regs + 8240U); tmp___2 = readl((void const volatile *)dev_priv->regs + 8244U); tmp___3 = readl((void const volatile *)dev_priv->regs + 8252U); printk("<3>[drm:%s] *ERROR* Ring head not reset to zero ctl %08x head %08x tail %08x start %08x\n", "i915_gem_init_ringbuffer", tmp___3, tmp___2, tmp___1, tmp___0); writel(0U, (void volatile *)dev_priv->regs + 8244U); tmp___4 = readl((void const volatile *)dev_priv->regs + 8248U); tmp___5 = readl((void const volatile *)dev_priv->regs + 8240U); tmp___6 = readl((void const volatile *)dev_priv->regs + 8244U); tmp___7 = readl((void const volatile *)dev_priv->regs + 8252U); printk("<3>[drm:%s] *ERROR* Ring head forced to zero ctl %08x head %08x tail %08x start %08x\n", "i915_gem_init_ringbuffer", tmp___7, tmp___6, tmp___5, tmp___4); } else { } writel((((unsigned int )obj->size - 4096U) & 2093056U) | 1U, (void volatile *)dev_priv->regs + 8252U); tmp___8 = readl((void const volatile *)dev_priv->regs + 8244U); head = tmp___8 & 2097148U; if (head != 0U) { tmp___9 = readl((void const volatile *)dev_priv->regs + 8248U); tmp___10 = readl((void const volatile *)dev_priv->regs + 8240U); tmp___11 = readl((void const volatile *)dev_priv->regs + 8244U); tmp___12 = readl((void const volatile *)dev_priv->regs + 8252U); printk("<3>[drm:%s] *ERROR* Ring initialization failed ctl %08x head %08x tail %08x start %08x\n", "i915_gem_init_ringbuffer", tmp___12, tmp___11, tmp___10, tmp___9); return (-5); } else { } tmp___15 = drm_core_check_feature(dev, 8192); if (tmp___15 == 0) { i915_kernel_lost_context(dev); } else { tmp___13 = readl((void const volatile *)dev_priv->regs + 8244U); ring->head = (int )tmp___13 & 2097148; tmp___14 = readl((void const volatile *)dev_priv->regs + 8240U); ring->tail = (int )tmp___14 & 2097144; ring->space = ring->head + (-8 - ring->tail); if (ring->space < 0) { ring->space = (int )((unsigned int )ring->space + (unsigned int )ring->Size); } else { } } return (0); } } void i915_gem_cleanup_ringbuffer(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; { dev_priv = (drm_i915_private_t *)dev->dev_private; if ((unsigned long )dev_priv->ring.ring_obj == (unsigned long )((struct drm_gem_object *)0)) { return; } else { } drm_core_ioremapfree(& dev_priv->ring.map, dev); i915_gem_object_unpin(dev_priv->ring.ring_obj); drm_gem_object_unreference(dev_priv->ring.ring_obj); dev_priv->ring.ring_obj = 0; memset((void *)(& dev_priv->ring), 0, 88UL); if ((unsigned long )dev_priv->hws_obj != (unsigned long )((struct drm_gem_object *)0)) { obj = dev_priv->hws_obj; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; i915_gem_object_unpin(obj); drm_gem_object_unreference(obj); dev_priv->hws_obj = 0; memset((void *)(& dev_priv->hws_map), 0, 40UL); dev_priv->hw_status_page = 0; writel(536866816U, (void volatile *)dev_priv->regs + 8320U); } else { } return; } } int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; int ret ; int tmp ; int tmp___0 ; long tmp___1 ; int tmp___2 ; long tmp___3 ; int tmp___4 ; long tmp___5 ; int tmp___6 ; long tmp___7 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; tmp = drm_core_check_feature(dev, 8192); if (tmp != 0) { return (0); } else { } if (dev_priv->mm.wedged != 0) { printk("<3>[drm:%s] *ERROR* Reenabling wedged hardware, good luck\n", "i915_gem_entervt_ioctl"); dev_priv->mm.wedged = 0; } else { } ret = i915_gem_init_ringbuffer(dev); if (ret != 0) { return (ret); } else { } dev_priv->mm.gtt_mapping = io_mapping_create_wc((dev->agp)->base, (dev->agp)->agp_info.aper_size * 1048576UL); mutex_lock_nested(& dev->struct_mutex, 0U); tmp___0 = list_empty((struct list_head const *)(& dev_priv->mm.active_list)); tmp___1 = ldv__builtin_expect(tmp___0 == 0, 0L); if (tmp___1 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (3297), "i" (24UL)); ldv_26837: ; goto ldv_26837; } else { } tmp___2 = list_empty((struct list_head const *)(& dev_priv->mm.flushing_list)); tmp___3 = ldv__builtin_expect(tmp___2 == 0, 0L); if (tmp___3 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (3298), "i" (24UL)); ldv_26838: ; goto ldv_26838; } else { } tmp___4 = list_empty((struct list_head const *)(& dev_priv->mm.inactive_list)); tmp___5 = ldv__builtin_expect(tmp___4 == 0, 0L); if (tmp___5 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (3299), "i" (24UL)); ldv_26839: ; goto ldv_26839; } else { } tmp___6 = list_empty((struct list_head const *)(& dev_priv->mm.request_list)); tmp___7 = ldv__builtin_expect(tmp___6 == 0, 0L); if (tmp___7 != 0L) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/i915_gem.c.prepared"), "i" (3300), "i" (24UL)); ldv_26840: ; goto ldv_26840; } else { } dev_priv->mm.suspended = 0; mutex_unlock(& dev->struct_mutex); drm_irq_install(dev); return (0); } } int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) { drm_i915_private_t *dev_priv ; int ret ; int tmp ; { dev_priv = (drm_i915_private_t *)dev->dev_private; tmp = drm_core_check_feature(dev, 8192); if (tmp != 0) { return (0); } else { } ret = i915_gem_idle(dev); drm_irq_uninstall(dev); io_mapping_free(dev_priv->mm.gtt_mapping); return (ret); } } void i915_gem_lastclose(struct drm_device *dev ) { int ret ; { ret = i915_gem_idle(dev); if (ret != 0) { printk("<3>[drm:%s] *ERROR* failed to idle hardware: %d\n", "i915_gem_lastclose", ret); } else { } return; } } void i915_gem_load(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; struct lock_class_key __key ; atomic_long_t __constr_expr_0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; INIT_LIST_HEAD(& dev_priv->mm.active_list); INIT_LIST_HEAD(& dev_priv->mm.flushing_list); INIT_LIST_HEAD(& dev_priv->mm.inactive_list); INIT_LIST_HEAD(& dev_priv->mm.request_list); __constr_expr_0.counter = 0L; dev_priv->mm.retire_work.work.data = __constr_expr_0; lockdep_init_map(& dev_priv->mm.retire_work.work.lockdep_map, "&(&dev_priv->mm.retire_work)->work", & __key, 0); INIT_LIST_HEAD(& dev_priv->mm.retire_work.work.entry); dev_priv->mm.retire_work.work.func = & i915_gem_retire_work_handler; init_timer(& dev_priv->mm.retire_work.timer); dev_priv->mm.next_gem_seqno = 1U; dev_priv->fence_reg_start = 3; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev_priv->num_fence_regs = 16; } else { dev_priv->num_fence_regs = 8; } i915_gem_detect_bit_6_swizzle(dev); return; } } void ldv___ldv_spin_lock_201(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_202(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_203(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_204(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_205(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_206(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_207(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_208(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_209(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_210(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_211(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_212(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_213(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_214(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_215(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_216(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_217(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_218(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_237(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_240(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_241(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_244(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_246(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_248(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_250(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_252(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_238(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_242(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_243(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_245(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_247(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_249(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_251(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_253(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_254(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_239(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_237(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_238(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_239(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_240(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_241(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_242(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_243(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_244(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_245(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_246(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_247(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_248(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_249(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_250(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_251(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_252(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_253(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_254(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void __builtin_prefetch(void const * , ...) ; extern int sprintf(char * , char const * , ...) ; void ldv___ldv_spin_lock_273(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_276(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_277(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_280(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_282(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_284(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_286(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_288(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_274(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_278(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_279(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_281(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_283(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_285(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_287(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_289(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_290(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_275(spinlock_t *ldv_func_arg1 ) ; extern struct proc_dir_entry *create_proc_entry(char const * , mode_t , struct proc_dir_entry * ) ; extern void remove_proc_entry(char const * , struct proc_dir_entry * ) ; static int i915_gem_active_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int len ; int tmp ; struct list_head const *__mptr ; struct drm_gem_object *obj ; int tmp___0 ; int tmp___1 ; struct list_head const *__mptr___0 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; tmp = sprintf(buf + (unsigned long )len, "Active:\n"); len = tmp + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } __mptr = (struct list_head const *)dev_priv->mm.active_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; goto ldv_25665; ldv_25664: obj = obj_priv->obj; if (obj->name != 0) { tmp___0 = sprintf(buf + (unsigned long )len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } else { tmp___1 = sprintf(buf + (unsigned long )len, " %p: %08x %08x %d\n", obj, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___1 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } __mptr___0 = (struct list_head const *)obj_priv->list.next; obj_priv = (struct drm_i915_gem_object *)__mptr___0 + 0xfffffffffffffff0UL; ldv_25665: __builtin_prefetch((void const *)obj_priv->list.next); if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.active_list)) { goto ldv_25664; } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_gem_flushing_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int len ; int tmp ; struct list_head const *__mptr ; struct drm_gem_object *obj ; int tmp___0 ; int tmp___1 ; struct list_head const *__mptr___0 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; tmp = sprintf(buf + (unsigned long )len, "Flushing:\n"); len = tmp + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } __mptr = (struct list_head const *)dev_priv->mm.flushing_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; goto ldv_25686; ldv_25685: obj = obj_priv->obj; if (obj->name != 0) { tmp___0 = sprintf(buf + (unsigned long )len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } else { tmp___1 = sprintf(buf + (unsigned long )len, " %p: %08x %08x %d\n", obj, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___1 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } __mptr___0 = (struct list_head const *)obj_priv->list.next; obj_priv = (struct drm_i915_gem_object *)__mptr___0 + 0xfffffffffffffff0UL; ldv_25686: __builtin_prefetch((void const *)obj_priv->list.next); if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.flushing_list)) { goto ldv_25685; } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_gem_inactive_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_object *obj_priv ; int len ; int tmp ; struct list_head const *__mptr ; struct drm_gem_object *obj ; int tmp___0 ; int tmp___1 ; struct list_head const *__mptr___0 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; tmp = sprintf(buf + (unsigned long )len, "Inactive:\n"); len = tmp + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } __mptr = (struct list_head const *)dev_priv->mm.inactive_list.next; obj_priv = (struct drm_i915_gem_object *)__mptr + 0xfffffffffffffff0UL; goto ldv_25707; ldv_25706: obj = obj_priv->obj; if (obj->name != 0) { tmp___0 = sprintf(buf + (unsigned long )len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } else { tmp___1 = sprintf(buf + (unsigned long )len, " %p: %08x %08x %d\n", obj, obj->read_domains, obj->write_domain, obj_priv->last_rendering_seqno); len = tmp___1 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } __mptr___0 = (struct list_head const *)obj_priv->list.next; obj_priv = (struct drm_i915_gem_object *)__mptr___0 + 0xfffffffffffffff0UL; ldv_25707: __builtin_prefetch((void const *)obj_priv->list.next); if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.inactive_list)) { goto ldv_25706; } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_gem_request_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; struct drm_i915_gem_request *gem_request ; int len ; int tmp ; struct list_head const *__mptr ; int tmp___0 ; struct list_head const *__mptr___0 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; tmp = sprintf(buf + (unsigned long )len, "Request:\n"); len = tmp + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } __mptr = (struct list_head const *)dev_priv->mm.request_list.next; gem_request = (struct drm_i915_gem_request *)__mptr + 0xfffffffffffffff0UL; goto ldv_25727; ldv_25726: tmp___0 = sprintf(buf + (unsigned long )len, " %d @ %d\n", gem_request->seqno, (int )((unsigned int )jiffies - (unsigned int )gem_request->emitted_jiffies)); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } __mptr___0 = (struct list_head const *)gem_request->list.next; gem_request = (struct drm_i915_gem_request *)__mptr___0 + 0xfffffffffffffff0UL; ldv_25727: __builtin_prefetch((void const *)gem_request->list.next); if ((unsigned long )(& gem_request->list) != (unsigned long )(& dev_priv->mm.request_list)) { goto ldv_25726; } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_gem_seqno_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; int len ; uint32_t tmp ; int tmp___0 ; int tmp___1 ; int tmp___2 ; int tmp___3 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; if ((unsigned long )dev_priv->hw_status_page != (unsigned long )((void *)0)) { tmp = i915_get_gem_seqno(dev); tmp___0 = sprintf(buf + (unsigned long )len, "Current sequence: %d\n", tmp); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } else { tmp___1 = sprintf(buf + (unsigned long )len, "Current sequence: hws uninitialized\n"); len = tmp___1 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } tmp___2 = sprintf(buf + (unsigned long )len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno); len = tmp___2 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___3 = sprintf(buf + (unsigned long )len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno); len = tmp___3 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_interrupt_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; int len ; unsigned int tmp ; int tmp___0 ; unsigned int tmp___1 ; int tmp___2 ; unsigned int tmp___3 ; int tmp___4 ; unsigned int tmp___5 ; int tmp___6 ; unsigned int tmp___7 ; int tmp___8 ; int tmp___9 ; uint32_t tmp___10 ; int tmp___11 ; int tmp___12 ; int tmp___13 ; int tmp___14 ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; tmp = readl((void const volatile *)dev_priv->regs + 8352U); tmp___0 = sprintf(buf + (unsigned long )len, "Interrupt enable: %08x\n", tmp); len = tmp___0 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___1 = readl((void const volatile *)dev_priv->regs + 8356U); tmp___2 = sprintf(buf + (unsigned long )len, "Interrupt identity: %08x\n", tmp___1); len = tmp___2 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___3 = readl((void const volatile *)dev_priv->regs + 8360U); tmp___4 = sprintf(buf + (unsigned long )len, "Interrupt mask: %08x\n", tmp___3); len = tmp___4 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___5 = readl((void const volatile *)dev_priv->regs + 458788U); tmp___6 = sprintf(buf + (unsigned long )len, "Pipe A stat: %08x\n", tmp___5); len = tmp___6 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___7 = readl((void const volatile *)dev_priv->regs + 462884U); tmp___8 = sprintf(buf + (unsigned long )len, "Pipe B stat: %08x\n", tmp___7); len = tmp___8 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___9 = sprintf(buf + (unsigned long )len, "Interrupts received: %d\n", dev_priv->irq_received.counter); len = tmp___9 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } if ((unsigned long )dev_priv->hw_status_page != (unsigned long )((void *)0)) { tmp___10 = i915_get_gem_seqno(dev); tmp___11 = sprintf(buf + (unsigned long )len, "Current sequence: %d\n", tmp___10); len = tmp___11 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } else { tmp___12 = sprintf(buf + (unsigned long )len, "Current sequence: hws uninitialized\n"); len = tmp___12 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } } tmp___13 = sprintf(buf + (unsigned long )len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno); len = tmp___13 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } tmp___14 = sprintf(buf + (unsigned long )len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno); len = tmp___14 + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static int i915_hws_info(char *buf , char **start , off_t offset , int request , int *eof , void *data ) { struct drm_minor *minor ; struct drm_device *dev ; drm_i915_private_t *dev_priv ; int len ; int i ; u32 volatile *hws ; int tmp ; { minor = (struct drm_minor *)data; dev = minor->dev; dev_priv = (drm_i915_private_t *)dev->dev_private; len = 0; if ((unsigned long )offset > 4016UL) { *eof = 1; return (0); } else { } hws = (u32 volatile *)dev_priv->hw_status_page; if ((unsigned long )hws == (unsigned long )((u32 volatile *)0)) { *eof = 1; return (0); } else { } *start = buf + (unsigned long )offset; *eof = 0; i = 0; goto ldv_25768; ldv_25767: tmp = sprintf(buf + (unsigned long )len, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4, *(hws + (unsigned long )i), *(hws + ((unsigned long )i + 1UL)), *(hws + ((unsigned long )i + 2UL)), *(hws + ((unsigned long )i + 3UL))); len = tmp + len; if ((unsigned int )len > 4016U) { *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } else { } i = i + 4; ldv_25768: ; if ((unsigned int )i <= 255U) { goto ldv_25767; } else { } if ((off_t )len > (off_t )request + offset) { return (request); } else { } *eof = 1; return ((int )((unsigned int )len - (unsigned int )offset)); } } static struct drm_proc_list i915_gem_proc_list[7U] = { {"i915_gem_active", & i915_gem_active_info}, {"i915_gem_flushing", & i915_gem_flushing_info}, {"i915_gem_inactive", & i915_gem_inactive_info}, {"i915_gem_request", & i915_gem_request_info}, {"i915_gem_seqno", & i915_gem_seqno_info}, {"i915_gem_interrupt", & i915_interrupt_info}, {"i915_gem_hws", & i915_hws_info}}; int i915_gem_proc_init(struct drm_minor *minor ) { struct proc_dir_entry *ent ; int i ; int j ; { i = 0; goto ldv_25791; ldv_25790: ent = create_proc_entry(i915_gem_proc_list[i].name, 33060U, minor->dev_root); if ((unsigned long )ent == (unsigned long )((struct proc_dir_entry *)0)) { printk("<3>[drm:%s] *ERROR* Cannot create /proc/dri/.../%s\n", "i915_gem_proc_init", i915_gem_proc_list[i].name); j = 0; goto ldv_25788; ldv_25787: remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root); j = j + 1; ldv_25788: ; if (j < i) { goto ldv_25787; } else { } return (-1); } else { } ent->read_proc = i915_gem_proc_list[i].f; ent->data = (void *)minor; i = i + 1; ldv_25791: ; if ((unsigned int )i <= 6U) { goto ldv_25790; } else { } return (0); } } void i915_gem_proc_cleanup(struct drm_minor *minor ) { int i ; { if ((unsigned long )minor->dev_root == (unsigned long )((struct proc_dir_entry *)0)) { return; } else { } i = 0; goto ldv_25798; ldv_25797: remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root); i = i + 1; ldv_25798: ; if ((unsigned int )i <= 6U) { goto ldv_25797; } else { } return; } } void ldv___ldv_spin_lock_273(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_274(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_275(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_276(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_277(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_278(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_279(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_280(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_281(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_282(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_283(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_284(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_285(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_286(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_287(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_288(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_289(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_290(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_309(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_312(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_313(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_316(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_318(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_320(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_322(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_324(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_310(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_314(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_315(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_317(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_319(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_321(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_323(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_325(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_326(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_311(spinlock_t *ldv_func_arg1 ) ; __inline static unsigned short readw(void const volatile *addr ) { unsigned short ret ; { __asm__ volatile ("movw %1,%0": "=r" (ret): "m" (*((unsigned short volatile *)addr)): "memory"); return (ret); } } void i915_gem_detect_bit_6_swizzle(struct drm_device *dev ) { drm_i915_private_t *dev_priv ; uint32_t swizzle_x ; uint32_t swizzle_y ; uint32_t dcc ; unsigned short tmp ; unsigned short tmp___0 ; { dev_priv = (drm_i915_private_t *)dev->dev_private; swizzle_x = 5U; swizzle_y = 5U; if ((((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706)) { swizzle_x = 0U; swizzle_y = 0U; } else if ((((((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706)) || dev->pci_device == 10754) || dev->pci_device == 10818) { dcc = readl((void const volatile *)dev_priv->regs + 66048U); switch (dcc & 3U) { case 0U: ; case 1U: swizzle_x = 0U; swizzle_y = 0U; goto ldv_25655; case 2U: ; if (((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || (dcc & 1024U) != 0U) { swizzle_x = 2U; swizzle_y = 1U; } else if ((dev->pci_device == 10754 || dev->pci_device == 10818) && (dcc & 512U) == 0U) { swizzle_x = 4U; swizzle_y = 3U; } else { swizzle_x = 5U; swizzle_y = 5U; } goto ldv_25655; } ldv_25655: ; if (dcc == 4294967295U) { printk("<3>[drm:%s] *ERROR* Couldn\'t read from MCHBAR. Disabling tiling.\n", "i915_gem_detect_bit_6_swizzle"); swizzle_x = 5U; swizzle_y = 5U; } else { } } else { tmp = readw((void const volatile *)dev_priv->regs + 66054U); tmp___0 = readw((void const volatile *)dev_priv->regs + 67078U); if ((int )tmp != (int )tmp___0) { swizzle_x = 0U; swizzle_y = 0U; } else { swizzle_x = 2U; swizzle_y = 1U; } } dev_priv->mm.bit_6_swizzle_x = swizzle_x; dev_priv->mm.bit_6_swizzle_y = swizzle_y; return; } } int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_set_tiling *args ; drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; { args = (struct drm_i915_gem_set_tiling *)data; dev_priv = (drm_i915_private_t *)dev->dev_private; obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-22); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; mutex_lock_nested(& dev->struct_mutex, 0U); if (args->tiling_mode == 0U) { obj_priv->tiling_mode = 0U; args->swizzle_mode = 0U; } else { if (args->tiling_mode == 1U) { args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x; } else { args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y; } if (args->swizzle_mode == 5U) { args->tiling_mode = 0U; args->swizzle_mode = 0U; } else { } } obj_priv->tiling_mode = args->tiling_mode; obj_priv->stride = args->stride; mutex_unlock(& dev->struct_mutex); drm_gem_object_unreference(obj); return (0); } } int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) { struct drm_i915_gem_get_tiling *args ; drm_i915_private_t *dev_priv ; struct drm_gem_object *obj ; struct drm_i915_gem_object *obj_priv ; { args = (struct drm_i915_gem_get_tiling *)data; dev_priv = (drm_i915_private_t *)dev->dev_private; obj = drm_gem_object_lookup(dev, file_priv, (int )args->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (-22); } else { } obj_priv = (struct drm_i915_gem_object *)obj->driver_private; mutex_lock_nested(& dev->struct_mutex, 0U); args->tiling_mode = obj_priv->tiling_mode; switch (obj_priv->tiling_mode) { case (uint32_t )1: args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x; goto ldv_25677; case (uint32_t )2: args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y; goto ldv_25677; case (uint32_t )0: args->swizzle_mode = 0U; goto ldv_25677; default: printk("<3>[drm:%s] *ERROR* unknown tiling mode\n", "i915_gem_get_tiling"); } ldv_25677: mutex_unlock(& dev->struct_mutex); drm_gem_object_unreference(obj); return (0); } } void ldv___ldv_spin_lock_309(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_310(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_311(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_312(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_313(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_314(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_315(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_316(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_317(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_318(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_319(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_320(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_321(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_322(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_323(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_324(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_325(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_326(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } __inline static int ffs(int x ) { int r ; { __asm__ ("bsfl %1,%0\n\tcmovzl %2,%0": "=r" (r): "rm" (x), "r" (-1)); return (r + 1); } } void ldv___ldv_spin_lock_345(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_348(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_350(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_353(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_354(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_357(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_359(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_361(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_346(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_349(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_351(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_352(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_355(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_356(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_358(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_360(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_362(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_347(spinlock_t *ldv_func_arg1 ) ; __inline static void *kzalloc(size_t size , gfp_t flags ) { void *tmp ; { tmp = kmalloc(size, flags | 32768U); return (tmp); } } extern void drm_crtc_init(struct drm_device * , struct drm_crtc * , struct drm_crtc_funcs const * ) ; extern void drm_crtc_cleanup(struct drm_crtc * ) ; extern void drm_mode_debug_printmodeline(struct drm_display_mode * ) ; extern void drm_mode_config_init(struct drm_device * ) ; extern void drm_mode_config_cleanup(struct drm_device * ) ; extern void drm_mode_set_name(struct drm_display_mode * ) ; extern void drm_mode_set_crtcinfo(struct drm_display_mode * , int ) ; extern int drm_framebuffer_init(struct drm_device * , struct drm_framebuffer * , struct drm_framebuffer_funcs const * ) ; extern void drm_framebuffer_cleanup(struct drm_framebuffer * ) ; extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc * , int ) ; extern void drm_vblank_pre_modeset(struct drm_device * , int ) ; extern void drm_vblank_post_modeset(struct drm_device * , int ) ; extern void drm_helper_disable_unused_functions(struct drm_device * ) ; extern int drm_crtc_helper_set_config(struct drm_mode_set * ) ; extern bool drm_crtc_helper_set_mode(struct drm_crtc * , struct drm_display_mode * , int , int , struct drm_framebuffer * ) ; extern bool drm_helper_crtc_in_use(struct drm_crtc * ) ; extern int drm_helper_mode_fill_fb_struct(struct drm_framebuffer * , struct drm_mode_fb_cmd * ) ; __inline static void drm_crtc_helper_add(struct drm_crtc *crtc , struct drm_crtc_helper_funcs const *funcs ) { { crtc->helper_private = (void *)funcs; return; } } void intel_crt_init(struct drm_device *dev ) ; void intel_sdvo_init(struct drm_device *dev , int output_device ) ; void intel_dvo_init(struct drm_device *dev ) ; void intel_tv_init(struct drm_device *dev ) ; void intel_lvds_init(struct drm_device *dev ) ; void intel_crtc_load_lut(struct drm_crtc *crtc ) ; void intel_encoder_prepare(struct drm_encoder *encoder ) ; void intel_encoder_commit(struct drm_encoder *encoder ) ; struct drm_encoder *intel_best_encoder(struct drm_connector *connector ) ; struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev , struct drm_crtc *crtc ) ; void intel_wait_for_vblank(struct drm_device *dev ) ; struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev , int pipe ) ; struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output , struct drm_display_mode *mode , int *dpms_mode ) ; void intel_release_load_detect_pipe(struct intel_output *intel_output , int dpms_mode ) ; int intelfb_probe(struct drm_device *dev ) ; int intelfb_remove(struct drm_device *dev , struct drm_framebuffer *fb ) ; void intel_crtc_fb_gamma_set(struct drm_crtc *crtc , u16 red , u16 green , u16 blue , int regno ) ; int intel_framebuffer_create(struct drm_device *dev , struct drm_mode_fb_cmd *mode_cmd , struct drm_framebuffer **fb , struct drm_gem_object *obj ) ; bool intel_pipe_has_type(struct drm_crtc *crtc , int type ) ; static intel_limit_t const intel_limits[4U] = { {{25000, 350000}, {930000, 1400000}, {3, 16}, {96, 140}, {18, 26}, {6, 16}, {4, 128}, {2, 33}, {165000, 4, 2}}, {{25000, 350000}, {930000, 1400000}, {3, 16}, {96, 140}, {18, 26}, {6, 16}, {4, 128}, {1, 6}, {165000, 14, 14}}, {{20000, 400000}, {1400000, 2800000}, {3, 8}, {70, 120}, {10, 20}, {5, 9}, {5, 80}, {1, 8}, {200000, 10, 5}}, {{20000, 400000}, {1400000, 2800000}, {3, 8}, {70, 120}, {10, 20}, {5, 9}, {7, 98}, {1, 8}, {112000, 14, 7}}}; static intel_limit_t const *intel_limit(struct drm_crtc *crtc ) { struct drm_device *dev ; intel_limit_t const *limit ; bool tmp ; bool tmp___0 ; { dev = crtc->dev; if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { tmp = intel_pipe_has_type(crtc, 4); if ((int )tmp) { limit = (intel_limit_t const *)(& intel_limits) + 3UL; } else { limit = (intel_limit_t const *)(& intel_limits) + 2UL; } } else { tmp___0 = intel_pipe_has_type(crtc, 4); if ((int )tmp___0) { limit = (intel_limit_t const *)(& intel_limits) + 1UL; } else { limit = (intel_limit_t const *)(& intel_limits); } } return (limit); } } static void i8xx_clock(int refclk , intel_clock_t *clock ) { { clock->m = (clock->m1 * 5 + 10) + (clock->m2 + 2); clock->p = clock->p1 * clock->p2; clock->vco = (clock->m * refclk) / (clock->n + 2); clock->dot = clock->vco / clock->p; return; } } static void i9xx_clock(int refclk , intel_clock_t *clock ) { { clock->m = (clock->m1 * 5 + 10) + (clock->m2 + 2); clock->p = clock->p1 * clock->p2; clock->vco = (clock->m * refclk) / (clock->n + 2); clock->dot = clock->vco / clock->p; return; } } static void intel_clock(struct drm_device *dev , int refclk , intel_clock_t *clock ) { { if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { i9xx_clock(refclk, clock); } else { i8xx_clock(refclk, clock); } return; } } bool intel_pipe_has_type(struct drm_crtc *crtc , int type ) { struct drm_device *dev ; struct drm_mode_config *mode_config ; struct drm_connector *l_entry ; struct list_head const *__mptr ; struct intel_output *intel_output ; struct drm_connector const *__mptr___0 ; struct list_head const *__mptr___1 ; { dev = crtc->dev; mode_config = & dev->mode_config; __mptr = (struct list_head const *)mode_config->connector_list.next; l_entry = (struct drm_connector *)__mptr + 0xfffffffffffffc18UL; goto ldv_25926; ldv_25925: ; if ((unsigned long )l_entry->encoder != (unsigned long )((struct drm_encoder *)0) && (unsigned long )(l_entry->encoder)->crtc == (unsigned long )crtc) { __mptr___0 = (struct drm_connector const *)l_entry; intel_output = (struct intel_output *)__mptr___0; if (intel_output->type == type) { return (1); } else { } } else { } __mptr___1 = (struct list_head const *)l_entry->head.next; l_entry = (struct drm_connector *)__mptr___1 + 0xfffffffffffffc18UL; ldv_25926: __builtin_prefetch((void const *)l_entry->head.next); if ((unsigned long )(& l_entry->head) != (unsigned long )(& mode_config->connector_list)) { goto ldv_25925; } else { } return (0); } } static bool intel_PLL_is_valid(struct drm_crtc *crtc , intel_clock_t *clock ) { intel_limit_t const *limit ; intel_limit_t const *tmp ; { tmp = intel_limit(crtc); limit = tmp; if (clock->p1 < (int )limit->p1.min || (int )limit->p1.max < clock->p1) { return (0); } else { } if (clock->p < (int )limit->p.min || (int )limit->p.max < clock->p) { return (0); } else { } if (clock->m2 < (int )limit->m2.min || (int )limit->m2.max < clock->m2) { return (0); } else { } if (clock->m1 < (int )limit->m1.min || (int )limit->m1.max < clock->m1) { return (0); } else { } if (clock->m1 <= clock->m2) { return (0); } else { } if (clock->m < (int )limit->m.min || (int )limit->m.max < clock->m) { return (0); } else { } if (clock->n < (int )limit->n.min || (int )limit->n.max < clock->n) { return (0); } else { } if (clock->vco < (int )limit->vco.min || (int )limit->vco.max < clock->vco) { return (0); } else { } if (clock->dot < (int )limit->dot.min || (int )limit->dot.max < clock->dot) { return (0); } else { } return (1); } } static bool intel_find_best_PLL(struct drm_crtc *crtc , int target , int refclk , intel_clock_t *best_clock ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; intel_clock_t clock ; intel_limit_t const *limit ; intel_limit_t const *tmp ; int err ; unsigned int tmp___0 ; bool tmp___1 ; unsigned int tmp___2 ; int this_err ; bool tmp___3 ; int tmp___4 ; int __x ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = intel_limit(crtc); limit = tmp; err = target; if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { tmp___1 = intel_pipe_has_type(crtc, 4); if ((int )tmp___1) { tmp___2 = readl((void const volatile *)dev_priv->regs + 397696U); if ((int )tmp___2 < 0) { tmp___0 = readl((void const volatile *)dev_priv->regs + 397696U); if ((tmp___0 & 48U) == 48U) { clock.p2 = limit->p2.p2_fast; } else { clock.p2 = limit->p2.p2_slow; } } else { goto _L___0; } } else { goto _L___0; } } else _L___0: /* CIL Label */ if ((int )limit->p2.dot_limit > target) { clock.p2 = limit->p2.p2_slow; } else { clock.p2 = limit->p2.p2_fast; } memset((void *)best_clock, 0, 36UL); clock.m1 = limit->m1.min; goto ldv_25958; ldv_25957: clock.m2 = limit->m2.min; goto ldv_25955; ldv_25954: clock.n = limit->n.min; goto ldv_25952; ldv_25951: clock.p1 = limit->p1.min; goto ldv_25949; ldv_25948: intel_clock(dev, refclk, & clock); tmp___3 = intel_PLL_is_valid(crtc, & clock); if (tmp___3) { tmp___4 = 0; } else { tmp___4 = 1; } if (tmp___4) { goto ldv_25945; } else { } __x = clock.dot - target; this_err = __x < 0 ? - __x : __x; if (this_err < err) { *best_clock = clock; err = this_err; } else { } ldv_25945: clock.p1 = clock.p1 + 1; ldv_25949: ; if (clock.p1 <= (int )limit->p1.max) { goto ldv_25948; } else { } clock.n = clock.n + 1; ldv_25952: ; if (clock.n <= (int )limit->n.max) { goto ldv_25951; } else { } clock.m2 = clock.m2 + 1; ldv_25955: ; if (clock.m2 < clock.m1 && clock.m2 <= (int )limit->m2.max) { goto ldv_25954; } else { } clock.m1 = clock.m1 + 1; ldv_25958: ; if (clock.m1 <= (int )limit->m1.max) { goto ldv_25957; } else { } return (err != target); } } void intel_wait_for_vblank(struct drm_device *dev ) { { __const_udelay(85900000UL); return; } } static void intel_pipe_set_base(struct drm_crtc *crtc , int x , int y , struct drm_framebuffer *old_fb ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_i915_master_private *master_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct intel_framebuffer *intel_fb ; struct drm_i915_gem_object *obj_priv ; struct drm_gem_object *obj ; int pipe ; unsigned long Start ; unsigned long Offset ; int dspbase ; int dspsurf ; int dspstride ; int dspcntr_reg ; u32 dspcntr ; u32 alignment ; struct drm_framebuffer const *__mptr___0 ; int tmp ; struct drm_framebuffer const *__mptr___1 ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; dspbase = pipe == 0 ? 459140 : 463236; dspsurf = pipe == 0 ? 459164 : 463260; dspstride = pipe == 0 ? 459144 : 463240; dspcntr_reg = pipe == 0 ? 459136 : 463232; if ((unsigned long )crtc->fb == (unsigned long )((struct drm_framebuffer *)0)) { if (drm_debug != 0U) { printk("<7>[drm:%s] No FB bound\n", "intel_pipe_set_base"); } else { } return; } else { } __mptr___0 = (struct drm_framebuffer const *)crtc->fb; intel_fb = (struct intel_framebuffer *)__mptr___0; obj = intel_fb->obj; obj_priv = (struct drm_i915_gem_object *)obj->driver_private; switch (obj_priv->tiling_mode) { case (uint32_t )0: alignment = 65536U; goto ldv_25991; case (uint32_t )1: ; if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { alignment = 1048576U; } else { alignment = 524288U; } goto ldv_25991; case (uint32_t )2: printk("<3>[drm:%s] *ERROR* Y tiled not allowed for scan out buffers\n", "intel_pipe_set_base"); return; default: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/intel_display.c.prepared"), "i" (458), "i" (24UL)); ldv_25995: ; goto ldv_25995; } ldv_25991: tmp = i915_gem_object_pin(intel_fb->obj, alignment); if (tmp != 0) { return; } else { } i915_gem_object_set_to_gtt_domain(intel_fb->obj, 1); Start = (unsigned long )obj_priv->gtt_offset; Offset = (unsigned long )((crtc->fb)->pitch * (unsigned int )y + (unsigned int )(((crtc->fb)->bits_per_pixel / 8) * x)); writel((crtc->fb)->pitch, (void volatile *)dev_priv->regs + (unsigned long )dspstride); dspcntr = readl((void const volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); switch ((crtc->fb)->bits_per_pixel) { case 8: dspcntr = dspcntr | 134217728U; goto ldv_25997; case 16: ; if ((crtc->fb)->depth == 15U) { dspcntr = dspcntr | 268435456U; } else { dspcntr = dspcntr | 335544320U; } goto ldv_25997; case 24: ; case 32: dspcntr = dspcntr | 402653184U; goto ldv_25997; default: printk("<3>[drm:%s] *ERROR* Unknown color depth\n", "intel_pipe_set_base"); return; } ldv_25997: writel(dspcntr, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); if (drm_debug != 0U) { printk("<7>[drm:%s] Writing base %08lX %08lX %d %d\n", "intel_pipe_set_base", Start, Offset, x, y); } else { } if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { writel((unsigned int )Offset, (void volatile *)dev_priv->regs + (unsigned long )dspbase); readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase); writel((unsigned int )Start, (void volatile *)dev_priv->regs + (unsigned long )dspsurf); readl((void const volatile *)dev_priv->regs + (unsigned long )dspsurf); } else { writel((unsigned int )Start + (unsigned int )Offset, (void volatile *)dev_priv->regs + (unsigned long )dspbase); readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase); } intel_wait_for_vblank(dev); if ((unsigned long )old_fb != (unsigned long )((struct drm_framebuffer *)0)) { __mptr___1 = (struct drm_framebuffer const *)old_fb; intel_fb = (struct intel_framebuffer *)__mptr___1; i915_gem_object_unpin(intel_fb->obj); } else { } if ((unsigned long )(dev->primary)->master == (unsigned long )((struct drm_master *)0)) { return; } else { } master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if ((unsigned long )master_priv->sarea_priv == (unsigned long )((struct _drm_i915_sarea *)0)) { return; } else { } switch (pipe) { case 0: (master_priv->sarea_priv)->pipeA_x = x; (master_priv->sarea_priv)->pipeA_y = y; goto ldv_26005; case 1: (master_priv->sarea_priv)->pipeB_x = x; (master_priv->sarea_priv)->pipeB_y = y; goto ldv_26005; default: printk("<3>[drm:%s] *ERROR* Can\'t update pipe %d in SAREA\n", "intel_pipe_set_base", pipe); goto ldv_26005; } ldv_26005: ; return; } } static void intel_crtc_dpms(struct drm_crtc *crtc , int mode ) { struct drm_device *dev ; struct drm_i915_master_private *master_priv ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int pipe ; int dpll_reg ; int dspcntr_reg ; int dspbase_reg ; int pipeconf_reg ; u32 temp ; bool enabled ; unsigned int tmp ; unsigned int tmp___0 ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; dpll_reg = pipe == 0 ? 24596 : 24600; dspcntr_reg = pipe == 0 ? 459136 : 463232; dspbase_reg = pipe == 0 ? 459140 : 463236; pipeconf_reg = pipe == 0 ? 458760 : 462856; switch (mode) { case 0: ; case 1: ; case 2: temp = readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); if ((int )temp >= 0) { writel(temp, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); writel(temp | 2147483648U, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); writel(temp | 2147483648U, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); } else { } temp = readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); if ((int )temp >= 0) { writel(temp | 2147483648U, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); } else { } temp = readl((void const volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); if ((int )temp >= 0) { writel(temp | 2147483648U, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); } else { } intel_crtc_load_lut(crtc); goto ldv_26028; case 3: writel(2147483648U, (void volatile *)dev_priv->regs + 463872U); temp = readl((void const volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); if ((int )temp < 0) { writel(temp & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp___0 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp___0, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); } else { } if ((((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706)) { intel_wait_for_vblank(dev); } else { } temp = readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); if ((int )temp < 0) { writel(temp & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); } else { } intel_wait_for_vblank(dev); temp = readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); if ((int )temp < 0) { writel(temp & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); } else { } __const_udelay(644250UL); goto ldv_26028; } ldv_26028: ; if ((unsigned long )(dev->primary)->master == (unsigned long )((struct drm_master *)0)) { return; } else { } master_priv = (struct drm_i915_master_private *)((dev->primary)->master)->driver_priv; if ((unsigned long )master_priv->sarea_priv == (unsigned long )((struct _drm_i915_sarea *)0)) { return; } else { } enabled = (bool )((int )crtc->enabled && mode != 3); switch (pipe) { case 0: (master_priv->sarea_priv)->pipeA_w = (int )enabled ? crtc->mode.hdisplay : 0; (master_priv->sarea_priv)->pipeA_h = (int )enabled ? crtc->mode.vdisplay : 0; goto ldv_26031; case 1: (master_priv->sarea_priv)->pipeB_w = (int )enabled ? crtc->mode.hdisplay : 0; (master_priv->sarea_priv)->pipeB_h = (int )enabled ? crtc->mode.vdisplay : 0; goto ldv_26031; default: printk("<3>[drm:%s] *ERROR* Can\'t update pipe %d in SAREA\n", "intel_crtc_dpms", pipe); goto ldv_26031; } ldv_26031: intel_crtc->dpms_mode = mode; return; } } static void intel_crtc_prepare(struct drm_crtc *crtc ) { struct drm_crtc_helper_funcs *crtc_funcs ; { crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; (*(crtc_funcs->dpms))(crtc, 3); return; } } static void intel_crtc_commit(struct drm_crtc *crtc ) { struct drm_crtc_helper_funcs *crtc_funcs ; { crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; (*(crtc_funcs->dpms))(crtc, 0); return; } } void intel_encoder_prepare(struct drm_encoder *encoder ) { struct drm_encoder_helper_funcs *encoder_funcs ; { encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; (*(encoder_funcs->dpms))(encoder, 3); return; } } void intel_encoder_commit(struct drm_encoder *encoder ) { struct drm_encoder_helper_funcs *encoder_funcs ; { encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; (*(encoder_funcs->dpms))(encoder, 0); return; } } static bool intel_crtc_mode_fixup(struct drm_crtc *crtc , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { { return (1); } } static int intel_get_core_clock_speed(struct drm_device *dev ) { u16 gcfgc ; u16 hpllcc ; { if (dev->pci_device == 10098) { return (400000); } else if (dev->pci_device == 9602 || dev->pci_device == 9610) { return (333000); } else if ((dev->pci_device == 10146 || dev->pci_device == 10158) || dev->pci_device == 9570) { return (200000); } else if (dev->pci_device == 9618) { gcfgc = 0U; pci_read_config_word(dev->pdev, 240, & gcfgc); if (((int )gcfgc & 128) != 0) { return (133000); } else { switch ((int )gcfgc & 112) { case 64: ; return (333000); default: ; case 0: ; return (190000); } } } else if (dev->pci_device == 9586) { return (266000); } else if (dev->pci_device == 13698) { hpllcc = 0U; switch ((int )hpllcc & 3) { case 0: ; case 1: ; return (200000); case 3: ; return (250000); case 2: ; return (133000); } } else { return (133000); } return (0); } } static int intel_panel_fitter_pipe(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; u32 pfit_control ; { dev_priv = (struct drm_i915_private *)dev->dev_private; if (dev->pci_device == 13687) { return (-1); } else { } pfit_control = readl((void const volatile *)dev_priv->regs + 397872U); if ((int )pfit_control >= 0) { return (-1); } else { } if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { return ((int )(pfit_control >> 29) & 3); } else { } return (1); } } static void intel_crtc_mode_set(struct drm_crtc *crtc , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode , int x , int y , struct drm_framebuffer *old_fb ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int pipe ; int fp_reg ; int dpll_reg ; int dpll_md_reg ; int dspcntr_reg ; int pipeconf_reg ; int htot_reg ; int hblank_reg ; int hsync_reg ; int vtot_reg ; int vblank_reg ; int vsync_reg ; int dspsize_reg ; int dsppos_reg ; int pipesrc_reg ; int refclk ; intel_clock_t clock ; u32 dpll ; u32 fp ; u32 dspcntr ; u32 pipeconf ; bool ok ; bool is_sdvo ; bool is_dvo ; bool is_crt ; bool is_lvds ; bool is_tv ; struct drm_mode_config *mode_config ; struct drm_connector *connector ; struct list_head const *__mptr___0 ; struct intel_output *intel_output ; struct drm_connector const *__mptr___1 ; struct list_head const *__mptr___2 ; int sdvo_pixel_multiply ; int tmp ; int tmp___0 ; u32 lvds ; unsigned int tmp___1 ; int sdvo_pixel_multiply___0 ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; fp_reg = pipe == 0 ? 24640 : 24648; dpll_reg = pipe == 0 ? 24596 : 24600; dpll_md_reg = intel_crtc->pipe == 0 ? 24604 : 24608; dspcntr_reg = pipe == 0 ? 459136 : 463232; pipeconf_reg = pipe == 0 ? 458760 : 462856; htot_reg = pipe == 0 ? 393216 : 397312; hblank_reg = pipe == 0 ? 393220 : 397316; hsync_reg = pipe == 0 ? 393224 : 397320; vtot_reg = pipe == 0 ? 393228 : 397324; vblank_reg = pipe == 0 ? 393232 : 397328; vsync_reg = pipe == 0 ? 393236 : 397332; dspsize_reg = pipe == 0 ? 459152 : 463248; dsppos_reg = pipe == 0 ? 459148 : 463244; pipesrc_reg = pipe == 0 ? 393244 : 397340; dpll = 0U; fp = 0U; is_sdvo = 0; is_dvo = 0; is_crt = 0; is_lvds = 0; is_tv = 0; mode_config = & dev->mode_config; drm_vblank_pre_modeset(dev, pipe); __mptr___0 = (struct list_head const *)mode_config->connector_list.next; connector = (struct drm_connector *)__mptr___0 + 0xfffffffffffffc18UL; goto ldv_26130; ldv_26129: __mptr___1 = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr___1; if ((unsigned long )connector->encoder == (unsigned long )((struct drm_encoder *)0) || (unsigned long )(connector->encoder)->crtc != (unsigned long )crtc) { goto ldv_26122; } else { } switch (intel_output->type) { case 4: is_lvds = 1; goto ldv_26124; case 3: is_sdvo = 1; goto ldv_26124; case 2: is_dvo = 1; goto ldv_26124; case 5: is_tv = 1; goto ldv_26124; case 1: is_crt = 1; goto ldv_26124; } ldv_26124: ; ldv_26122: __mptr___2 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___2 + 0xfffffffffffffc18UL; ldv_26130: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& mode_config->connector_list)) { goto ldv_26129; } else { } if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { refclk = 96000; } else { refclk = 48000; } ok = intel_find_best_PLL(crtc, adjusted_mode->clock, refclk, & clock); if (! ok) { printk("<3>[drm:%s] *ERROR* Couldn\'t find PLL settings for mode!\n", "intel_crtc_mode_set"); return; } else { } fp = (u32 )(((clock.n << 16) | (clock.m1 << 8)) | clock.m2); dpll = 268435456U; if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { if ((int )is_lvds) { dpll = dpll | 134217728U; } else { dpll = dpll | 67108864U; } if ((int )is_sdvo) { dpll = dpll | 1073741824U; if (dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) { sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; dpll = (u32 )((sdvo_pixel_multiply + -1) << 4) | dpll; } else { } } else { } dpll = (u32 )((1 << (clock.p1 + -1)) << 16) | dpll; switch (clock.p2) { case 5: dpll = dpll | 16777216U; goto ldv_26135; case 7: dpll = dpll | 16777216U; goto ldv_26135; case 10: dpll = dpll; goto ldv_26135; case 14: dpll = dpll; goto ldv_26135; } ldv_26135: ; if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dpll = dpll | 3072U; } else { } } else if ((int )is_lvds) { dpll = (u32 )((1 << (clock.p1 + -1)) << 16) | dpll; } else { if (clock.p1 == 2) { dpll = dpll | 2097152U; } else { dpll = (u32 )((clock.p1 + -2) << 16) | dpll; } if (clock.p2 == 4) { dpll = dpll | 8388608U; } else { } } if ((int )is_tv) { dpll = dpll | 3U; } else { dpll = dpll; } pipeconf = readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); dspcntr = 1073741824U; if (pipe == 0) { dspcntr = dspcntr; } else { dspcntr = dspcntr | 16777216U; } if (pipe == 0 && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) { tmp = intel_get_core_clock_speed(dev); if (mode->clock > (tmp * 9) / 10) { pipeconf = pipeconf | 1073741824U; } else { pipeconf = pipeconf & 3221225471U; } } else { } dspcntr = dspcntr | 2147483648U; pipeconf = pipeconf | 2147483648U; dpll = dpll | 2147483648U; tmp___0 = intel_panel_fitter_pipe(dev); if (tmp___0 == pipe) { writel(0U, (void volatile *)dev_priv->regs + 397872U); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] Mode for pipe %c:\n", "intel_crtc_mode_set", pipe == 0 ? 65 : 66); } else { } drm_mode_debug_printmodeline(mode); if ((int )dpll < 0) { writel(fp, (void volatile *)dev_priv->regs + (unsigned long )fp_reg); writel(dpll & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); } else { } if ((int )is_lvds) { tmp___1 = readl((void const volatile *)dev_priv->regs + 397696U); lvds = tmp___1; lvds = lvds | 3221226240U; if (clock.p2 == 7) { lvds = lvds | 60U; } else { lvds = lvds & 4294967235U; } writel(lvds, (void volatile *)dev_priv->regs + 397696U); readl((void const volatile *)dev_priv->regs + 397696U); } else { } writel(fp, (void volatile *)dev_priv->regs + (unsigned long )fp_reg); writel(dpll, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { sdvo_pixel_multiply___0 = adjusted_mode->clock / mode->clock; writel((unsigned int )((sdvo_pixel_multiply___0 + -1) << 8), (void volatile *)dev_priv->regs + (unsigned long )dpll_md_reg); } else { writel(dpll, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); } readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); __const_udelay(644250UL); writel((unsigned int )((adjusted_mode->crtc_hdisplay + -1) | ((adjusted_mode->crtc_htotal + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )htot_reg); writel((unsigned int )((adjusted_mode->crtc_hblank_start + -1) | ((adjusted_mode->crtc_hblank_end + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )hblank_reg); writel((unsigned int )((adjusted_mode->crtc_hsync_start + -1) | ((adjusted_mode->crtc_hsync_end + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )hsync_reg); writel((unsigned int )((adjusted_mode->crtc_vdisplay + -1) | ((adjusted_mode->crtc_vtotal + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )vtot_reg); writel((unsigned int )((adjusted_mode->crtc_vblank_start + -1) | ((adjusted_mode->crtc_vblank_end + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )vblank_reg); writel((unsigned int )((adjusted_mode->crtc_vsync_start + -1) | ((adjusted_mode->crtc_vsync_end + -1) << 16)), (void volatile *)dev_priv->regs + (unsigned long )vsync_reg); writel((unsigned int )(((mode->vdisplay + -1) << 16) | (mode->hdisplay + -1)), (void volatile *)dev_priv->regs + (unsigned long )dspsize_reg); writel(0U, (void volatile *)dev_priv->regs + (unsigned long )dsppos_reg); writel((unsigned int )(((mode->hdisplay + -1) << 16) | (mode->vdisplay + -1)), (void volatile *)dev_priv->regs + (unsigned long )pipesrc_reg); writel(pipeconf, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); intel_wait_for_vblank(dev); writel(dspcntr, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); intel_pipe_set_base(crtc, x, y, old_fb); drm_vblank_post_modeset(dev, pipe); return; } } void intel_crtc_load_lut(struct drm_crtc *crtc ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int palreg ; int i ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; palreg = intel_crtc->pipe == 0 ? 40960 : 43008; if (! crtc->enabled) { return; } else { } i = 0; goto ldv_26152; ldv_26151: writel((unsigned int )((((int )intel_crtc->lut_r[i] << 16) | ((int )intel_crtc->lut_g[i] << 8)) | (int )intel_crtc->lut_b[i]), (void volatile *)dev_priv->regs + (unsigned long )(i * 4 + palreg)); i = i + 1; ldv_26152: ; if (i <= 255) { goto ldv_26151; } else { } return; } } static int intel_crtc_cursor_set(struct drm_crtc *crtc , struct drm_file *file_priv , uint32_t handle , uint32_t width , uint32_t height ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct drm_gem_object *bo ; struct drm_i915_gem_object *obj_priv ; int pipe ; uint32_t control ; uint32_t base ; uint32_t temp ; size_t addr ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; control = pipe == 0 ? 458880U : 458944U; base = pipe == 0 ? 458884U : 458948U; if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "intel_crtc_cursor_set"); } else { } if (handle == 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] cursor off\n", "intel_crtc_cursor_set"); } else { } temp = 0U; temp = temp; writel(temp, (void volatile *)dev_priv->regs + (unsigned long )control); writel(0U, (void volatile *)dev_priv->regs + (unsigned long )base); return (0); } else { } if (width != 64U || height != 64U) { printk("<3>[drm:%s] *ERROR* we currently only support 64x64 cursors\n", "intel_crtc_cursor_set"); return (-22); } else { } bo = drm_gem_object_lookup(dev, file_priv, (int )handle); if ((unsigned long )bo == (unsigned long )((struct drm_gem_object *)0)) { return (-2); } else { } obj_priv = (struct drm_i915_gem_object *)bo->driver_private; if (bo->size < (size_t )((width * height) * 4U)) { printk("<3>[drm:%s] *ERROR* buffer is to small\n", "intel_crtc_cursor_set"); drm_gem_object_unreference(bo); return (-12); } else { } if ((int )dev_priv->cursor_needs_physical) { addr = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset; } else { addr = (size_t )obj_priv->gtt_offset; } intel_crtc->cursor_addr = (uint32_t )addr; temp = 0U; temp = (uint32_t )(pipe << 28) | temp; temp = temp | 67108903U; writel(temp, (void volatile *)dev_priv->regs + (unsigned long )control); writel((unsigned int )addr, (void volatile *)dev_priv->regs + (unsigned long )base); return (0); } } static int intel_crtc_cursor_move(struct drm_crtc *crtc , int x , int y ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int pipe ; uint32_t temp ; uint32_t adder ; { dev = crtc->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; temp = 0U; if (x < 0) { temp = temp | 32768U; x = - x; } else { } if (y < 0) { temp = temp | 2147483648U; y = - y; } else { } temp = ((uint32_t )x & 2047U) | temp; temp = (uint32_t )((y & 2047) << 16) | temp; adder = intel_crtc->cursor_addr; writel(temp, (void volatile *)(dev_priv->regs + (pipe == 0 ? 458888UL : 458952UL))); writel(adder, (void volatile *)(dev_priv->regs + (pipe == 0 ? 458884UL : 458948UL))); return (0); } } void intel_crtc_fb_gamma_set(struct drm_crtc *crtc , u16 red , u16 green , u16 blue , int regno ) { struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; { __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; intel_crtc->lut_r[regno] = (u8 )((int )red >> 8); intel_crtc->lut_g[regno] = (u8 )((int )green >> 8); intel_crtc->lut_b[regno] = (u8 )((int )blue >> 8); return; } } static void intel_crtc_gamma_set(struct drm_crtc *crtc , u16 *red , u16 *green , u16 *blue , uint32_t size ) { struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int i ; { __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; if (size != 256U) { return; } else { } i = 0; goto ldv_26209; ldv_26208: intel_crtc->lut_r[i] = (u8 )((int )*(red + (unsigned long )i) >> 8); intel_crtc->lut_g[i] = (u8 )((int )*(green + (unsigned long )i) >> 8); intel_crtc->lut_b[i] = (u8 )((int )*(blue + (unsigned long )i) >> 8); i = i + 1; ldv_26209: ; if (i <= 255) { goto ldv_26208; } else { } intel_crtc_load_lut(crtc); return; } } static struct drm_display_mode load_detect_mode = {{0, 0}, {0U, 0U}, {'6', '4', '0', 'x', '4', '8', '0', '\000'}, 0, 0, 16, 31500, 640, 664, 704, 832, 0, 480, 489, 491, 520, 0, 10U, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0.f}; struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output , struct drm_display_mode *mode , int *dpms_mode ) { struct intel_crtc *intel_crtc ; struct drm_crtc *possible_crtc ; struct drm_crtc *supported_crtc ; struct drm_encoder *encoder ; struct drm_crtc *crtc ; struct drm_device *dev ; struct drm_encoder_helper_funcs *encoder_funcs ; struct drm_crtc_helper_funcs *crtc_funcs ; int i ; struct drm_crtc const *__mptr ; struct list_head const *__mptr___0 ; struct list_head const *__mptr___1 ; struct drm_crtc const *__mptr___2 ; { supported_crtc = 0; encoder = & intel_output->enc; crtc = 0; dev = encoder->dev; encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; i = -1; if ((unsigned long )encoder->crtc != (unsigned long )((struct drm_crtc *)0)) { crtc = encoder->crtc; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; *dpms_mode = intel_crtc->dpms_mode; if (intel_crtc->dpms_mode != 0) { crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; (*(crtc_funcs->dpms))(crtc, 0); (*(encoder_funcs->dpms))(encoder, 0); } else { } return (crtc); } else { } __mptr___0 = (struct list_head const *)dev->mode_config.crtc_list.next; possible_crtc = (struct drm_crtc *)__mptr___0 + 0xfffffffffffffff8UL; goto ldv_26235; ldv_26234: i = i + 1; if ((encoder->possible_crtcs & (uint32_t )(1 << i)) == 0U) { goto ldv_26232; } else { } if (! possible_crtc->enabled) { crtc = possible_crtc; goto ldv_26233; } else { } if ((unsigned long )supported_crtc == (unsigned long )((struct drm_crtc *)0)) { supported_crtc = possible_crtc; } else { } ldv_26232: __mptr___1 = (struct list_head const *)possible_crtc->head.next; possible_crtc = (struct drm_crtc *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26235: __builtin_prefetch((void const *)possible_crtc->head.next); if ((unsigned long )(& possible_crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26234; } else { } ldv_26233: ; if ((unsigned long )crtc == (unsigned long )((struct drm_crtc *)0)) { return (0); } else { } encoder->crtc = crtc; intel_output->load_detect_temp = 1; __mptr___2 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___2; *dpms_mode = intel_crtc->dpms_mode; if (! crtc->enabled) { if ((unsigned long )mode == (unsigned long )((struct drm_display_mode *)0)) { mode = & load_detect_mode; } else { } drm_crtc_helper_set_mode(crtc, mode, 0, 0, crtc->fb); } else { if (intel_crtc->dpms_mode != 0) { crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; (*(crtc_funcs->dpms))(crtc, 0); } else { } (*(encoder_funcs->mode_set))(encoder, & crtc->mode, & crtc->mode); (*(encoder_funcs->commit))(encoder); } intel_wait_for_vblank(dev); return (crtc); } } void intel_release_load_detect_pipe(struct intel_output *intel_output , int dpms_mode ) { struct drm_encoder *encoder ; struct drm_device *dev ; struct drm_crtc *crtc ; struct drm_encoder_helper_funcs *encoder_funcs ; struct drm_crtc_helper_funcs *crtc_funcs ; { encoder = & intel_output->enc; dev = encoder->dev; crtc = encoder->crtc; encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; if ((int )intel_output->load_detect_temp) { encoder->crtc = 0; intel_output->load_detect_temp = 0; crtc->enabled = drm_helper_crtc_in_use(crtc); drm_helper_disable_unused_functions(dev); } else { } if ((int )crtc->enabled && dpms_mode != 0) { if ((unsigned long )encoder->crtc == (unsigned long )crtc) { (*(encoder_funcs->dpms))(encoder, dpms_mode); } else { } (*(crtc_funcs->dpms))(crtc, dpms_mode); } else { } return; } } static int intel_crtc_clock_get(struct drm_device *dev , struct drm_crtc *crtc ) { struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int pipe ; u32 dpll ; unsigned int tmp ; u32 fp ; intel_clock_t clock ; bool is_lvds ; unsigned int tmp___0 ; int tmp___1 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; tmp = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 24596UL : 24600UL))); dpll = tmp; if ((dpll & 256U) == 0U) { fp = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 24640UL : 24648UL))); } else { fp = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 24644UL : 24652UL))); } clock.m1 = (int )((fp & 16128U) >> 8); clock.m2 = (int )fp & 63; clock.n = (int )((fp & 4128768U) >> 16); if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { clock.p1 = ffs((int )((dpll & 16711680U) >> 16)); switch (dpll & 201326592U) { case 67108864U: clock.p2 = (dpll & 16777216U) != 0U ? 5 : 10; goto ldv_26260; case 134217728U: clock.p2 = (dpll & 16777216U) != 0U ? 7 : 14; goto ldv_26260; default: ; if (drm_debug != 0U) { printk("<7>[drm:%s] Unknown DPLL mode %08x in programmed mode\n", "intel_crtc_clock_get", (int )dpll & 201326592); } else { } return (0); } ldv_26260: i9xx_clock(96000, & clock); } else { if (pipe == 1) { tmp___0 = readl((void const volatile *)dev_priv->regs + 397696U); if ((int )tmp___0 < 0) { tmp___1 = 1; } else { tmp___1 = 0; } } else { tmp___1 = 0; } is_lvds = (bool )tmp___1; if ((int )is_lvds) { clock.p1 = ffs((int )((dpll & 4128768U) >> 16)); clock.p2 = 14; if ((dpll & 24576U) == 24576U) { i8xx_clock(66000, & clock); } else { i8xx_clock(48000, & clock); } } else { if ((dpll & 2097152U) != 0U) { clock.p1 = 2; } else { clock.p1 = (int )(((dpll & 2031616U) >> 16) + 2U); } if ((dpll & 8388608U) != 0U) { clock.p2 = 4; } else { clock.p2 = 2; } i8xx_clock(48000, & clock); } } return (clock.dot); } } struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev , struct drm_crtc *crtc ) { struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; int pipe ; struct drm_display_mode *mode ; int htot ; unsigned int tmp ; int hsync ; unsigned int tmp___0 ; int vtot ; unsigned int tmp___1 ; int vsync ; unsigned int tmp___2 ; void *tmp___3 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; pipe = intel_crtc->pipe; tmp = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 393216UL : 397312UL))); htot = (int )tmp; tmp___0 = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 393224UL : 397320UL))); hsync = (int )tmp___0; tmp___1 = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 393228UL : 397324UL))); vtot = (int )tmp___1; tmp___2 = readl((void const volatile *)(dev_priv->regs + (pipe == 0 ? 393236UL : 397332UL))); vsync = (int )tmp___2; tmp___3 = kzalloc(224UL, 208U); mode = (struct drm_display_mode *)tmp___3; if ((unsigned long )mode == (unsigned long )((struct drm_display_mode *)0)) { return (0); } else { } mode->clock = intel_crtc_clock_get(dev, crtc); mode->hdisplay = (htot & 65535) + 1; mode->htotal = (int )(((unsigned int )htot >> 16) + 1U); mode->hsync_start = (hsync & 65535) + 1; mode->hsync_end = (int )(((unsigned int )hsync >> 16) + 1U); mode->vdisplay = (vtot & 65535) + 1; mode->vtotal = (int )(((unsigned int )vtot >> 16) + 1U); mode->vsync_start = (vsync & 65535) + 1; mode->vsync_end = (int )(((unsigned int )vsync >> 16) + 1U); drm_mode_set_name(mode); drm_mode_set_crtcinfo(mode, 0); return (mode); } } static void intel_crtc_destroy(struct drm_crtc *crtc ) { struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; { __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; drm_crtc_cleanup(crtc); kfree((void const *)intel_crtc); return; } } static struct drm_crtc_helper_funcs const intel_helper_funcs = {& intel_crtc_dpms, & intel_crtc_prepare, & intel_crtc_commit, & intel_crtc_mode_fixup, & intel_crtc_mode_set, & intel_pipe_set_base}; static struct drm_crtc_funcs const intel_crtc_funcs = {0, 0, & intel_crtc_cursor_set, & intel_crtc_cursor_move, & intel_crtc_gamma_set, & intel_crtc_destroy, & drm_crtc_helper_set_config}; static void intel_crtc_init(struct drm_device *dev , int pipe ) { struct intel_crtc *intel_crtc ; int i ; void *tmp ; { tmp = kzalloc(1216UL, 208U); intel_crtc = (struct intel_crtc *)tmp; if ((unsigned long )intel_crtc == (unsigned long )((struct intel_crtc *)0)) { return; } else { } drm_crtc_init(dev, & intel_crtc->base, & intel_crtc_funcs); drm_mode_crtc_set_gamma_size(& intel_crtc->base, 256); intel_crtc->pipe = pipe; i = 0; goto ldv_26294; ldv_26293: intel_crtc->lut_r[i] = (u8 )i; intel_crtc->lut_g[i] = (u8 )i; intel_crtc->lut_b[i] = (u8 )i; i = i + 1; ldv_26294: ; if (i <= 255) { goto ldv_26293; } else { } intel_crtc->cursor_addr = 0U; intel_crtc->dpms_mode = 3; drm_crtc_helper_add(& intel_crtc->base, & intel_helper_funcs); intel_crtc->mode_set.crtc = & intel_crtc->base; intel_crtc->mode_set.connectors = (struct drm_connector **)intel_crtc + 1U; intel_crtc->mode_set.num_connectors = 0UL; return; } } struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev , int pipe ) { struct drm_crtc *crtc ; struct list_head const *__mptr ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr___0 ; struct list_head const *__mptr___1 ; { crtc = 0; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26310; ldv_26309: __mptr___0 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___0; if (intel_crtc->pipe == pipe) { goto ldv_26308; } else { } __mptr___1 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26310: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26309; } else { } ldv_26308: ; return (crtc); } } static int intel_connector_clones(struct drm_device *dev , int type_mask ) { int index_mask ; struct drm_connector *connector ; int entry ; struct list_head const *__mptr ; struct intel_output *intel_output ; struct drm_connector const *__mptr___0 ; struct list_head const *__mptr___1 ; { index_mask = 0; entry = 0; __mptr = (struct list_head const *)dev->mode_config.connector_list.next; connector = (struct drm_connector *)__mptr + 0xfffffffffffffc18UL; goto ldv_26326; ldv_26325: __mptr___0 = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr___0; if ((type_mask >> intel_output->type) & 1) { index_mask = (1 << entry) | index_mask; } else { } entry = entry + 1; __mptr___1 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___1 + 0xfffffffffffffc18UL; ldv_26326: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) { goto ldv_26325; } else { } return (index_mask); } } static void intel_setup_outputs(struct drm_device *dev ) { struct drm_connector *connector ; struct list_head const *__mptr ; struct intel_output *intel_output ; struct drm_connector const *__mptr___0 ; struct drm_encoder *encoder ; int crtc_mask ; int clone_mask ; int tmp ; struct list_head const *__mptr___1 ; { intel_crt_init(dev); if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && dev->pci_device != 13687) { intel_lvds_init(dev); } else { } if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { intel_sdvo_init(dev, 397632); intel_sdvo_init(dev, 397664); } else { intel_dvo_init(dev); } if (((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && (dev->pci_device != 9602 && dev->pci_device != 9610)) { intel_tv_init(dev); } else { } __mptr = (struct list_head const *)dev->mode_config.connector_list.next; connector = (struct drm_connector *)__mptr + 0xfffffffffffffc18UL; goto ldv_26349; ldv_26348: __mptr___0 = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr___0; encoder = & intel_output->enc; crtc_mask = 0; clone_mask = 0; switch (intel_output->type) { case 2: ; case 3: crtc_mask = 3; clone_mask = 14; goto ldv_26344; case 1: crtc_mask = 3; clone_mask = 14; goto ldv_26344; case 4: crtc_mask = 2; clone_mask = 16; goto ldv_26344; case 5: crtc_mask = 3; clone_mask = 32; goto ldv_26344; } ldv_26344: encoder->possible_crtcs = (uint32_t )crtc_mask; tmp = intel_connector_clones(dev, clone_mask); encoder->possible_clones = (uint32_t )tmp; __mptr___1 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___1 + 0xfffffffffffffc18UL; ldv_26349: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) { goto ldv_26348; } else { } return; } } static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb ) { struct intel_framebuffer *intel_fb ; struct drm_framebuffer const *__mptr ; struct drm_device *dev ; { __mptr = (struct drm_framebuffer const *)fb; intel_fb = (struct intel_framebuffer *)__mptr; dev = fb->dev; if ((unsigned long )fb->fbdev != (unsigned long )((void *)0)) { intelfb_remove(dev, fb); } else { } drm_framebuffer_cleanup(fb); mutex_lock_nested(& dev->struct_mutex, 0U); drm_gem_object_unreference(intel_fb->obj); mutex_unlock(& dev->struct_mutex); kfree((void const *)intel_fb); return; } } static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb , struct drm_file *file_priv , unsigned int *handle ) { struct intel_framebuffer *intel_fb ; struct drm_framebuffer const *__mptr ; struct drm_gem_object *object ; int tmp ; { __mptr = (struct drm_framebuffer const *)fb; intel_fb = (struct intel_framebuffer *)__mptr; object = intel_fb->obj; tmp = drm_gem_handle_create(file_priv, object, (int *)handle); return (tmp); } } static struct drm_framebuffer_funcs const intel_fb_funcs = {& intel_user_framebuffer_destroy, & intel_user_framebuffer_create_handle}; int intel_framebuffer_create(struct drm_device *dev , struct drm_mode_fb_cmd *mode_cmd , struct drm_framebuffer **fb , struct drm_gem_object *obj ) { struct intel_framebuffer *intel_fb ; int ret ; void *tmp ; { tmp = kzalloc(168UL, 208U); intel_fb = (struct intel_framebuffer *)tmp; if ((unsigned long )intel_fb == (unsigned long )((struct intel_framebuffer *)0)) { return (-12); } else { } ret = drm_framebuffer_init(dev, & intel_fb->base, & intel_fb_funcs); if (ret != 0) { printk("<3>[drm:%s] *ERROR* framebuffer init failed %d\n", "intel_framebuffer_create", ret); return (ret); } else { } drm_helper_mode_fill_fb_struct(& intel_fb->base, mode_cmd); intel_fb->obj = obj; *fb = & intel_fb->base; return (0); } } static struct drm_framebuffer *intel_user_framebuffer_create(struct drm_device *dev , struct drm_file *filp , struct drm_mode_fb_cmd *mode_cmd ) { struct drm_gem_object *obj ; struct drm_framebuffer *fb ; int ret ; { obj = drm_gem_object_lookup(dev, filp, (int )mode_cmd->handle); if ((unsigned long )obj == (unsigned long )((struct drm_gem_object *)0)) { return (0); } else { } ret = intel_framebuffer_create(dev, mode_cmd, & fb, obj); if (ret != 0) { drm_gem_object_unreference(obj); return (0); } else { } return (fb); } } static struct drm_mode_config_funcs const intel_mode_funcs = {& intel_user_framebuffer_create, & intelfb_probe}; void intel_modeset_init(struct drm_device *dev ) { int num_pipe ; int i ; { drm_mode_config_init(dev); dev->mode_config.min_width = 0; dev->mode_config.min_height = 0; dev->mode_config.funcs = (struct drm_mode_config_funcs *)(& intel_mode_funcs); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dev->mode_config.max_width = 8192; dev->mode_config.max_height = 8192; } else { dev->mode_config.max_width = 2048; dev->mode_config.max_height = 2048; } if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) { dev->mode_config.fb_base = (unsigned long )(dev->pdev)->resource[2].start; } else { dev->mode_config.fb_base = (unsigned long )(dev->pdev)->resource[0].start; } if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) || ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) { num_pipe = 2; } else { num_pipe = 1; } if (drm_debug != 0U) { printk("<7>[drm:%s] %d display pipe%s available.\n", "intel_modeset_init", num_pipe, num_pipe > 1 ? (char *)"s" : (char *)""); } else { } i = 0; goto ldv_26393; ldv_26392: intel_crtc_init(dev, i); i = i + 1; ldv_26393: ; if (i < num_pipe) { goto ldv_26392; } else { } intel_setup_outputs(dev); return; } } void intel_modeset_cleanup(struct drm_device *dev ) { { drm_mode_config_cleanup(dev); return; } } struct drm_encoder *intel_best_encoder(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; return (& intel_output->enc); } } void ldv_main9_sequence_infinite_withcheck_stateful(void) { struct drm_crtc *var_group1 ; int var_intel_crtc_dpms_9_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_crtc_mode_fixup_14_p2 ; struct drm_display_mode *var_intel_crtc_mode_set_17_p2 ; int var_intel_crtc_mode_set_17_p3 ; int var_intel_crtc_mode_set_17_p4 ; struct drm_framebuffer *var_intel_crtc_mode_set_17_p5 ; int var_intel_pipe_set_base_8_p1 ; int var_intel_pipe_set_base_8_p2 ; struct drm_framebuffer *var_intel_pipe_set_base_8_p3 ; struct drm_file *var_group3 ; uint32_t var_intel_crtc_cursor_set_19_p2 ; uint32_t var_intel_crtc_cursor_set_19_p3 ; uint32_t var_intel_crtc_cursor_set_19_p4 ; int var_intel_crtc_cursor_move_20_p1 ; int var_intel_crtc_cursor_move_20_p2 ; u16 *var_intel_crtc_gamma_set_22_p1 ; u16 *var_intel_crtc_gamma_set_22_p2 ; u16 *var_intel_crtc_gamma_set_22_p3 ; uint32_t var_intel_crtc_gamma_set_22_p4 ; struct drm_framebuffer *var_group4 ; unsigned int *var_intel_user_framebuffer_create_handle_33_p2 ; struct drm_device *var_group5 ; struct drm_mode_fb_cmd *var_intel_user_framebuffer_create_35_p2 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26461; ldv_26460: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_crtc_dpms(var_group1, var_intel_crtc_dpms_9_p1); goto ldv_26446; case 1: ldv_handler_precall(); intel_crtc_mode_fixup(var_group1, var_group2, var_intel_crtc_mode_fixup_14_p2); goto ldv_26446; case 2: ldv_handler_precall(); intel_crtc_mode_set(var_group1, var_group2, var_intel_crtc_mode_set_17_p2, var_intel_crtc_mode_set_17_p3, var_intel_crtc_mode_set_17_p4, var_intel_crtc_mode_set_17_p5); goto ldv_26446; case 3: ldv_handler_precall(); intel_pipe_set_base(var_group1, var_intel_pipe_set_base_8_p1, var_intel_pipe_set_base_8_p2, var_intel_pipe_set_base_8_p3); goto ldv_26446; case 4: ldv_handler_precall(); intel_crtc_prepare(var_group1); goto ldv_26446; case 5: ldv_handler_precall(); intel_crtc_commit(var_group1); goto ldv_26446; case 6: ldv_handler_precall(); intel_crtc_cursor_set(var_group1, var_group3, var_intel_crtc_cursor_set_19_p2, var_intel_crtc_cursor_set_19_p3, var_intel_crtc_cursor_set_19_p4); goto ldv_26446; case 7: ldv_handler_precall(); intel_crtc_cursor_move(var_group1, var_intel_crtc_cursor_move_20_p1, var_intel_crtc_cursor_move_20_p2); goto ldv_26446; case 8: ldv_handler_precall(); intel_crtc_gamma_set(var_group1, var_intel_crtc_gamma_set_22_p1, var_intel_crtc_gamma_set_22_p2, var_intel_crtc_gamma_set_22_p3, var_intel_crtc_gamma_set_22_p4); goto ldv_26446; case 9: ldv_handler_precall(); intel_crtc_destroy(var_group1); goto ldv_26446; case 10: ldv_handler_precall(); intel_user_framebuffer_destroy(var_group4); goto ldv_26446; case 11: ldv_handler_precall(); intel_user_framebuffer_create_handle(var_group4, var_group3, var_intel_user_framebuffer_create_handle_33_p2); goto ldv_26446; case 12: ldv_handler_precall(); intel_user_framebuffer_create(var_group5, var_group3, var_intel_user_framebuffer_create_35_p2); goto ldv_26446; default: ; goto ldv_26446; } ldv_26446: ; ldv_26461: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26460; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_345(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_346(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_347(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_348(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_349(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_350(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_351(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_352(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_353(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_354(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_355(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_356(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_357(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_358(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_359(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_360(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_361(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_362(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_381(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_384(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_386(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_389(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_390(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_393(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_395(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_397(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_382(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_385(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_387(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_388(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_391(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_392(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_394(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_396(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_398(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_383(spinlock_t *ldv_func_arg1 ) ; extern unsigned long msecs_to_jiffies(unsigned int const ) ; __inline static char const *dev_name(struct device const *dev ) { { return ((char const *)(& dev->bus_id)); } } extern char const *dev_driver_string(struct device const * ) ; extern void drm_connector_init(struct drm_device * , struct drm_connector * , struct drm_connector_funcs const * , int ) ; extern void drm_connector_cleanup(struct drm_connector * ) ; extern void drm_encoder_init(struct drm_device * , struct drm_encoder * , struct drm_encoder_funcs const * , int ) ; extern void drm_encoder_cleanup(struct drm_encoder * ) ; extern int drm_mode_connector_attach_encoder(struct drm_connector * , struct drm_encoder * ) ; extern int drm_sysfs_connector_add(struct drm_connector * ) ; extern void drm_sysfs_connector_remove(struct drm_connector * ) ; extern void drm_helper_probe_single_connector_modes(struct drm_connector * , uint32_t , uint32_t ) ; __inline static void drm_encoder_helper_add(struct drm_encoder *encoder , struct drm_encoder_helper_funcs const *funcs ) { { encoder->helper_private = (void *)funcs; return; } } __inline static void drm_connector_helper_add(struct drm_connector *connector , struct drm_connector_helper_funcs const *funcs ) { { connector->helper_private = (void *)funcs; return; } } struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev , u32 const reg , char const *name ) ; void intel_i2c_destroy(struct intel_i2c_chan *chan ) ; int intel_ddc_get_modes(struct intel_output *intel_output ) ; bool intel_ddc_probe(struct intel_output *intel_output ) ; static void intel_crt_dpms(struct drm_encoder *encoder , int mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 temp ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; temp = readl((void const volatile *)dev_priv->regs + 397568U); temp = temp & 4294964223U; temp = temp & 2147483647U; switch (mode) { case 0: temp = temp | 2147483648U; goto ldv_25866; case 1: temp = temp | 2147484672U; goto ldv_25866; case 2: temp = temp | 2147485696U; goto ldv_25866; case 3: temp = temp | 3072U; goto ldv_25866; } ldv_25866: writel(temp, (void volatile *)dev_priv->regs + 397568U); return; } } static int intel_crt_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode ) { { if ((mode->flags & 32U) != 0U) { return (8); } else { } if (mode->clock > 400000 || mode->clock <= 24999) { return (17); } else { } return (0); } } static bool intel_crt_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { { return (1); } } static void intel_crt_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_crtc *crtc ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct drm_i915_private *dev_priv ; int dpll_md_reg ; u32 adpa ; u32 dpll_md ; { dev = encoder->dev; crtc = encoder->crtc; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; dev_priv = (struct drm_i915_private *)dev->dev_private; if (intel_crtc->pipe == 0) { dpll_md_reg = 24604; } else { dpll_md_reg = 24608; } if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { dpll_md = readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_md_reg); writel(dpll_md & 4294951167U, (void volatile *)dev_priv->regs + (unsigned long )dpll_md_reg); } else { } adpa = 0U; if ((int )adjusted_mode->flags & 1) { adpa = adpa | 8U; } else { } if ((adjusted_mode->flags & 4U) != 0U) { adpa = adpa | 16U; } else { } if (intel_crtc->pipe == 0) { adpa = adpa; } else { adpa = adpa | 1073741824U; } writel(adpa, (void volatile *)dev_priv->regs + 397568U); return; } } static bool intel_crt_detect_hotplug(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 temp ; unsigned long timeout ; unsigned long tmp ; unsigned int tmp___0 ; unsigned int tmp___1 ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = msecs_to_jiffies(1000U); timeout = tmp + (unsigned long )jiffies; temp = readl((void const volatile *)dev_priv->regs + 397584U); writel(temp | 40U, (void volatile *)dev_priv->regs + 397584U); ldv_25907: tmp___0 = readl((void const volatile *)dev_priv->regs + 397584U); if ((tmp___0 & 8U) == 0U) { goto ldv_25900; } else { } msleep(1U); if ((1 != 0 && 1 != 0) && (long )jiffies - (long )timeout < 0L) { goto ldv_25907; } else { } ldv_25900: tmp___1 = readl((void const volatile *)dev_priv->regs + 397588U); if ((tmp___1 & 768U) == 768U) { return (1); } else { } return (0); } } static bool intel_crt_detect_ddc(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; bool tmp ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; if (intel_output->type != 1) { return (0); } else { } tmp = intel_ddc_probe(intel_output); return (tmp); } } static enum drm_connector_status intel_crt_detect(struct drm_connector *connector ) { struct drm_device *dev ; bool tmp ; bool tmp___0 ; { dev = connector->dev; if ((((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && (dev->pci_device != 9602 && dev->pci_device != 9610)) && dev->pci_device != 9618) { tmp = intel_crt_detect_hotplug(connector); if ((int )tmp) { return (connector_status_connected); } else { return (connector_status_disconnected); } } else { } tmp___0 = intel_crt_detect_ddc(connector); if ((int )tmp___0) { return (connector_status_connected); } else { } return (connector_status_unknown); } } static void intel_crt_destroy(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; intel_i2c_destroy(intel_output->ddc_bus); drm_sysfs_connector_remove(connector); drm_connector_cleanup(connector); kfree((void const *)connector); return; } } static int intel_crt_get_modes(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; int tmp ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tmp = intel_ddc_get_modes(intel_output); return (tmp); } } static int intel_crt_set_property(struct drm_connector *connector , struct drm_property *property , uint64_t value ) { struct drm_device *dev ; { dev = connector->dev; if ((unsigned long )dev->mode_config.dpms_property == (unsigned long )property && (unsigned long )connector->encoder != (unsigned long )((struct drm_encoder *)0)) { intel_crt_dpms(connector->encoder, (int )value & 15); } else { } return (0); } } static struct drm_encoder_helper_funcs const intel_crt_helper_funcs = {& intel_crt_dpms, 0, 0, & intel_crt_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit, & intel_crt_mode_set, 0}; static struct drm_connector_funcs const intel_crt_connector_funcs = {0, 0, 0, & intel_crt_detect, & drm_helper_probe_single_connector_modes, & intel_crt_set_property, & intel_crt_destroy}; static struct drm_connector_helper_funcs const intel_crt_connector_helper_funcs = {& intel_crt_get_modes, & intel_crt_mode_valid, & intel_best_encoder}; static void intel_crt_enc_destroy(struct drm_encoder *encoder ) { { drm_encoder_cleanup(encoder); return; } } static struct drm_encoder_funcs const intel_crt_enc_funcs = {& intel_crt_enc_destroy}; void intel_crt_init(struct drm_device *dev ) { struct drm_connector *connector ; struct intel_output *intel_output ; void *tmp ; char const *tmp___0 ; char const *tmp___1 ; { tmp = kzalloc(1592UL, 208U); intel_output = (struct intel_output *)tmp; if ((unsigned long )intel_output == (unsigned long )((struct intel_output *)0)) { return; } else { } connector = & intel_output->base; drm_connector_init(dev, & intel_output->base, & intel_crt_connector_funcs, 1); drm_encoder_init(dev, & intel_output->enc, & intel_crt_enc_funcs, 1); drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc); intel_output->ddc_bus = intel_i2c_create(dev, 20496U, "CRTDDC_A"); if ((unsigned long )intel_output->ddc_bus == (unsigned long )((struct intel_i2c_chan *)0)) { tmp___0 = dev_name((struct device const *)(& (dev->pdev)->dev)); tmp___1 = dev_driver_string((struct device const *)(& (dev->pdev)->dev)); printk("<3>%s %s: DDC bus registration failed.\n", tmp___1, tmp___0); return; } else { } intel_output->type = 1; connector->interlace_allowed = 0; connector->doublescan_allowed = 0; drm_encoder_helper_add(& intel_output->enc, & intel_crt_helper_funcs); drm_connector_helper_add(connector, & intel_crt_connector_helper_funcs); drm_sysfs_connector_add(connector); return; } } void ldv_main10_sequence_infinite_withcheck_stateful(void) { struct drm_encoder *var_group1 ; int var_intel_crt_dpms_0_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_crt_mode_fixup_2_p2 ; struct drm_display_mode *var_intel_crt_mode_set_3_p2 ; struct drm_connector *var_group3 ; struct drm_property *var_group4 ; uint64_t var_intel_crt_set_property_9_p2 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25984; ldv_25983: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_crt_dpms(var_group1, var_intel_crt_dpms_0_p1); goto ldv_25973; case 1: ldv_handler_precall(); intel_crt_mode_fixup(var_group1, var_group2, var_intel_crt_mode_fixup_2_p2); goto ldv_25973; case 2: ldv_handler_precall(); intel_crt_mode_set(var_group1, var_group2, var_intel_crt_mode_set_3_p2); goto ldv_25973; case 3: ldv_handler_precall(); intel_crt_detect(var_group3); goto ldv_25973; case 4: ldv_handler_precall(); intel_crt_destroy(var_group3); goto ldv_25973; case 5: ldv_handler_precall(); intel_crt_set_property(var_group3, var_group4, var_intel_crt_set_property_9_p2); goto ldv_25973; case 6: ldv_handler_precall(); intel_crt_mode_valid(var_group3, var_group2); goto ldv_25973; case 7: ldv_handler_precall(); intel_crt_get_modes(var_group3); goto ldv_25973; case 8: ldv_handler_precall(); intel_crt_enc_destroy(var_group1); goto ldv_25973; default: ; goto ldv_25973; } ldv_25973: ; ldv_25984: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25983; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_381(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_382(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_383(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_384(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_385(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_386(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_387(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_388(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_389(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_390(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_391(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_392(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_393(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_394(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_395(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_396(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_397(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_398(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_417(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_420(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_422(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_425(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_426(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_429(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_431(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_433(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_418(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_421(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_423(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_424(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_427(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_428(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_430(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_432(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_434(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_419(spinlock_t *ldv_func_arg1 ) ; extern void drm_mode_probed_add(struct drm_connector * , struct drm_display_mode * ) ; extern struct drm_display_mode *drm_mode_duplicate(struct drm_device * , struct drm_display_mode * ) ; static void intel_lvds_set_backlight(struct drm_device *dev , int level ) { struct drm_i915_private *dev_priv ; u32 blc_pwm_ctl ; unsigned int tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = readl((void const volatile *)dev_priv->regs + 397908U); blc_pwm_ctl = tmp & 4294901760U; writel(blc_pwm_ctl | (u32 )level, (void volatile *)dev_priv->regs + 397908U); return; } } static u32 intel_lvds_get_max_backlight(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; unsigned int tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = readl((void const volatile *)dev_priv->regs + 397908U); return ((tmp >> 17) * 2U); } } static void intel_lvds_set_power(struct drm_device *dev , bool on ) { struct drm_i915_private *dev_priv ; u32 pp_status ; unsigned int tmp ; unsigned int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; if ((int )on) { tmp = readl((void const volatile *)dev_priv->regs + 397828U); writel(tmp | 1U, (void volatile *)dev_priv->regs + 397828U); ldv_25994: pp_status = readl((void const volatile *)dev_priv->regs + 397824U); if ((int )pp_status >= 0) { goto ldv_25994; } else { } intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle); } else { intel_lvds_set_backlight(dev, 0); tmp___0 = readl((void const volatile *)dev_priv->regs + 397828U); writel(tmp___0 & 4294967294U, (void volatile *)dev_priv->regs + 397828U); ldv_25996: pp_status = readl((void const volatile *)dev_priv->regs + 397824U); if ((int )pp_status < 0) { goto ldv_25996; } else { } } return; } } static void intel_lvds_dpms(struct drm_encoder *encoder , int mode ) { struct drm_device *dev ; { dev = encoder->dev; if (mode == 0) { intel_lvds_set_power(dev, 1); } else { intel_lvds_set_power(dev, 0); } return; } } static void intel_lvds_save(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 tmp ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; dev_priv->savePP_ON = readl((void const volatile *)dev_priv->regs + 397832U); dev_priv->savePP_OFF = readl((void const volatile *)dev_priv->regs + 397836U); dev_priv->savePP_CONTROL = readl((void const volatile *)dev_priv->regs + 397828U); dev_priv->savePP_DIVISOR = readl((void const volatile *)dev_priv->regs + 397840U); dev_priv->saveBLC_PWM_CTL = readl((void const volatile *)dev_priv->regs + 397908U); dev_priv->backlight_duty_cycle = (int )dev_priv->saveBLC_PWM_CTL & 65535; if (dev_priv->backlight_duty_cycle == 0) { tmp = intel_lvds_get_max_backlight(dev); dev_priv->backlight_duty_cycle = (int )tmp; } else { } return; } } static void intel_lvds_restore(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; writel(dev_priv->saveBLC_PWM_CTL, (void volatile *)dev_priv->regs + 397908U); writel(dev_priv->savePP_ON, (void volatile *)dev_priv->regs + 397832U); writel(dev_priv->savePP_OFF, (void volatile *)dev_priv->regs + 397836U); writel(dev_priv->savePP_DIVISOR, (void volatile *)dev_priv->regs + 397840U); writel(dev_priv->savePP_CONTROL, (void volatile *)dev_priv->regs + 397828U); if ((int )dev_priv->savePP_CONTROL & 1) { intel_lvds_set_power(dev, 1); } else { intel_lvds_set_power(dev, 0); } return; } } static int intel_lvds_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_display_mode *fixed_mode ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; fixed_mode = dev_priv->panel_fixed_mode; if ((unsigned long )fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { if (mode->hdisplay > fixed_mode->hdisplay) { return (29); } else { } if (mode->vdisplay > fixed_mode->vdisplay) { return (29); } else { } } else { } return (0); } } static bool intel_lvds_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct drm_encoder *tmp_encoder ; struct list_head const *__mptr___0 ; struct list_head const *__mptr___1 ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)encoder->crtc; intel_crtc = (struct intel_crtc *)__mptr; if ((((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810) && intel_crtc->pipe == 0) { printk("<3>Can\'t support LVDS on pipe A\n"); return (0); } else { } __mptr___0 = (struct list_head const *)dev->mode_config.encoder_list.next; tmp_encoder = (struct drm_encoder *)__mptr___0 + 0xfffffffffffffff8UL; goto ldv_26036; ldv_26035: ; if ((unsigned long )tmp_encoder != (unsigned long )encoder && (unsigned long )tmp_encoder->crtc == (unsigned long )encoder->crtc) { printk("<3>Can\'t enable LVDS and another encoder on the same pipe\n"); return (0); } else { } __mptr___1 = (struct list_head const *)tmp_encoder->head.next; tmp_encoder = (struct drm_encoder *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26036: __builtin_prefetch((void const *)tmp_encoder->head.next); if ((unsigned long )(& tmp_encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) { goto ldv_26035; } else { } if ((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { adjusted_mode->hdisplay = (dev_priv->panel_fixed_mode)->hdisplay; adjusted_mode->hsync_start = (dev_priv->panel_fixed_mode)->hsync_start; adjusted_mode->hsync_end = (dev_priv->panel_fixed_mode)->hsync_end; adjusted_mode->htotal = (dev_priv->panel_fixed_mode)->htotal; adjusted_mode->vdisplay = (dev_priv->panel_fixed_mode)->vdisplay; adjusted_mode->vsync_start = (dev_priv->panel_fixed_mode)->vsync_start; adjusted_mode->vsync_end = (dev_priv->panel_fixed_mode)->vsync_end; adjusted_mode->vtotal = (dev_priv->panel_fixed_mode)->vtotal; adjusted_mode->clock = (dev_priv->panel_fixed_mode)->clock; drm_mode_set_crtcinfo(adjusted_mode, 1); } else { } return (1); } } static void intel_lvds_prepare(struct drm_encoder *encoder ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; dev_priv->saveBLC_PWM_CTL = readl((void const volatile *)dev_priv->regs + 397908U); dev_priv->backlight_duty_cycle = (int )dev_priv->saveBLC_PWM_CTL & 65535; intel_lvds_set_power(dev, 0); return; } } static void intel_lvds_commit(struct drm_encoder *encoder ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 tmp ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; if (dev_priv->backlight_duty_cycle == 0) { tmp = intel_lvds_get_max_backlight(dev); dev_priv->backlight_duty_cycle = (int )tmp; } else { } intel_lvds_set_power(dev, 1); return; } } static void intel_lvds_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; u32 pfit_control ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)encoder->crtc; intel_crtc = (struct intel_crtc *)__mptr; if (mode->hdisplay != adjusted_mode->hdisplay || mode->vdisplay != adjusted_mode->vdisplay) { pfit_control = 2147485280U; } else { pfit_control = 0U; } if (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810) { if ((int )dev_priv->panel_wants_dither) { pfit_control = pfit_control | 8U; } else { pfit_control = (u32 )(intel_crtc->pipe << 29) | pfit_control; } } else { } writel(pfit_control, (void volatile *)dev_priv->regs + 397872U); return; } } static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector ) { { return (connector_status_connected); } } static int intel_lvds_get_modes(struct drm_connector *connector ) { struct drm_device *dev ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct drm_i915_private *dev_priv ; int ret ; struct drm_display_mode *mode ; { dev = connector->dev; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dev_priv = (struct drm_i915_private *)dev->dev_private; ret = 0; ret = intel_ddc_get_modes(intel_output); if (ret != 0) { return (ret); } else { } connector->display_info.min_vfreq = 0U; connector->display_info.max_vfreq = 200U; connector->display_info.min_hfreq = 0U; connector->display_info.max_hfreq = 200U; if ((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { mutex_unlock(& dev->mode_config.mutex); mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); drm_mode_probed_add(connector, mode); mutex_unlock(& dev->mode_config.mutex); return (1); } else { } return (0); } } static void intel_lvds_destroy(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; if ((unsigned long )intel_output->ddc_bus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(intel_output->ddc_bus); } else { } drm_sysfs_connector_remove(connector); drm_connector_cleanup(connector); kfree((void const *)connector); return; } } static struct drm_encoder_helper_funcs const intel_lvds_helper_funcs = {& intel_lvds_dpms, 0, 0, & intel_lvds_mode_fixup, & intel_lvds_prepare, & intel_lvds_commit, & intel_lvds_mode_set, 0}; static struct drm_connector_helper_funcs const intel_lvds_connector_helper_funcs = {& intel_lvds_get_modes, & intel_lvds_mode_valid, & intel_best_encoder}; static struct drm_connector_funcs const intel_lvds_connector_funcs = {0, & intel_lvds_save, & intel_lvds_restore, & intel_lvds_detect, & drm_helper_probe_single_connector_modes, 0, & intel_lvds_destroy}; static void intel_lvds_enc_destroy(struct drm_encoder *encoder ) { { drm_encoder_cleanup(encoder); return; } } static struct drm_encoder_funcs const intel_lvds_enc_funcs = {& intel_lvds_enc_destroy}; void intel_lvds_init(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector *connector ; struct drm_encoder *encoder ; struct drm_display_mode *scan ; struct drm_crtc *crtc ; u32 lvds ; int pipe ; void *tmp ; char const *tmp___0 ; char const *tmp___1 ; struct list_head const *__mptr ; struct list_head const *__mptr___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; tmp = kzalloc(1592UL, 208U); intel_output = (struct intel_output *)tmp; if ((unsigned long )intel_output == (unsigned long )((struct intel_output *)0)) { return; } else { } connector = & intel_output->base; encoder = & intel_output->enc; drm_connector_init(dev, & intel_output->base, & intel_lvds_connector_funcs, 7); drm_encoder_init(dev, & intel_output->enc, & intel_lvds_enc_funcs, 3); drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc); intel_output->type = 4; drm_encoder_helper_add(encoder, & intel_lvds_helper_funcs); drm_connector_helper_add(connector, & intel_lvds_connector_helper_funcs); connector->display_info.subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = 0; connector->doublescan_allowed = 0; intel_output->ddc_bus = intel_i2c_create(dev, 20504U, "LVDSDDC_C"); if ((unsigned long )intel_output->ddc_bus == (unsigned long )((struct intel_i2c_chan *)0)) { tmp___0 = dev_name((struct device const *)(& (dev->pdev)->dev)); tmp___1 = dev_driver_string((struct device const *)(& (dev->pdev)->dev)); printk("<3>%s %s: DDC bus registration failed.\n", tmp___1, tmp___0); goto failed; } else { } intel_ddc_get_modes(intel_output); __mptr = (struct list_head const *)connector->probed_modes.next; scan = (struct drm_display_mode *)__mptr; goto ldv_26103; ldv_26102: mutex_lock_nested(& dev->mode_config.mutex, 0U); if ((scan->type & 8) != 0) { dev_priv->panel_fixed_mode = drm_mode_duplicate(dev, scan); mutex_unlock(& dev->mode_config.mutex); goto out; } else { } mutex_unlock(& dev->mode_config.mutex); __mptr___0 = (struct list_head const *)scan->head.next; scan = (struct drm_display_mode *)__mptr___0; ldv_26103: __builtin_prefetch((void const *)scan->head.next); if ((unsigned long )(& scan->head) != (unsigned long )(& connector->probed_modes)) { goto ldv_26102; } else { } if ((unsigned long )dev_priv->vbt_mode != (unsigned long )((struct drm_display_mode *)0)) { mutex_lock_nested(& dev->mode_config.mutex, 0U); dev_priv->panel_fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt_mode); mutex_unlock(& dev->mode_config.mutex); } else { } lvds = readl((void const volatile *)dev_priv->regs + 397696U); pipe = (lvds & 1073741824U) != 0U; crtc = intel_get_crtc_from_pipe(dev, pipe); if ((unsigned long )crtc != (unsigned long )((struct drm_crtc *)0) && (int )lvds < 0) { dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc); if ((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { (dev_priv->panel_fixed_mode)->type = (dev_priv->panel_fixed_mode)->type | 8; goto out; } else { } } else { } if ((unsigned long )dev_priv->panel_fixed_mode == (unsigned long )((struct drm_display_mode *)0)) { goto failed; } else { } if (dev->pci_device == 10146 || dev->pci_device == 10158) { if ((unsigned int )(dev->pdev)->subsystem_vendor == 41120U) { goto failed; } else { } if ((unsigned int )(dev->pdev)->subsystem_vendor == 32902U && (unsigned int )(dev->pdev)->subsystem_device == 29296U) { if (((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0) && (dev_priv->panel_fixed_mode)->hdisplay == 800) && (dev_priv->panel_fixed_mode)->vdisplay == 600) { if (drm_debug != 0U) { printk("<7>[drm:%s] Suspected Mac Mini, ignoring the LVDS\n", "intel_lvds_init"); } else { } goto failed; } else { } } else { } } else { } out: drm_sysfs_connector_add(connector); return; failed: ; if (drm_debug != 0U) { printk("<7>[drm:%s] No LVDS modes found, disabling.\n", "intel_lvds_init"); } else { } if ((unsigned long )intel_output->ddc_bus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(intel_output->ddc_bus); } else { } drm_connector_cleanup(connector); kfree((void const *)connector); return; } } void ldv_main11_sequence_infinite_withcheck_stateful(void) { struct drm_encoder *var_group1 ; int var_intel_lvds_dpms_3_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_lvds_mode_fixup_7_p2 ; struct drm_display_mode *var_intel_lvds_mode_set_10_p2 ; struct drm_connector *var_group3 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26143; ldv_26142: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_lvds_dpms(var_group1, var_intel_lvds_dpms_3_p1); goto ldv_26129; case 1: ldv_handler_precall(); intel_lvds_mode_fixup(var_group1, var_group2, var_intel_lvds_mode_fixup_7_p2); goto ldv_26129; case 2: ldv_handler_precall(); intel_lvds_prepare(var_group1); goto ldv_26129; case 3: ldv_handler_precall(); intel_lvds_mode_set(var_group1, var_group2, var_intel_lvds_mode_set_10_p2); goto ldv_26129; case 4: ldv_handler_precall(); intel_lvds_commit(var_group1); goto ldv_26129; case 5: ldv_handler_precall(); intel_lvds_get_modes(var_group3); goto ldv_26129; case 6: ldv_handler_precall(); intel_lvds_mode_valid(var_group3, var_group2); goto ldv_26129; case 7: ldv_handler_precall(); intel_lvds_save(var_group3); goto ldv_26129; case 8: ldv_handler_precall(); intel_lvds_restore(var_group3); goto ldv_26129; case 9: ldv_handler_precall(); intel_lvds_detect(var_group3); goto ldv_26129; case 10: ldv_handler_precall(); intel_lvds_destroy(var_group3); goto ldv_26129; case 11: ldv_handler_precall(); intel_lvds_enc_destroy(var_group1); goto ldv_26129; default: ; goto ldv_26129; } ldv_26129: ; ldv_26143: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26142; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_417(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_418(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_419(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_420(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_421(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_422(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_423(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_424(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_425(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_426(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_427(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_428(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_429(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_430(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_431(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_432(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_433(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_434(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } extern int memcmp(void const * , void const * , size_t ) ; void ldv___ldv_spin_lock_453(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_456(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_457(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_460(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_462(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_464(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_466(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_468(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_454(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_458(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_459(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_461(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_463(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_465(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_467(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_469(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_470(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_455(spinlock_t *ldv_func_arg1 ) ; extern void *pci_map_rom(struct pci_dev * , size_t * ) ; extern void pci_unmap_rom(struct pci_dev * , void * ) ; static void *find_section(struct bdb_header *bdb , int section_id ) { u8 *base ; int index ; u16 total ; u16 current_size ; u8 current_id ; { base = (u8 *)bdb; index = 0; index = (int )bdb->header_size + index; total = bdb->bdb_size; goto ldv_25656; ldv_25655: current_id = *(base + (unsigned long )index); index = index + 1; current_size = *((u16 *)base + (unsigned long )index); index = index + 2; if ((int )current_id == section_id) { return ((void *)base + (unsigned long )index); } else { } index = (int )current_size + index; ldv_25656: ; if ((int )total > index) { goto ldv_25655; } else { } return (0); } } static void parse_panel_data(struct drm_i915_private *dev_priv , struct bdb_header *bdb ) { struct bdb_lvds_options *lvds_options ; struct bdb_lvds_lfp_data *lvds_lfp_data ; struct bdb_lvds_lfp_data_entry *entry ; struct lvds_dvo_timing *dvo_timing ; struct drm_display_mode *panel_fixed_mode ; void *tmp ; void *tmp___0 ; void *tmp___1 ; { dev_priv->lvds_dither = 0U; dev_priv->lvds_vbt = 0U; tmp = find_section(bdb, 40); lvds_options = (struct bdb_lvds_options *)tmp; if ((unsigned long )lvds_options == (unsigned long )((struct bdb_lvds_options *)0)) { return; } else { } dev_priv->lvds_dither = lvds_options->pixel_dither; if ((unsigned int )lvds_options->panel_type == 255U) { return; } else { } tmp___0 = find_section(bdb, 42); lvds_lfp_data = (struct bdb_lvds_lfp_data *)tmp___0; if ((unsigned long )lvds_lfp_data == (unsigned long )((struct bdb_lvds_lfp_data *)0)) { return; } else { } dev_priv->lvds_vbt = 1U; entry = (struct bdb_lvds_lfp_data_entry *)(& lvds_lfp_data->data) + (unsigned long )lvds_options->panel_type; dvo_timing = & entry->dvo_timing; tmp___1 = drm_calloc(1UL, 224UL, 2); panel_fixed_mode = (struct drm_display_mode *)tmp___1; panel_fixed_mode->hdisplay = ((int )dvo_timing->hactive_hi << 8) | (int )dvo_timing->hactive_lo; panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + (((int )dvo_timing->hsync_off_hi << 8) | (int )dvo_timing->hsync_off_lo); panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + (int )dvo_timing->hsync_pulse_width; panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + (((int )dvo_timing->hblank_hi << 8) | (int )dvo_timing->hblank_lo); panel_fixed_mode->vdisplay = ((int )dvo_timing->vactive_hi << 8) | (int )dvo_timing->vactive_lo; panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + (int )dvo_timing->vsync_off; panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + (int )dvo_timing->vsync_pulse_width; panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + (((int )dvo_timing->vblank_hi << 8) | (int )dvo_timing->vblank_lo); panel_fixed_mode->clock = (int )dvo_timing->clock * 10; panel_fixed_mode->type = 8; drm_mode_set_name(panel_fixed_mode); dev_priv->vbt_mode = panel_fixed_mode; if (drm_debug != 0U) { printk("<7>[drm:%s] Found panel mode in BIOS VBT tables:\n", "parse_panel_data"); } else { } drm_mode_debug_printmodeline(panel_fixed_mode); return; } } static void parse_general_features(struct drm_i915_private *dev_priv , struct bdb_header *bdb ) { struct bdb_general_features *general ; void *tmp ; { dev_priv->int_tv_support = 1U; dev_priv->int_crt_support = 1U; tmp = find_section(bdb, 1); general = (struct bdb_general_features *)tmp; if ((unsigned long )general != (unsigned long )((struct bdb_general_features *)0)) { dev_priv->int_tv_support = general->int_tv_support; dev_priv->int_crt_support = general->int_crt_support; } else { } return; } } bool intel_init_bios(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct pci_dev *pdev ; struct vbt_header *vbt ; struct bdb_header *bdb ; u8 *bios ; size_t size ; int i ; void *tmp ; int tmp___0 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; pdev = dev->pdev; vbt = 0; tmp = pci_map_rom(pdev, & size); bios = (u8 *)tmp; if ((unsigned long )bios == (unsigned long )((u8 *)0)) { return (1); } else { } i = 0; goto ldv_25685; ldv_25684: tmp___0 = memcmp((void const *)bios + (unsigned long )i, (void const *)"$VBT", 4UL); if (tmp___0 == 0) { vbt = (struct vbt_header *)bios + (unsigned long )i; goto ldv_25683; } else { } i = i + 1; ldv_25685: ; if ((size_t )(i + 4) < size) { goto ldv_25684; } else { } ldv_25683: ; if ((unsigned long )vbt == (unsigned long )((struct vbt_header *)0)) { printk("<3>[drm:%s] *ERROR* VBT signature missing\n", "intel_init_bios"); pci_unmap_rom(pdev, (void *)bios); return (1); } else { } bdb = (struct bdb_header *)(bios + ((unsigned long )i + (unsigned long )vbt->bdb_offset)); parse_general_features(dev_priv, bdb); parse_panel_data(dev_priv, bdb); pci_unmap_rom(pdev, (void *)bios); return (0); } } void ldv___ldv_spin_lock_453(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_454(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_455(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_456(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_457(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_458(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_459(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_460(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_461(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_462(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_463(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_464(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_465(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_466(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_467(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_468(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_469(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_470(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void *memcpy(void * , void const * , unsigned long ) ; extern void *memcpy(void * , void const * , size_t ) ; void ldv___ldv_spin_lock_489(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_492(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_494(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_497(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_498(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_501(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_503(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_505(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_490(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_493(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_495(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_496(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_499(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_500(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_502(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_504(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_506(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_491(spinlock_t *ldv_func_arg1 ) ; extern int i2c_transfer(struct i2c_adapter * , struct i2c_msg * , int ) ; struct drm_connector *intel_sdvo_find(struct drm_device *dev , int sdvoB ) ; int intel_sdvo_supports_hotplug(struct drm_connector *connector ) ; void intel_sdvo_set_hotplug(struct drm_connector *connector , int on ) ; static void intel_sdvo_write_sdvox(struct intel_output *intel_output , u32 val ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_sdvo_priv *sdvo_priv ; u32 bval ; u32 cval ; int i ; { dev = intel_output->base.dev; dev_priv = (struct drm_i915_private *)dev->dev_private; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; bval = val; cval = val; if (sdvo_priv->output_device == 397632) { cval = readl((void const volatile *)dev_priv->regs + 397664U); } else { bval = readl((void const volatile *)dev_priv->regs + 397632U); } i = 0; goto ldv_25935; ldv_25934: writel(bval, (void volatile *)dev_priv->regs + 397632U); readl((void const volatile *)dev_priv->regs + 397632U); writel(cval, (void volatile *)dev_priv->regs + 397664U); readl((void const volatile *)dev_priv->regs + 397664U); i = i + 1; ldv_25935: ; if (i <= 1) { goto ldv_25934; } else { } return; } } static bool intel_sdvo_read_byte(struct intel_output *intel_output , u8 addr , u8 *ch ) { struct intel_sdvo_priv *sdvo_priv ; u8 out_buf[2U] ; u8 buf[2U] ; int ret ; struct i2c_msg msgs[2U] ; { sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; msgs[0].addr = (unsigned short )(sdvo_priv->i2c_bus)->slave_addr; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = (unsigned short )(sdvo_priv->i2c_bus)->slave_addr; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& buf); out_buf[0] = addr; out_buf[1] = 0U; ret = i2c_transfer(& (sdvo_priv->i2c_bus)->adapter, (struct i2c_msg *)(& msgs), 2); if (ret == 2) { *ch = buf[0]; return (1); } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] i2c transfer returned %d\n", "intel_sdvo_read_byte", ret); } else { } return (0); } } static bool intel_sdvo_write_byte(struct intel_output *intel_output , int addr , u8 ch ) { u8 out_buf[2U] ; struct i2c_msg msgs[1U] ; int tmp ; { msgs[0].addr = (unsigned short )(intel_output->i2c_bus)->slave_addr; msgs[0].flags = 0U; msgs[0].len = 2U; msgs[0].buf = (__u8 *)(& out_buf); out_buf[0] = (u8 )addr; out_buf[1] = ch; tmp = i2c_transfer(& (intel_output->i2c_bus)->adapter, (struct i2c_msg *)(& msgs), 1); if (tmp == 1) { return (1); } else { } return (0); } } static void intel_sdvo_write_cmd(struct intel_output *intel_output , u8 cmd , void *args , int args_len ) { int i ; { i = 0; goto ldv_25967; ldv_25966: intel_sdvo_write_byte(intel_output, 7 - i, (int )*((u8 *)args + (unsigned long )i)); i = i + 1; ldv_25967: ; if (i < args_len) { goto ldv_25966; } else { } intel_sdvo_write_byte(intel_output, 8, (int )cmd); return; } } static u8 intel_sdvo_read_response(struct intel_output *intel_output , void *response , int response_len ) { int i ; u8 status ; u8 retry ; unsigned long __ms ; unsigned long tmp ; u8 tmp___0 ; { retry = 50U; goto ldv_25985; ldv_25984: i = 0; goto ldv_25978; ldv_25977: intel_sdvo_read_byte(intel_output, (int )((unsigned int )((u8 )i) + 10U), (u8 *)response + (unsigned long )i); i = i + 1; ldv_25978: ; if (i < response_len) { goto ldv_25977; } else { } intel_sdvo_read_byte(intel_output, 9, & status); if ((unsigned int )status != 4U) { return (status); } else { } __ms = 50UL; goto ldv_25982; ldv_25981: __const_udelay(4295000UL); ldv_25982: tmp = __ms; __ms = __ms - 1UL; if (tmp != 0UL) { goto ldv_25981; } else { } ldv_25985: tmp___0 = retry; retry = (u8 )((int )retry - 1); if ((unsigned int )tmp___0 != 0U) { goto ldv_25984; } else { } return (status); } } static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode ) { { if (mode->clock > 99999) { return (1); } else if (mode->clock > 49999) { return (2); } else { return (4); } } } static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output , u8 target ) { { intel_sdvo_write_cmd(intel_output, 122, (void *)(& target), 1); return; } } static bool intel_sdvo_set_target_input(struct intel_output *intel_output , bool target_0 , bool target_1 ) { struct intel_sdvo_set_target_input_args targets ; u8 status ; { targets.target_1 = 0U; targets.pad = (unsigned char)0; if ((int )target_0 && (int )target_1) { return (1); } else { } if ((int )target_1) { targets.target_1 = 1U; } else { } intel_sdvo_write_cmd(intel_output, 16, (void *)(& targets), 1); status = intel_sdvo_read_response(intel_output, 0, 0); return ((unsigned int )status == 1U); } } static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output , bool *input_1 , bool *input_2 ) { struct intel_sdvo_get_trained_inputs_response response ; u8 status ; { intel_sdvo_write_cmd(intel_output, 3, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& response), 1); if ((unsigned int )status != 1U) { return (0); } else { } *input_1 = (int )response.input0_trained != 0; *input_2 = (int )response.input1_trained != 0; return (1); } } static bool intel_sdvo_get_active_outputs(struct intel_output *intel_output , u16 *outputs ) { u8 status ; { intel_sdvo_write_cmd(intel_output, 4, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)outputs, 2); return ((unsigned int )status == 1U); } } static bool intel_sdvo_set_active_outputs(struct intel_output *intel_output , u16 outputs ) { u8 status ; { intel_sdvo_write_cmd(intel_output, 5, (void *)(& outputs), 2); status = intel_sdvo_read_response(intel_output, 0, 0); return ((unsigned int )status == 1U); } } static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_output , int *clock_min , int *clock_max ) { struct intel_sdvo_pixel_clock_range clocks ; u8 status ; { intel_sdvo_write_cmd(intel_output, 29, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& clocks), 4); if ((unsigned int )status != 1U) { return (0); } else { } *clock_min = (int )clocks.min * 10; *clock_max = (int )clocks.max * 10; return (1); } } static bool intel_sdvo_set_target_output(struct intel_output *intel_output , u16 outputs ) { u8 status ; { intel_sdvo_write_cmd(intel_output, 17, (void *)(& outputs), 2); status = intel_sdvo_read_response(intel_output, 0, 0); return ((unsigned int )status == 1U); } } static bool intel_sdvo_get_timing(struct intel_output *intel_output , u8 cmd , struct intel_sdvo_dtd *dtd ) { u8 status ; { intel_sdvo_write_cmd(intel_output, (int )cmd, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& dtd->part1), 8); if ((unsigned int )status != 1U) { return (0); } else { } intel_sdvo_write_cmd(intel_output, (int )((unsigned int )cmd + 1U), 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& dtd->part2), 8); if ((unsigned int )status != 1U) { return (0); } else { } return (1); } } static bool intel_sdvo_get_input_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd ) { bool tmp ; { tmp = intel_sdvo_get_timing(intel_output, 18, dtd); return (tmp); } } static bool intel_sdvo_get_output_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd ) { bool tmp ; { tmp = intel_sdvo_get_timing(intel_output, 24, dtd); return (tmp); } } static bool intel_sdvo_set_timing(struct intel_output *intel_output , u8 cmd , struct intel_sdvo_dtd *dtd ) { u8 status ; { intel_sdvo_write_cmd(intel_output, (int )cmd, (void *)(& dtd->part1), 8); status = intel_sdvo_read_response(intel_output, 0, 0); if ((unsigned int )status != 1U) { return (0); } else { } intel_sdvo_write_cmd(intel_output, (int )((unsigned int )cmd + 1U), (void *)(& dtd->part2), 8); status = intel_sdvo_read_response(intel_output, 0, 0); if ((unsigned int )status != 1U) { return (0); } else { } return (1); } } static bool intel_sdvo_set_input_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd ) { bool tmp ; { tmp = intel_sdvo_set_timing(intel_output, 20, dtd); return (tmp); } } static bool intel_sdvo_set_output_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd ) { bool tmp ; { tmp = intel_sdvo_set_timing(intel_output, 22, dtd); return (tmp); } } static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output ) { u8 response ; u8 status ; { intel_sdvo_write_cmd(intel_output, 32, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& response), 1); if ((unsigned int )status != 1U) { if (drm_debug != 0U) { printk("<7>[drm:%s] Couldn\'t get SDVO clock rate multiplier\n", "intel_sdvo_get_clock_rate_mult"); } else { } return (1); } else if (drm_debug != 0U) { printk("<7>[drm:%s] Current clock rate multiplier: %d\n", "intel_sdvo_get_clock_rate_mult", (int )response); } else { } return ((int )response); } } static bool intel_sdvo_set_clock_rate_mult(struct intel_output *intel_output , u8 val ) { u8 status ; { intel_sdvo_write_cmd(intel_output, 33, (void *)(& val), 1); status = intel_sdvo_read_response(intel_output, 0, 0); if ((unsigned int )status != 1U) { return (0); } else { } return (1); } } static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { int tmp ; { tmp = intel_sdvo_get_pixel_multiplier(mode); adjusted_mode->clock = adjusted_mode->clock * tmp; return (1); } } static void intel_sdvo_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_crtc *crtc ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct intel_output *intel_output ; struct drm_encoder const *__mptr___0 ; struct intel_sdvo_priv *sdvo_priv ; u16 width ; u16 height ; u16 h_blank_len ; u16 h_sync_len ; u16 v_blank_len ; u16 v_sync_len ; u16 h_sync_offset ; u16 v_sync_offset ; u32 sdvox ; struct intel_sdvo_dtd output_dtd ; int sdvo_pixel_multiply ; int tmp ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; crtc = encoder->crtc; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; __mptr___0 = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr___0 + 0xfffffffffffffa38UL; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; if ((unsigned long )mode == (unsigned long )((struct drm_display_mode *)0)) { return; } else { } width = (u16 )mode->crtc_hdisplay; height = (u16 )mode->crtc_vdisplay; h_blank_len = (int )((u16 )mode->crtc_hblank_end) - (int )((u16 )mode->crtc_hblank_start); h_sync_len = (int )((u16 )mode->crtc_hsync_end) - (int )((u16 )mode->crtc_hsync_start); v_blank_len = (int )((u16 )mode->crtc_vblank_end) - (int )((u16 )mode->crtc_vblank_start); v_sync_len = (int )((u16 )mode->crtc_vsync_end) - (int )((u16 )mode->crtc_vsync_start); h_sync_offset = (int )((u16 )mode->crtc_hsync_start) - (int )((u16 )mode->crtc_hblank_start); v_sync_offset = (int )((u16 )mode->crtc_vsync_start) - (int )((u16 )mode->crtc_vblank_start); output_dtd.part1.clock = (u16 )(mode->clock / 10); output_dtd.part1.h_active = (u8 )width; output_dtd.part1.h_blank = (u8 )h_blank_len; output_dtd.part1.h_high = (u8 )((int )((signed char )(((int )width >> 8) << 4)) | ((int )((signed char )((int )h_blank_len >> 8)) & 15)); output_dtd.part1.v_active = (u8 )height; output_dtd.part1.v_blank = (u8 )v_blank_len; output_dtd.part1.v_high = (u8 )((int )((signed char )(((int )height >> 8) << 4)) | ((int )((signed char )((int )v_blank_len >> 8)) & 15)); output_dtd.part2.h_sync_off = (u8 )h_sync_offset; output_dtd.part2.h_sync_width = (u8 )h_sync_len; output_dtd.part2.v_sync_off_width = (u8 )((int )((signed char )((int )v_sync_offset << 4)) | ((int )((signed char )v_sync_len) & 15)); output_dtd.part2.sync_off_width_high = (u8 )((((int )((signed char )(((int )h_sync_offset & 768) >> 2)) | (int )((signed char )(((int )h_sync_len & 768) >> 4))) | (int )((signed char )(((int )v_sync_offset & 48) >> 2))) | (int )((signed char )(((int )v_sync_len & 48) >> 4))); output_dtd.part2.dtd_flags = 24U; if ((int )mode->flags & 1) { output_dtd.part2.dtd_flags = (u8 )((unsigned int )output_dtd.part2.dtd_flags | 2U); } else { } if ((mode->flags & 4U) != 0U) { output_dtd.part2.dtd_flags = (u8 )((unsigned int )output_dtd.part2.dtd_flags | 4U); } else { } output_dtd.part2.sdvo_flags = 0U; output_dtd.part2.v_sync_off_high = (unsigned int )((u8 )v_sync_offset) & 192U; output_dtd.part2.reserved = 0U; intel_sdvo_set_target_output(intel_output, (int )sdvo_priv->active_outputs); intel_sdvo_set_output_timing(intel_output, & output_dtd); intel_sdvo_set_target_input(intel_output, 1, 0); intel_sdvo_set_input_timing(intel_output, & output_dtd); tmp = intel_sdvo_get_pixel_multiplier(mode); switch (tmp) { case 1: intel_sdvo_set_clock_rate_mult(intel_output, 1); goto ldv_26112; case 2: intel_sdvo_set_clock_rate_mult(intel_output, 2); goto ldv_26112; case 4: intel_sdvo_set_clock_rate_mult(intel_output, 8); goto ldv_26112; } ldv_26112: sdvox = readl((void const volatile *)dev_priv->regs + (unsigned long )sdvo_priv->output_device); switch (sdvo_priv->output_device) { case 397632: sdvox = sdvox & 67321856U; goto ldv_26116; case 397664: sdvox = sdvox & 67239936U; goto ldv_26116; } ldv_26116: sdvox = sdvox | 4718720U; if (intel_crtc->pipe == 1) { sdvox = sdvox | 1073741824U; } else { } sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode); if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) { } else if (dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) { } else { sdvox = (u32 )((sdvo_pixel_multiply + -1) << 23) | sdvox; } intel_sdvo_write_sdvox(intel_output, sdvox); return; } } static void intel_sdvo_dpms(struct drm_encoder *encoder , int mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_encoder const *__mptr ; struct intel_sdvo_priv *sdvo_priv ; u32 temp ; bool input1 ; bool input2 ; int i ; u8 status ; bool tmp ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr + 0xfffffffffffffa38UL; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; if (mode != 0) { intel_sdvo_set_active_outputs(intel_output, 0); if (mode == 3) { temp = readl((void const volatile *)dev_priv->regs + (unsigned long )sdvo_priv->output_device); if ((int )temp < 0) { intel_sdvo_write_sdvox(intel_output, temp & 2147483647U); } else { } } else { } } else { temp = readl((void const volatile *)dev_priv->regs + (unsigned long )sdvo_priv->output_device); if ((int )temp >= 0) { intel_sdvo_write_sdvox(intel_output, temp | 2147483648U); } else { } i = 0; goto ldv_26134; ldv_26133: intel_wait_for_vblank(dev); i = i + 1; ldv_26134: ; if (i <= 1) { goto ldv_26133; } else { } tmp = intel_sdvo_get_trained_inputs(intel_output, & input1, & input2); status = (u8 )tmp; if ((unsigned int )status == 1U && ! input1) { if (drm_debug != 0U) { printk("<7>[drm:%s] First %s output reported failure to sync\n", "intel_sdvo_dpms", sdvo_priv->output_device == 397632 ? (char *)"SDVOB" : (char *)"SDVOC"); } else { } } else { } intel_sdvo_set_active_outputs(intel_output, (int )sdvo_priv->active_outputs); } return; } } static void intel_sdvo_save(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_sdvo_priv *sdvo_priv ; int o ; u16 this_output ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_output); intel_sdvo_get_active_outputs(intel_output, & sdvo_priv->save_active_outputs); if ((int )sdvo_priv->caps.sdvo_inputs_mask & 1) { intel_sdvo_set_target_input(intel_output, 1, 0); intel_sdvo_get_input_timing(intel_output, & sdvo_priv->save_input_dtd_1); } else { } if (((int )sdvo_priv->caps.sdvo_inputs_mask & 2) != 0) { intel_sdvo_set_target_input(intel_output, 0, 1); intel_sdvo_get_input_timing(intel_output, & sdvo_priv->save_input_dtd_2); } else { } o = 0; goto ldv_26149; ldv_26148: this_output = (u16 )(1 << o); if ((unsigned int )((int )sdvo_priv->caps.output_flags & (int )this_output) != 0U) { intel_sdvo_set_target_output(intel_output, (int )this_output); intel_sdvo_get_output_timing(intel_output, (struct intel_sdvo_dtd *)(& sdvo_priv->save_output_dtd) + (unsigned long )o); } else { } o = o + 1; ldv_26149: ; if (o <= 14) { goto ldv_26148; } else { } sdvo_priv->save_SDVOX = readl((void const volatile *)dev_priv->regs + (unsigned long )sdvo_priv->output_device); return; } } static void intel_sdvo_restore(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_sdvo_priv *sdvo_priv ; int o ; int i ; bool input1 ; bool input2 ; u8 status ; u16 this_output ; bool tmp ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; intel_sdvo_set_active_outputs(intel_output, 0); o = 0; goto ldv_26167; ldv_26166: this_output = (u16 )(1 << o); if ((unsigned int )((int )sdvo_priv->caps.output_flags & (int )this_output) != 0U) { intel_sdvo_set_target_output(intel_output, (int )this_output); intel_sdvo_set_output_timing(intel_output, (struct intel_sdvo_dtd *)(& sdvo_priv->save_output_dtd) + (unsigned long )o); } else { } o = o + 1; ldv_26167: ; if (o <= 14) { goto ldv_26166; } else { } if ((int )sdvo_priv->caps.sdvo_inputs_mask & 1) { intel_sdvo_set_target_input(intel_output, 1, 0); intel_sdvo_set_input_timing(intel_output, & sdvo_priv->save_input_dtd_1); } else { } if (((int )sdvo_priv->caps.sdvo_inputs_mask & 2) != 0) { intel_sdvo_set_target_input(intel_output, 0, 1); intel_sdvo_set_input_timing(intel_output, & sdvo_priv->save_input_dtd_2); } else { } intel_sdvo_set_clock_rate_mult(intel_output, (int )((u8 )sdvo_priv->save_sdvo_mult)); writel(sdvo_priv->save_SDVOX, (void volatile *)dev_priv->regs + (unsigned long )sdvo_priv->output_device); if ((int )sdvo_priv->save_SDVOX < 0) { i = 0; goto ldv_26170; ldv_26169: intel_wait_for_vblank(dev); i = i + 1; ldv_26170: ; if (i <= 1) { goto ldv_26169; } else { } tmp = intel_sdvo_get_trained_inputs(intel_output, & input1, & input2); status = (u8 )tmp; if ((unsigned int )status == 1U && ! input1) { if (drm_debug != 0U) { printk("<7>[drm:%s] First %s output reported failure to sync\n", "intel_sdvo_restore", sdvo_priv->output_device == 397632 ? (char *)"SDVOB" : (char *)"SDVOC"); } else { } } else { } } else { } intel_sdvo_set_active_outputs(intel_output, (int )sdvo_priv->save_active_outputs); return; } } static int intel_sdvo_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_sdvo_priv *sdvo_priv ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; sdvo_priv = (struct intel_sdvo_priv *)intel_output->dev_priv; if ((mode->flags & 32U) != 0U) { return (8); } else { } if (sdvo_priv->pixel_clock_min > mode->clock) { return (16); } else { } if (sdvo_priv->pixel_clock_max < mode->clock) { return (15); } else { } return (0); } } static bool intel_sdvo_get_capabilities(struct intel_output *intel_output , struct intel_sdvo_caps *caps ) { u8 status ; { intel_sdvo_write_cmd(intel_output, 2, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)caps, 8); if ((unsigned int )status != 1U) { return (0); } else { } return (1); } } struct drm_connector *intel_sdvo_find(struct drm_device *dev , int sdvoB ) { struct drm_connector *connector ; struct intel_output *iout ; struct intel_sdvo_priv *sdvo ; struct list_head const *__mptr ; struct drm_connector const *__mptr___0 ; struct list_head const *__mptr___1 ; { connector = 0; iout = 0; __mptr = (struct list_head const *)dev->mode_config.connector_list.next; connector = (struct drm_connector *)__mptr + 0xfffffffffffffc18UL; goto ldv_26201; ldv_26200: __mptr___0 = (struct drm_connector const *)connector; iout = (struct intel_output *)__mptr___0; if (iout->type != 3) { goto ldv_26199; } else { } sdvo = (struct intel_sdvo_priv *)iout->dev_priv; if (sdvo->output_device == 397632 && sdvoB != 0) { return (connector); } else { } if (sdvo->output_device == 397664 && sdvoB == 0) { return (connector); } else { } ldv_26199: __mptr___1 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___1 + 0xfffffffffffffc18UL; ldv_26201: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) { goto ldv_26200; } else { } return (0); } } int intel_sdvo_supports_hotplug(struct drm_connector *connector ) { u8 response[2U] ; u8 status ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; { if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "intel_sdvo_supports_hotplug"); } else { } if ((unsigned long )connector == (unsigned long )((struct drm_connector *)0)) { return (0); } else { } __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; intel_sdvo_write_cmd(intel_output, 12, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& response), 2); if ((unsigned int )response[0] != 0U) { return (1); } else { } return (0); } } void intel_sdvo_set_hotplug(struct drm_connector *connector , int on ) { u8 response[2U] ; u8 status ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; intel_sdvo_write_cmd(intel_output, 14, 0, 0); intel_sdvo_read_response(intel_output, (void *)(& response), 2); if (on != 0) { intel_sdvo_write_cmd(intel_output, 12, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& response), 2); intel_sdvo_write_cmd(intel_output, 13, (void *)(& response), 2); } else { response[0] = 0U; response[1] = 0U; intel_sdvo_write_cmd(intel_output, 13, (void *)(& response), 2); } intel_sdvo_write_cmd(intel_output, 14, 0, 0); intel_sdvo_read_response(intel_output, (void *)(& response), 2); return; } } static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector ) { u8 response[2U] ; u8 status ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; intel_sdvo_write_cmd(intel_output, 11, 0, 0); status = intel_sdvo_read_response(intel_output, (void *)(& response), 2); if (drm_debug != 0U) { printk("<7>[drm:%s] SDVO response %d %d\n", "intel_sdvo_detect", (int )response[0], (int )response[1]); } else { } if ((unsigned int )response[0] != 0U || (unsigned int )response[1] != 0U) { return (connector_status_connected); } else { return (connector_status_disconnected); } } } static int intel_sdvo_get_modes(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; int tmp ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; intel_sdvo_set_control_bus_switch(intel_output, 2); intel_ddc_get_modes(intel_output); tmp = list_empty((struct list_head const *)(& connector->probed_modes)); if (tmp != 0) { return (0); } else { } return (1); } } static void intel_sdvo_destroy(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; if ((unsigned long )intel_output->i2c_bus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(intel_output->i2c_bus); } else { } drm_sysfs_connector_remove(connector); drm_connector_cleanup(connector); kfree((void const *)intel_output); return; } } static struct drm_encoder_helper_funcs const intel_sdvo_helper_funcs = {& intel_sdvo_dpms, 0, 0, & intel_sdvo_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit, & intel_sdvo_mode_set, 0}; static struct drm_connector_funcs const intel_sdvo_connector_funcs = {0, & intel_sdvo_save, & intel_sdvo_restore, & intel_sdvo_detect, & drm_helper_probe_single_connector_modes, 0, & intel_sdvo_destroy}; static struct drm_connector_helper_funcs const intel_sdvo_connector_helper_funcs = {& intel_sdvo_get_modes, & intel_sdvo_mode_valid, & intel_best_encoder}; static void intel_sdvo_enc_destroy(struct drm_encoder *encoder ) { { drm_encoder_cleanup(encoder); return; } } static struct drm_encoder_funcs const intel_sdvo_enc_funcs = {& intel_sdvo_enc_destroy}; void intel_sdvo_init(struct drm_device *dev , int output_device ) { struct drm_connector *connector ; struct intel_output *intel_output ; struct intel_sdvo_priv *sdvo_priv ; struct intel_i2c_chan *i2cbus ; int connector_type ; u8 ch[64U] ; int i ; int encoder_type ; int output_id ; void *tmp ; bool tmp___0 ; int tmp___1 ; unsigned char bytes[2U] ; size_t __len ; void *__ret ; { i2cbus = 0; tmp = kcalloc(1928UL, 1UL, 208U); intel_output = (struct intel_output *)tmp; if ((unsigned long )intel_output == (unsigned long )((struct intel_output *)0)) { return; } else { } connector = & intel_output->base; drm_connector_init(dev, connector, & intel_sdvo_connector_funcs, 0); drm_connector_helper_add(connector, & intel_sdvo_connector_helper_funcs); sdvo_priv = (struct intel_sdvo_priv *)intel_output + 1U; intel_output->type = 3; connector->interlace_allowed = 0; connector->doublescan_allowed = 0; if (output_device == 397632) { i2cbus = intel_i2c_create(dev, 20512U, "SDVOCTRL_E for SDVOB"); } else { i2cbus = intel_i2c_create(dev, 20512U, "SDVOCTRL_E for SDVOC"); } if ((unsigned long )i2cbus == (unsigned long )((struct intel_i2c_chan *)0)) { goto err_connector; } else { } sdvo_priv->i2c_bus = i2cbus; if (output_device == 397632) { output_id = 1; (sdvo_priv->i2c_bus)->slave_addr = 56U; } else { output_id = 2; (sdvo_priv->i2c_bus)->slave_addr = 57U; } sdvo_priv->output_device = output_device; intel_output->i2c_bus = i2cbus; intel_output->dev_priv = (void *)sdvo_priv; i = 0; goto ldv_26266; ldv_26265: tmp___0 = intel_sdvo_read_byte(intel_output, (int )((u8 )i), (u8 *)(& ch) + (unsigned long )i); if (tmp___0) { tmp___1 = 0; } else { tmp___1 = 1; } if (tmp___1) { if (drm_debug != 0U) { printk("<7>[drm:%s] No SDVO device found on SDVO%c\n", "intel_sdvo_init", output_device == 397632 ? 66 : 67); } else { } goto err_i2c; } else { } i = i + 1; ldv_26266: ; if (i <= 63) { goto ldv_26265; } else { } intel_sdvo_get_capabilities(intel_output, & sdvo_priv->caps); memset((void *)(& sdvo_priv->active_outputs), 0, 2UL); if (((int )sdvo_priv->caps.output_flags & 2) != 0) { sdvo_priv->active_outputs = 2U; connector->display_info.subpixel_order = SubPixelHorizontalRGB; encoder_type = 1; connector_type = 1; } else if (((int )sdvo_priv->caps.output_flags & 512) != 0) { sdvo_priv->active_outputs = 512U; connector->display_info.subpixel_order = SubPixelHorizontalRGB; encoder_type = 1; connector_type = 1; } else if ((int )sdvo_priv->caps.output_flags & 1) { sdvo_priv->active_outputs = 1U; connector->display_info.subpixel_order = SubPixelHorizontalRGB; encoder_type = 2; connector_type = 3; } else if (((int )sdvo_priv->caps.output_flags & 256) != 0) { sdvo_priv->active_outputs = 256U; connector->display_info.subpixel_order = SubPixelHorizontalRGB; encoder_type = 2; connector_type = 3; } else { __len = 2UL; if (__len > 63UL) { __ret = memcpy((void *)(& bytes), (void const *)(& sdvo_priv->caps.output_flags), __len); } else { __ret = memcpy((void *)(& bytes), (void const *)(& sdvo_priv->caps.output_flags), __len); } if (drm_debug != 0U) { printk("<7>[drm:%s] %s: No active RGB or TMDS outputs (0x%02x%02x)\n", "intel_sdvo_init", sdvo_priv->output_device == 397632 ? (char *)"SDVOB" : (char *)"SDVOC", (int )bytes[0], (int )bytes[1]); } else { } goto err_i2c; } drm_encoder_init(dev, & intel_output->enc, & intel_sdvo_enc_funcs, encoder_type); drm_encoder_helper_add(& intel_output->enc, & intel_sdvo_helper_funcs); connector->connector_type = connector_type; drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc); drm_sysfs_connector_add(connector); intel_sdvo_set_target_input(intel_output, 1, 0); intel_sdvo_get_input_pixel_clock_range(intel_output, & sdvo_priv->pixel_clock_min, & sdvo_priv->pixel_clock_max); if (drm_debug != 0U) { printk("<7>[drm:%s] %s device VID/DID: %02X:%02X.%02X, clock range %dMHz - %dMHz, input 1: %c, input 2: %c, output 1: %c, output 2: %c\n", "intel_sdvo_init", sdvo_priv->output_device == 397632 ? (char *)"SDVOB" : (char *)"SDVOC", (int )sdvo_priv->caps.vendor_id, (int )sdvo_priv->caps.device_id, (int )sdvo_priv->caps.device_rev_id, sdvo_priv->pixel_clock_min / 1000, sdvo_priv->pixel_clock_max / 1000, (int )sdvo_priv->caps.sdvo_inputs_mask & 1 ? 89 : 78, ((int )sdvo_priv->caps.sdvo_inputs_mask & 2) != 0 ? 89 : 78, ((int )sdvo_priv->caps.output_flags & 3) != 0 ? 89 : 78, ((int )sdvo_priv->caps.output_flags & 768) != 0 ? 89 : 78); } else { } intel_output->ddc_bus = i2cbus; return; err_i2c: intel_i2c_destroy(intel_output->i2c_bus); err_connector: drm_connector_cleanup(connector); kfree((void const *)intel_output); return; } } void ldv_main13_sequence_infinite_withcheck_stateful(void) { struct drm_encoder *var_group1 ; int var_intel_sdvo_dpms_26_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_sdvo_mode_fixup_24_p2 ; struct drm_display_mode *var_intel_sdvo_mode_set_25_p2 ; struct drm_connector *var_group3 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26307; ldv_26306: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_sdvo_dpms(var_group1, var_intel_sdvo_dpms_26_p1); goto ldv_26295; case 1: ldv_handler_precall(); intel_sdvo_mode_fixup(var_group1, var_group2, var_intel_sdvo_mode_fixup_24_p2); goto ldv_26295; case 2: ldv_handler_precall(); intel_sdvo_mode_set(var_group1, var_group2, var_intel_sdvo_mode_set_25_p2); goto ldv_26295; case 3: ldv_handler_precall(); intel_sdvo_save(var_group3); goto ldv_26295; case 4: ldv_handler_precall(); intel_sdvo_restore(var_group3); goto ldv_26295; case 5: ldv_handler_precall(); intel_sdvo_detect(var_group3); goto ldv_26295; case 6: ldv_handler_precall(); intel_sdvo_destroy(var_group3); goto ldv_26295; case 7: ldv_handler_precall(); intel_sdvo_get_modes(var_group3); goto ldv_26295; case 8: ldv_handler_precall(); intel_sdvo_mode_valid(var_group3, var_group2); goto ldv_26295; case 9: ldv_handler_precall(); intel_sdvo_enc_destroy(var_group1); goto ldv_26295; default: ; goto ldv_26295; } ldv_26295: ; ldv_26307: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26306; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_489(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_490(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_491(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_492(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_493(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_494(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_495(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_496(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_497(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_498(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_499(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_500(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_501(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_502(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_503(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_504(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_505(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_506(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_525(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_528(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_530(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_533(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_534(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_537(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_539(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_541(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_526(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_529(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_531(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_532(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_535(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_536(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_538(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_540(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_542(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_527(spinlock_t *ldv_func_arg1 ) ; extern struct edid *drm_get_edid(struct drm_connector * , struct i2c_adapter * ) ; extern int drm_add_edid_modes(struct drm_connector * , struct edid * ) ; extern int drm_mode_connector_update_edid_property(struct drm_connector * , struct edid * ) ; bool intel_ddc_probe(struct intel_output *intel_output ) { u8 out_buf[2U] ; u8 buf[2U] ; int ret ; struct i2c_msg msgs[2U] ; { out_buf[0] = 0U; out_buf[1] = 0U; msgs[0].addr = 80U; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = 80U; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& buf); ret = i2c_transfer(& (intel_output->ddc_bus)->adapter, (struct i2c_msg *)(& msgs), 2); if (ret == 2) { return (1); } else { } return (0); } } int intel_ddc_get_modes(struct intel_output *intel_output ) { struct edid *edid ; int ret ; { ret = 0; edid = drm_get_edid(& intel_output->base, & (intel_output->ddc_bus)->adapter); if ((unsigned long )edid != (unsigned long )((struct edid *)0)) { drm_mode_connector_update_edid_property(& intel_output->base, edid); ret = drm_add_edid_modes(& intel_output->base, edid); kfree((void const *)edid); } else { } return (ret); } } void ldv___ldv_spin_lock_525(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_526(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_527(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_528(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_529(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_530(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_531(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_532(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_533(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_534(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_535(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_536(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_537(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_538(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_539(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_540(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_541(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_542(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } extern int snprintf(char * , size_t , char const * , ...) ; void ldv___ldv_spin_lock_561(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_564(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_566(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_569(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_570(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_573(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_575(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_577(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_562(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_565(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_567(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_568(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_571(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_572(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_574(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_576(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_578(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_563(spinlock_t *ldv_func_arg1 ) ; extern unsigned long usecs_to_jiffies(unsigned int const ) ; __inline static void dev_set_drvdata(struct device *dev , void *data ) { { dev->driver_data = data; return; } } __inline static void i2c_set_adapdata(struct i2c_adapter *dev , void *data ) { { dev_set_drvdata(& dev->dev, data); return; } } extern int i2c_del_adapter(struct i2c_adapter * ) ; extern int i2c_bit_add_bus(struct i2c_adapter * ) ; static int get_clock(void *data ) { struct intel_i2c_chan *chan ; struct drm_i915_private *dev_priv ; u32 val ; { chan = (struct intel_i2c_chan *)data; dev_priv = (struct drm_i915_private *)(chan->drm_dev)->dev_private; val = readl((void const volatile *)dev_priv->regs + (unsigned long )chan->reg); return ((val & 16U) != 0U); } } static int get_data(void *data ) { struct intel_i2c_chan *chan ; struct drm_i915_private *dev_priv ; u32 val ; { chan = (struct intel_i2c_chan *)data; dev_priv = (struct drm_i915_private *)(chan->drm_dev)->dev_private; val = readl((void const volatile *)dev_priv->regs + (unsigned long )chan->reg); return ((val & 4096U) != 0U); } } static void set_clock(void *data , int state_high ) { struct intel_i2c_chan *chan ; struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 reserved ; u32 clock_bits ; unsigned int tmp ; { chan = (struct intel_i2c_chan *)data; dev = chan->drm_dev; dev_priv = (struct drm_i915_private *)(chan->drm_dev)->dev_private; reserved = 0U; if (dev->pci_device != 13687 && dev->pci_device != 9570) { tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )chan->reg); reserved = tmp & 8224U; } else { } if (state_high != 0) { clock_bits = 1U; } else { clock_bits = 7U; } writel(reserved | clock_bits, (void volatile *)dev_priv->regs + (unsigned long )chan->reg); __const_udelay(85900UL); return; } } static void set_data(void *data , int state_high ) { struct intel_i2c_chan *chan ; struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 reserved ; u32 data_bits ; unsigned int tmp ; { chan = (struct intel_i2c_chan *)data; dev = chan->drm_dev; dev_priv = (struct drm_i915_private *)(chan->drm_dev)->dev_private; reserved = 0U; if (dev->pci_device != 13687 && dev->pci_device != 9570) { tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )chan->reg); reserved = tmp & 8224U; } else { } if (state_high != 0) { data_bits = 256U; } else { data_bits = 1792U; } writel(reserved | data_bits, (void volatile *)dev_priv->regs + (unsigned long )chan->reg); __const_udelay(85900UL); return; } } struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev , u32 const reg , char const *name ) { struct intel_i2c_chan *chan ; void *tmp ; unsigned long tmp___0 ; int tmp___1 ; { tmp = kzalloc(1544UL, 208U); chan = (struct intel_i2c_chan *)tmp; if ((unsigned long )chan == (unsigned long )((struct intel_i2c_chan *)0)) { goto out_free; } else { } chan->drm_dev = dev; chan->reg = reg; snprintf((char *)(& chan->adapter.name), 20UL, "intel drm %s", name); chan->adapter.owner = & __this_module; chan->adapter.id = 65569U; chan->adapter.algo_data = (void *)(& chan->algo); chan->adapter.dev.parent = & (dev->pdev)->dev; chan->algo.setsda = & set_data; chan->algo.setscl = & set_clock; chan->algo.getsda = & get_data; chan->algo.getscl = & get_clock; chan->algo.udelay = 20; tmp___0 = usecs_to_jiffies(2200U); chan->algo.timeout = (int )tmp___0; chan->algo.data = (void *)chan; i2c_set_adapdata(& chan->adapter, (void *)chan); tmp___1 = i2c_bit_add_bus(& chan->adapter); if (tmp___1 != 0) { goto out_free; } else { } set_data((void *)chan, 1); set_clock((void *)chan, 1); __const_udelay(85900UL); return (chan); out_free: kfree((void const *)chan); return (0); } } void intel_i2c_destroy(struct intel_i2c_chan *chan ) { { if ((unsigned long )chan == (unsigned long )((struct intel_i2c_chan *)0)) { return; } else { } i2c_del_adapter(& chan->adapter); kfree((void const *)chan); return; } } void ldv___ldv_spin_lock_561(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_562(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_563(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_564(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_565(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_566(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_567(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_568(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_569(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_570(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_571(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_572(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_573(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_574(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_575(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_576(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_577(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_578(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } extern struct atomic_notifier_head panic_notifier_list ; extern char *strcpy(char * , char const * ) ; void ldv___ldv_spin_lock_597(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_600(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_601(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_604(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_606(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_608(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_610(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_612(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_598(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_602(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_603(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_605(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_607(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_609(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_611(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_613(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_614(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_599(spinlock_t *ldv_func_arg1 ) ; extern int atomic_notifier_chain_register(struct atomic_notifier_head * , struct notifier_block * ) ; extern int atomic_notifier_chain_unregister(struct atomic_notifier_head * , struct notifier_block * ) ; extern int register_sysrq_key(int , struct sysrq_key_op * ) ; extern void cfb_fillrect(struct fb_info * , struct fb_fillrect const * ) ; extern void cfb_copyarea(struct fb_info * , struct fb_copyarea const * ) ; extern void cfb_imageblit(struct fb_info * , struct fb_image const * ) ; extern int register_framebuffer(struct fb_info * ) ; extern int unregister_framebuffer(struct fb_info * ) ; extern struct fb_info *framebuffer_alloc(size_t , struct device * ) ; extern void framebuffer_release(struct fb_info * ) ; int intelfb_resize(struct drm_device *dev , struct drm_crtc *crtc ) ; static int intelfb_setcolreg(unsigned int regno , unsigned int red , unsigned int green , unsigned int blue , unsigned int transp , struct fb_info *info ) { struct intelfb_par *par ; struct drm_device *dev ; struct drm_crtc *crtc ; int i ; struct list_head const *__mptr ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr___0 ; struct drm_mode_set *modeset ; struct drm_framebuffer *fb ; struct list_head const *__mptr___1 ; { par = (struct intelfb_par *)info->par; dev = par->dev; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26597; ldv_26596: __mptr___0 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___0; modeset = & intel_crtc->mode_set; fb = modeset->fb; i = 0; goto ldv_26589; ldv_26588: ; if (crtc->base.id == par->crtc_ids[i]) { goto ldv_26587; } else { } i = i + 1; ldv_26589: ; if (par->crtc_count > i) { goto ldv_26588; } else { } ldv_26587: ; if (par->crtc_count == i) { goto ldv_26590; } else { } if (regno > 255U) { return (1); } else { } if (fb->depth == 8U) { intel_crtc_fb_gamma_set(crtc, (int )((u16 )red), (int )((u16 )green), (int )((u16 )blue), (int )regno); return (0); } else { } if (regno <= 15U) { switch (fb->depth) { case 15U: fb->pseudo_palette[regno] = (((red & 63488U) >> 1) | ((green & 63488U) >> 6)) | ((blue & 63488U) >> 11); goto ldv_26592; case 16U: fb->pseudo_palette[regno] = ((red & 63488U) | ((green & 64512U) >> 5)) | ((blue & 63488U) >> 11); goto ldv_26592; case 24U: ; case 32U: fb->pseudo_palette[regno] = (((red & 65280U) << 8) | (green & 65280U)) | ((blue & 65280U) >> 8); goto ldv_26592; } ldv_26592: ; } else { } ldv_26590: __mptr___1 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26597: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26596; } else { } return (0); } } static int intelfb_check_var(struct fb_var_screeninfo *var , struct fb_info *info ) { struct intelfb_par *par ; struct intel_framebuffer *intel_fb ; struct drm_framebuffer *fb ; int depth ; { par = (struct intelfb_par *)info->par; intel_fb = par->intel_fb; fb = & intel_fb->base; if (var->pixclock == 4294967295U || var->pixclock == 0U) { return (-22); } else { } if (var->xres > fb->width || var->yres > fb->height) { printk("<3>[drm:%s] *ERROR* Requested width/height is greater than current fb object %dx%d > %dx%d\n", "intelfb_check_var", var->xres, var->yres, fb->width, fb->height); printk("<3>[drm:%s] *ERROR* Need resizing code.\n", "intelfb_check_var"); return (-22); } else { } switch (var->bits_per_pixel) { case (__u32 )16: depth = var->green.length == 6U ? 16 : 15; goto ldv_26609; case (__u32 )32: depth = var->transp.length != 0U ? 32 : 24; goto ldv_26609; default: depth = (int )var->bits_per_pixel; goto ldv_26609; } ldv_26609: ; switch (depth) { case 8: var->red.offset = 0U; var->green.offset = 0U; var->blue.offset = 0U; var->red.length = 8U; var->green.length = 8U; var->blue.length = 8U; var->transp.length = 0U; var->transp.offset = 0U; goto ldv_26613; case 15: var->red.offset = 10U; var->green.offset = 5U; var->blue.offset = 0U; var->red.length = 5U; var->green.length = 5U; var->blue.length = 5U; var->transp.length = 1U; var->transp.offset = 15U; goto ldv_26613; case 16: var->red.offset = 11U; var->green.offset = 5U; var->blue.offset = 0U; var->red.length = 5U; var->green.length = 6U; var->blue.length = 5U; var->transp.length = 0U; var->transp.offset = 0U; goto ldv_26613; case 24: var->red.offset = 16U; var->green.offset = 8U; var->blue.offset = 0U; var->red.length = 8U; var->green.length = 8U; var->blue.length = 8U; var->transp.length = 0U; var->transp.offset = 0U; goto ldv_26613; case 32: var->red.offset = 16U; var->green.offset = 8U; var->blue.offset = 0U; var->red.length = 8U; var->green.length = 8U; var->blue.length = 8U; var->transp.length = 8U; var->transp.offset = 24U; goto ldv_26613; default: ; return (-22); } ldv_26613: ; return (0); } } static int intelfb_set_par(struct fb_info *info ) { struct intelfb_par *par ; struct drm_device *dev ; struct fb_var_screeninfo *var ; int i ; struct drm_crtc *crtc ; int ret ; struct list_head const *__mptr ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr___0 ; struct list_head const *__mptr___1 ; { par = (struct intelfb_par *)info->par; dev = par->dev; var = & info->var; if (drm_debug != 0U) { printk("<7>[drm:%s] %d %d\n", "intelfb_set_par", var->xres, var->pixclock); } else { } if (var->pixclock != 4294967295U) { printk("<3>[drm:%s] *ERROR* PIXEL CLCOK SET\n", "intelfb_set_par"); return (-22); } else { __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26641; ldv_26640: __mptr___0 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___0; i = 0; goto ldv_26638; ldv_26637: ; if (crtc->base.id == par->crtc_ids[i]) { goto ldv_26636; } else { } i = i + 1; ldv_26638: ; if (par->crtc_count > i) { goto ldv_26637; } else { } ldv_26636: ; if (par->crtc_count == i) { goto ldv_26639; } else { } if ((unsigned long )crtc->fb == (unsigned long )intel_crtc->mode_set.fb) { mutex_lock_nested(& dev->mode_config.mutex, 0U); ret = (*((crtc->funcs)->set_config))(& intel_crtc->mode_set); mutex_unlock(& dev->mode_config.mutex); if (ret != 0) { return (ret); } else { } } else { } ldv_26639: __mptr___1 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26641: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26640; } else { } return (0); } } } static int intelfb_pan_display(struct fb_var_screeninfo *var , struct fb_info *info ) { struct intelfb_par *par ; struct drm_device *dev ; struct drm_mode_set *modeset ; struct drm_crtc *crtc ; struct intel_crtc *intel_crtc ; int ret ; int i ; struct list_head const *__mptr ; struct drm_crtc const *__mptr___0 ; struct list_head const *__mptr___1 ; { par = (struct intelfb_par *)info->par; dev = par->dev; ret = 0; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26665; ldv_26664: i = 0; goto ldv_26660; ldv_26659: ; if (crtc->base.id == par->crtc_ids[i]) { goto ldv_26658; } else { } i = i + 1; ldv_26660: ; if (par->crtc_count > i) { goto ldv_26659; } else { } ldv_26658: ; if (par->crtc_count == i) { goto ldv_26661; } else { } __mptr___0 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___0; modeset = & intel_crtc->mode_set; modeset->x = var->xoffset; modeset->y = var->yoffset; if (modeset->num_connectors != 0UL) { mutex_lock_nested(& dev->mode_config.mutex, 0U); ret = (*((crtc->funcs)->set_config))(modeset); mutex_unlock(& dev->mode_config.mutex); if (ret == 0) { info->var.xoffset = var->xoffset; info->var.yoffset = var->yoffset; } else { } } else { } ldv_26661: __mptr___1 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26665: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26664; } else { } return (ret); } } static void intelfb_on(struct fb_info *info ) { struct intelfb_par *par ; struct drm_device *dev ; struct drm_crtc *crtc ; struct drm_encoder *encoder ; int i ; struct list_head const *__mptr ; struct drm_crtc_helper_funcs *crtc_funcs ; struct list_head const *__mptr___0 ; struct drm_encoder_helper_funcs *encoder_funcs ; struct list_head const *__mptr___1 ; struct list_head const *__mptr___2 ; { par = (struct intelfb_par *)info->par; dev = par->dev; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26692; ldv_26691: crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; i = 0; goto ldv_26682; ldv_26681: ; if (crtc->base.id == par->crtc_ids[i]) { goto ldv_26680; } else { } i = i + 1; ldv_26682: ; if (par->crtc_count > i) { goto ldv_26681; } else { } ldv_26680: (*(crtc_funcs->dpms))(crtc, 0); __mptr___0 = (struct list_head const *)dev->mode_config.encoder_list.next; encoder = (struct drm_encoder *)__mptr___0 + 0xfffffffffffffff8UL; goto ldv_26689; ldv_26688: ; if ((unsigned long )encoder->crtc == (unsigned long )crtc) { encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; (*(encoder_funcs->dpms))(encoder, 0); } else { } __mptr___1 = (struct list_head const *)encoder->head.next; encoder = (struct drm_encoder *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26689: __builtin_prefetch((void const *)encoder->head.next); if ((unsigned long )(& encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) { goto ldv_26688; } else { } __mptr___2 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___2 + 0xfffffffffffffff8UL; ldv_26692: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26691; } else { } return; } } static void intelfb_off(struct fb_info *info , int dpms_mode ) { struct intelfb_par *par ; struct drm_device *dev ; struct drm_crtc *crtc ; struct drm_encoder *encoder ; int i ; struct list_head const *__mptr ; struct drm_crtc_helper_funcs *crtc_funcs ; struct list_head const *__mptr___0 ; struct drm_encoder_helper_funcs *encoder_funcs ; struct list_head const *__mptr___1 ; struct list_head const *__mptr___2 ; { par = (struct intelfb_par *)info->par; dev = par->dev; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26720; ldv_26719: crtc_funcs = (struct drm_crtc_helper_funcs *)crtc->helper_private; i = 0; goto ldv_26710; ldv_26709: ; if (crtc->base.id == par->crtc_ids[i]) { goto ldv_26708; } else { } i = i + 1; ldv_26710: ; if (par->crtc_count > i) { goto ldv_26709; } else { } ldv_26708: __mptr___0 = (struct list_head const *)dev->mode_config.encoder_list.next; encoder = (struct drm_encoder *)__mptr___0 + 0xfffffffffffffff8UL; goto ldv_26717; ldv_26716: ; if ((unsigned long )encoder->crtc == (unsigned long )crtc) { encoder_funcs = (struct drm_encoder_helper_funcs *)encoder->helper_private; (*(encoder_funcs->dpms))(encoder, dpms_mode); } else { } __mptr___1 = (struct list_head const *)encoder->head.next; encoder = (struct drm_encoder *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26717: __builtin_prefetch((void const *)encoder->head.next); if ((unsigned long )(& encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) { goto ldv_26716; } else { } if (dpms_mode == 3) { (*(crtc_funcs->dpms))(crtc, dpms_mode); } else { } __mptr___2 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___2 + 0xfffffffffffffff8UL; ldv_26720: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26719; } else { } return; } } static int intelfb_blank(int blank , struct fb_info *info ) { { switch (blank) { case 0: intelfb_on(info); goto ldv_26727; case 1: intelfb_off(info, 1); goto ldv_26727; case 3: intelfb_off(info, 1); goto ldv_26727; case 2: intelfb_off(info, 2); goto ldv_26727; case 4: intelfb_off(info, 3); goto ldv_26727; } ldv_26727: ; return (0); } } static struct fb_ops intelfb_ops = {& __this_module, 0, 0, 0, 0, & intelfb_check_var, & intelfb_set_par, & intelfb_setcolreg, 0, & intelfb_blank, & intelfb_pan_display, & cfb_fillrect, & cfb_copyarea, & cfb_imageblit, 0, 0, 0, 0, 0, 0, 0, 0, 0}; int intelfb_resize(struct drm_device *dev , struct drm_crtc *crtc ) { struct fb_info *info ; struct drm_framebuffer *fb ; struct drm_display_mode *mode ; { mode = crtc->desired_mode; fb = crtc->fb; if ((unsigned long )fb == (unsigned long )((struct drm_framebuffer *)0)) { return (1); } else { } info = (struct fb_info *)fb->fbdev; if ((unsigned long )info == (unsigned long )((struct fb_info *)0)) { return (1); } else { } if ((unsigned long )mode == (unsigned long )((struct drm_display_mode *)0)) { return (1); } else { } info->var.xres = (__u32 )mode->hdisplay; info->var.right_margin = (__u32 )(mode->hsync_start - mode->hdisplay); info->var.hsync_len = (__u32 )(mode->hsync_end - mode->hsync_start); info->var.left_margin = (__u32 )(mode->htotal - mode->hsync_end); info->var.yres = (__u32 )mode->vdisplay; info->var.lower_margin = (__u32 )(mode->vsync_start - mode->vdisplay); info->var.vsync_len = (__u32 )(mode->vsync_end - mode->vsync_start); info->var.upper_margin = (__u32 )(mode->vtotal - mode->vsync_end); info->var.pixclock = (__u32 )((((10000000 / mode->htotal) * 1000) / mode->vtotal) * 100); info->var.pixclock = (info->var.pixclock * 1000U) / (__u32 )mode->vrefresh; return (0); } } static struct drm_mode_set kernelfb_mode ; static int intelfb_panic(struct notifier_block *n , unsigned long ununsed , void *panic_str ) { { printk("<3>[drm:%s] *ERROR* panic occurred, switching back to text console\n", "intelfb_panic"); intelfb_restore(); return (0); } } static struct notifier_block paniced = {& intelfb_panic, 0, 0}; static int intelfb_create(struct drm_device *dev , uint32_t fb_width , uint32_t fb_height , uint32_t surface_width , uint32_t surface_height , struct intel_framebuffer **intel_fb_p ) { struct fb_info *info ; struct intelfb_par *par ; struct drm_framebuffer *fb ; struct intel_framebuffer *intel_fb ; struct drm_mode_fb_cmd mode_cmd ; struct drm_gem_object *fbo ; struct drm_i915_gem_object *obj_priv ; struct device *device ; int size ; int ret ; int mmio_bar ; struct drm_framebuffer const *__mptr ; void *tmp ; { fbo = 0; device = & (dev->pdev)->dev; mmio_bar = (((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706); mode_cmd.width = surface_width; mode_cmd.height = surface_height; mode_cmd.bpp = 32U; mode_cmd.pitch = (mode_cmd.width * ((mode_cmd.bpp + 1U) / 8U) + 63U) & 4294967232U; mode_cmd.depth = 24U; size = (int )(mode_cmd.pitch * mode_cmd.height); size = (size + 4095) & -4096; fbo = drm_gem_object_alloc(dev, (size_t )size); if ((unsigned long )fbo == (unsigned long )((struct drm_gem_object *)0)) { printk("<3>failed to allocate framebuffer\n"); ret = -12; goto out; } else { } obj_priv = (struct drm_i915_gem_object *)fbo->driver_private; mutex_lock_nested(& dev->struct_mutex, 0U); ret = i915_gem_object_pin(fbo, 4096U); if (ret != 0) { printk("<3>[drm:%s] *ERROR* failed to pin fb: %d\n", "intelfb_create", ret); goto out_unref; } else { } i915_gem_object_set_to_gtt_domain(fbo, 1); ret = intel_framebuffer_create(dev, & mode_cmd, & fb, fbo); if (ret != 0) { printk("<3>[drm:%s] *ERROR* failed to allocate fb.\n", "intelfb_create"); goto out_unref; } else { } list_add(& fb->filp_head, & dev->mode_config.fb_kernel_list); __mptr = (struct drm_framebuffer const *)fb; intel_fb = (struct intel_framebuffer *)__mptr; *intel_fb_p = intel_fb; info = framebuffer_alloc(40UL, device); if ((unsigned long )info == (unsigned long )((struct fb_info *)0)) { ret = -12; goto out_unref; } else { } par = (struct intelfb_par *)info->par; strcpy((char *)(& info->fix.id), "inteldrmfb"); info->fix.type = 0U; info->fix.visual = 2U; info->fix.type_aux = 0U; info->fix.xpanstep = 1U; info->fix.ypanstep = 1U; info->fix.ywrapstep = 0U; info->fix.accel = 42U; info->fix.type_aux = 0U; info->flags = 1; info->fbops = & intelfb_ops; info->fix.line_length = fb->pitch; info->fix.smem_start = dev->mode_config.fb_base + (unsigned long )obj_priv->gtt_offset; info->fix.smem_len = (__u32 )size; info->flags = 1; tmp = ioremap_wc((dev->agp)->base + (unsigned long )obj_priv->gtt_offset, (unsigned long )size); info->screen_base = (char *)tmp; if ((unsigned long )info->screen_base == (unsigned long )((char *)0)) { ret = -28; goto out_unref; } else { } info->screen_size = (unsigned long )size; info->pseudo_palette = (void *)(& fb->pseudo_palette); info->var.xres_virtual = fb->width; info->var.yres_virtual = fb->height; info->var.bits_per_pixel = (__u32 )fb->bits_per_pixel; info->var.xoffset = 0U; info->var.yoffset = 0U; info->var.activate = 0U; info->var.height = 4294967295U; info->var.width = 4294967295U; info->var.xres = fb_width; info->var.yres = fb_height; info->fix.mmio_start = (unsigned long )(dev->pdev)->resource[mmio_bar].start; info->fix.mmio_len = (dev->pdev)->resource[mmio_bar].start != 0ULL || (dev->pdev)->resource[mmio_bar].end != (dev->pdev)->resource[mmio_bar].start ? ((__u32 )(dev->pdev)->resource[mmio_bar].end - (__u32 )(dev->pdev)->resource[mmio_bar].start) + 1U : 0U; info->pixmap.size = 65536U; info->pixmap.buf_align = 8U; info->pixmap.access_align = 32U; info->pixmap.flags = 2U; info->pixmap.scan_align = 1U; switch (fb->depth) { case 8U: info->var.red.offset = 0U; info->var.green.offset = 0U; info->var.blue.offset = 0U; info->var.red.length = 8U; info->var.green.length = 8U; info->var.blue.length = 8U; info->var.transp.offset = 0U; info->var.transp.length = 0U; goto ldv_26780; case 15U: info->var.red.offset = 10U; info->var.green.offset = 5U; info->var.blue.offset = 0U; info->var.red.length = 5U; info->var.green.length = 5U; info->var.blue.length = 5U; info->var.transp.offset = 15U; info->var.transp.length = 1U; goto ldv_26780; case 16U: info->var.red.offset = 11U; info->var.green.offset = 5U; info->var.blue.offset = 0U; info->var.red.length = 5U; info->var.green.length = 6U; info->var.blue.length = 5U; info->var.transp.offset = 0U; goto ldv_26780; case 24U: info->var.red.offset = 16U; info->var.green.offset = 8U; info->var.blue.offset = 0U; info->var.red.length = 8U; info->var.green.length = 8U; info->var.blue.length = 8U; info->var.transp.offset = 0U; info->var.transp.length = 0U; goto ldv_26780; case 32U: info->var.red.offset = 16U; info->var.green.offset = 8U; info->var.blue.offset = 0U; info->var.red.length = 8U; info->var.green.length = 8U; info->var.blue.length = 8U; info->var.transp.offset = 24U; info->var.transp.length = 8U; goto ldv_26780; default: ; goto ldv_26780; } ldv_26780: fb->fbdev = (void *)info; par->intel_fb = intel_fb; par->dev = dev; printk("allocated %dx%d fb: 0x%08x, bo %p\n", intel_fb->base.width, intel_fb->base.height, obj_priv->gtt_offset, fbo); mutex_unlock(& dev->struct_mutex); return (0); out_unref: drm_gem_object_unreference(fbo); mutex_unlock(& dev->struct_mutex); out: ; return (ret); } } static int intelfb_multi_fb_probe_crtc(struct drm_device *dev , struct drm_crtc *crtc ) { struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct intel_framebuffer *intel_fb ; struct drm_framebuffer *fb ; struct drm_connector *connector ; struct fb_info *info ; struct intelfb_par *par ; struct drm_mode_set *modeset ; unsigned int width ; unsigned int height ; int new_fb ; int ret ; int i ; int conn_count ; bool tmp ; int tmp___0 ; struct drm_framebuffer const *__mptr___0 ; struct list_head const *__mptr___1 ; struct list_head const *__mptr___2 ; int tmp___1 ; { __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; new_fb = 0; tmp = drm_helper_crtc_in_use(crtc); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return (0); } else { } if ((unsigned long )crtc->desired_mode == (unsigned long )((struct drm_display_mode *)0)) { return (0); } else { } width = (unsigned int )(crtc->desired_mode)->hdisplay; height = (unsigned int )(crtc->desired_mode)->vdisplay; if ((unsigned long )intel_crtc->mode_set.fb == (unsigned long )((struct drm_framebuffer *)0)) { ret = intelfb_create(dev, width, height, width, height, & intel_fb); if (ret != 0) { return (-22); } else { } new_fb = 1; } else { fb = intel_crtc->mode_set.fb; __mptr___0 = (struct drm_framebuffer const *)fb; intel_fb = (struct intel_framebuffer *)__mptr___0; if (intel_fb->base.width < width || intel_fb->base.height < height) { return (-22); } else { } } info = (struct fb_info *)intel_fb->base.fbdev; par = (struct intelfb_par *)info->par; modeset = & intel_crtc->mode_set; modeset->fb = & intel_fb->base; conn_count = 0; __mptr___1 = (struct list_head const *)dev->mode_config.connector_list.next; connector = (struct drm_connector *)__mptr___1 + 0xfffffffffffffc18UL; goto ldv_26813; ldv_26812: ; if ((unsigned long )connector->encoder != (unsigned long )((struct drm_encoder *)0)) { if ((unsigned long )(connector->encoder)->crtc == (unsigned long )modeset->crtc) { *(modeset->connectors + (unsigned long )conn_count) = connector; conn_count = conn_count + 1; if (conn_count > 4) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/intel_fb.c.prepared"), "i" (733), "i" (24UL)); ldv_26811: ; goto ldv_26811; } else { } } else { } } else { } __mptr___2 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___2 + 0xfffffffffffffc18UL; ldv_26813: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) { goto ldv_26812; } else { } i = conn_count; goto ldv_26816; ldv_26815: *(modeset->connectors + (unsigned long )i) = 0; i = i + 1; ldv_26816: ; if (i <= 3) { goto ldv_26815; } else { } par->crtc_ids[0] = crtc->base.id; modeset->num_connectors = (size_t )conn_count; if ((unsigned long )modeset->mode != (unsigned long )(modeset->crtc)->desired_mode) { modeset->mode = (modeset->crtc)->desired_mode; } else { } par->crtc_count = 1; if (new_fb != 0) { info->var.pixclock = 4294967295U; tmp___1 = register_framebuffer(info); if (tmp___1 < 0) { return (-22); } else { } } else { intelfb_set_par(info); } printk("<6>fb%d: %s frame buffer device\n", info->node, (char *)(& info->fix.id)); kernelfb_mode = *modeset; atomic_notifier_chain_register(& panic_notifier_list, & paniced); printk("<6>registered panic notifier\n"); return (0); } } static int intelfb_multi_fb_probe(struct drm_device *dev ) { struct drm_crtc *crtc ; int ret ; struct list_head const *__mptr ; struct list_head const *__mptr___0 ; { ret = 0; __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26828; ldv_26827: ret = intelfb_multi_fb_probe_crtc(dev, crtc); if (ret != 0) { return (ret); } else { } __mptr___0 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___0 + 0xfffffffffffffff8UL; ldv_26828: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26827; } else { } return (ret); } } static int intelfb_single_fb_probe(struct drm_device *dev ) { struct drm_crtc *crtc ; struct drm_connector *connector ; unsigned int fb_width ; unsigned int fb_height ; unsigned int surface_width ; unsigned int surface_height ; int new_fb ; int crtc_count ; int ret ; int i ; int conn_count ; struct intel_framebuffer *intel_fb ; struct fb_info *info ; struct intelfb_par *par ; struct drm_mode_set *modeset ; struct list_head const *__mptr ; bool tmp ; int tmp___0 ; struct list_head const *__mptr___0 ; struct drm_framebuffer *fb ; struct list_head const *__mptr___1 ; struct drm_framebuffer const *__mptr___2 ; int tmp___1 ; struct list_head const *__mptr___3 ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr___4 ; struct list_head const *__mptr___5 ; int tmp___2 ; struct list_head const *__mptr___6 ; int tmp___3 ; struct list_head const *__mptr___7 ; int tmp___4 ; { fb_width = 4294967295U; fb_height = 4294967295U; surface_width = 0U; surface_height = 0U; new_fb = 0; crtc_count = 0; conn_count = 0; modeset = 0; if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "intelfb_single_fb_probe"); } else { } __mptr = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr + 0xfffffffffffffff8UL; goto ldv_26855; ldv_26854: tmp = drm_helper_crtc_in_use(crtc); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { goto ldv_26853; } else { } crtc_count = crtc_count + 1; if ((unsigned long )crtc->desired_mode == (unsigned long )((struct drm_display_mode *)0)) { goto ldv_26853; } else { } if ((unsigned int )(crtc->desired_mode)->hdisplay < fb_width) { fb_width = (unsigned int )(crtc->desired_mode)->hdisplay; } else { } if ((unsigned int )(crtc->desired_mode)->vdisplay < fb_height) { fb_height = (unsigned int )(crtc->desired_mode)->vdisplay; } else { } if ((unsigned int )(crtc->desired_mode)->hdisplay > surface_width) { surface_width = (unsigned int )(crtc->desired_mode)->hdisplay; } else { } if ((unsigned int )(crtc->desired_mode)->vdisplay > surface_height) { surface_height = (unsigned int )(crtc->desired_mode)->vdisplay; } else { } ldv_26853: __mptr___0 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___0 + 0xfffffffffffffff8UL; ldv_26855: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26854; } else { } if ((crtc_count == 0 || fb_width == 4294967295U) || fb_height == 4294967295U) { if (drm_debug != 0U) { printk("<7>[drm:%s] no CRTCs available?\n", "intelfb_single_fb_probe"); } else { } return (0); } else { } tmp___1 = list_empty((struct list_head const *)(& dev->mode_config.fb_kernel_list)); if (tmp___1 != 0) { if (drm_debug != 0U) { printk("<7>[drm:%s] creating new fb (console size %dx%d, buffer size %dx%d)\n", "intelfb_single_fb_probe", fb_width, fb_height, surface_width, surface_height); } else { } ret = intelfb_create(dev, fb_width, fb_height, surface_width, surface_height, & intel_fb); if (ret != 0) { return (-22); } else { } new_fb = 1; } else { __mptr___1 = (struct list_head const *)dev->mode_config.fb_kernel_list.next; fb = (struct drm_framebuffer *)__mptr___1 + 0xffffffffffffff70UL; __mptr___2 = (struct drm_framebuffer const *)fb; intel_fb = (struct intel_framebuffer *)__mptr___2; if (fb->width < surface_width || fb->height < surface_height) { printk("<3>[drm:%s] *ERROR* fb not large enough for console\n", "intelfb_single_fb_probe"); return (-22); } else { } } info = (struct fb_info *)intel_fb->base.fbdev; par = (struct intelfb_par *)info->par; crtc_count = 0; __mptr___3 = (struct list_head const *)dev->mode_config.crtc_list.next; crtc = (struct drm_crtc *)__mptr___3 + 0xfffffffffffffff8UL; goto ldv_26882; ldv_26881: __mptr___4 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___4; modeset = & intel_crtc->mode_set; modeset->fb = & intel_fb->base; conn_count = 0; __mptr___5 = (struct list_head const *)dev->mode_config.connector_list.next; connector = (struct drm_connector *)__mptr___5 + 0xfffffffffffffc18UL; goto ldv_26876; ldv_26875: ; if ((unsigned long )connector->encoder == (unsigned long )((struct drm_encoder *)0)) { goto ldv_26873; } else { } if ((unsigned long )(connector->encoder)->crtc == (unsigned long )modeset->crtc) { tmp___2 = conn_count; conn_count = conn_count + 1; *(modeset->connectors + (unsigned long )tmp___2) = connector; if (conn_count > 4) { __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.quad 1b, %c0\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--39_7a--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/39_7a/drivers/gpu/drm/i915/intel_fb.c.prepared"), "i" (882), "i" (24UL)); ldv_26874: ; goto ldv_26874; } else { } } else { } ldv_26873: __mptr___6 = (struct list_head const *)connector->head.next; connector = (struct drm_connector *)__mptr___6 + 0xfffffffffffffc18UL; ldv_26876: __builtin_prefetch((void const *)connector->head.next); if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) { goto ldv_26875; } else { } i = conn_count; goto ldv_26879; ldv_26878: *(modeset->connectors + (unsigned long )i) = 0; i = i + 1; ldv_26879: ; if (i <= 3) { goto ldv_26878; } else { } tmp___3 = crtc_count; crtc_count = crtc_count + 1; par->crtc_ids[tmp___3] = crtc->base.id; modeset->num_connectors = (size_t )conn_count; if ((unsigned long )modeset->mode != (unsigned long )(modeset->crtc)->desired_mode) { modeset->mode = (modeset->crtc)->desired_mode; } else { } __mptr___7 = (struct list_head const *)crtc->head.next; crtc = (struct drm_crtc *)__mptr___7 + 0xfffffffffffffff8UL; ldv_26882: __builtin_prefetch((void const *)crtc->head.next); if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) { goto ldv_26881; } else { } par->crtc_count = crtc_count; if (new_fb != 0) { info->var.pixclock = 4294967295U; tmp___4 = register_framebuffer(info); if (tmp___4 < 0) { return (-22); } else { } } else { intelfb_set_par(info); } printk("<6>fb%d: %s frame buffer device\n", info->node, (char *)(& info->fix.id)); kernelfb_mode = *modeset; atomic_notifier_chain_register(& panic_notifier_list, & paniced); printk("<6>registered panic notifier\n"); return (0); } } void intelfb_restore(void) { { drm_crtc_helper_set_config(& kernelfb_mode); return; } } static void intelfb_sysrq(int dummy1 , struct tty_struct *dummy3 ) { { intelfb_restore(); return; } } static struct sysrq_key_op sysrq_intelfb_restore_op = {& intelfb_sysrq, (char *)"force fb", (char *)"force restore of fb console", 0}; int intelfb_probe(struct drm_device *dev ) { int ret ; { if (drm_debug != 0U) { printk("<7>[drm:%s] \n", "intelfb_probe"); } else { } if (i915_fbpercrtc == 1U) { ret = intelfb_multi_fb_probe(dev); } else { ret = intelfb_single_fb_probe(dev); } register_sysrq_key(103, & sysrq_intelfb_restore_op); return (ret); } } int intelfb_remove(struct drm_device *dev , struct drm_framebuffer *fb ) { struct fb_info *info ; { if ((unsigned long )fb == (unsigned long )((struct drm_framebuffer *)0)) { return (-22); } else { } info = (struct fb_info *)fb->fbdev; if ((unsigned long )info != (unsigned long )((struct fb_info *)0)) { unregister_framebuffer(info); iounmap((void volatile *)info->screen_base); framebuffer_release(info); } else { } atomic_notifier_chain_unregister(& panic_notifier_list, & paniced); memset((void *)(& kernelfb_mode), 0, 64UL); return (0); } } void ldv_main16_sequence_infinite_withcheck_stateful(void) { struct fb_var_screeninfo *var_group1 ; struct fb_info *var_group2 ; unsigned int var_intelfb_setcolreg_0_p0 ; unsigned int var_intelfb_setcolreg_0_p1 ; unsigned int var_intelfb_setcolreg_0_p2 ; unsigned int var_intelfb_setcolreg_0_p3 ; unsigned int var_intelfb_setcolreg_0_p4 ; struct fb_info *var_intelfb_setcolreg_0_p5 ; int var_intelfb_blank_6_p0 ; struct notifier_block *var_group3 ; unsigned long var_intelfb_panic_8_p1 ; void *var_intelfb_panic_8_p2 ; int var_intelfb_sysrq_14_p0 ; struct tty_struct *var_group4 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26956; ldv_26955: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intelfb_check_var(var_group1, var_group2); goto ldv_26947; case 1: ldv_handler_precall(); intelfb_set_par(var_group2); goto ldv_26947; case 2: ldv_handler_precall(); intelfb_setcolreg(var_intelfb_setcolreg_0_p0, var_intelfb_setcolreg_0_p1, var_intelfb_setcolreg_0_p2, var_intelfb_setcolreg_0_p3, var_intelfb_setcolreg_0_p4, var_intelfb_setcolreg_0_p5); goto ldv_26947; case 3: ldv_handler_precall(); intelfb_pan_display(var_group1, var_group2); goto ldv_26947; case 4: ldv_handler_precall(); intelfb_blank(var_intelfb_blank_6_p0, var_group2); goto ldv_26947; case 5: ldv_handler_precall(); intelfb_panic(var_group3, var_intelfb_panic_8_p1, var_intelfb_panic_8_p2); goto ldv_26947; case 6: ldv_handler_precall(); intelfb_sysrq(var_intelfb_sysrq_14_p0, var_group4); goto ldv_26947; default: ; goto ldv_26947; } ldv_26947: ; ldv_26956: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26955; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_597(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_598(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_599(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_600(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_601(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_602(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_603(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_604(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_605(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_606(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_607(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_608(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_609(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_610(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_611(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_612(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_613(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_614(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } extern int strcmp(char const * , char const * ) ; extern char *strncpy(char * , char const * , __kernel_size_t ) ; void ldv___ldv_spin_lock_633(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_636(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_637(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_640(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_642(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_644(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_646(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_648(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_651(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_653(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_634(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_638(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_639(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_641(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_643(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_645(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_647(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_649(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_650(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_652(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_654(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_635(spinlock_t *ldv_func_arg1 ) ; extern int drm_mode_vrefresh(struct drm_display_mode * ) ; extern int drm_connector_property_set_value(struct drm_connector * , struct drm_property * , uint64_t ) ; extern int drm_connector_attach_property(struct drm_connector * , struct drm_property * , uint64_t ) ; extern int drm_mode_create_tv_properties(struct drm_device * , int , char ** ) ; static u32 const filter_table[206U] = { 2973773824U, 773862656U, 889204256U, 805351744U, 899723616U, 767569536U, 2973774976U, 2975870976U, 782251584U, 872426880U, 805351712U, 920695136U, 757083888U, 2971677568U, 2975870976U, 791689088U, 855649472U, 805351680U, 941666656U, 746598224U, 2969580192U, 2975870976U, 797980864U, 840969248U, 805351648U, 964735328U, 734015424U, 2967482816U, 2975870976U, 804272672U, 828386144U, 2954932416U, 987804000U, 721426448U, 2965385504U, 2973806624U, 405289888U, 817900160U, 2954932384U, 1012969792U, 706746424U, 2963288192U, 2971709472U, 406338848U, 809511360U, 2957029504U, 1038135552U, 694163528U, 2961190912U, 2969612352U, 407387840U, 2956994816U, 2957029472U, 1065398464U, 679483480U, 2959126656U, 2963320928U, 408954912U, 2963286048U, 45152U, 2973773824U, 773862656U, 889204256U, 805351744U, 899723616U, 767569536U, 2973774976U, 2975870976U, 782251584U, 872426880U, 805351712U, 920695136U, 757083888U, 2971677568U, 2975870976U, 791689088U, 855649472U, 805351680U, 941666656U, 746598224U, 2969580192U, 2975870976U, 797980864U, 840969248U, 805351648U, 964735328U, 734015424U, 2967482816U, 2975870976U, 804272672U, 828386144U, 2954932416U, 987804000U, 721426448U, 2965385504U, 2973806624U, 405289888U, 817900160U, 2954932384U, 1012969792U, 706746424U, 2963288192U, 2971709472U, 406338848U, 809511360U, 2957029504U, 1038135552U, 694163528U, 2961190912U, 2969612352U, 407387840U, 2956994816U, 2957029472U, 1065398464U, 679483480U, 2959126656U, 2963320928U, 408954912U, 2963286048U, 45152U, 910176256U, 754986176U, 805320256U, 754988736U, 901786816U, 926953472U, 746597696U, 805320000U, 763377600U, 885009472U, 943730688U, 734014976U, 805319744U, 773863616U, 872426368U, 964702208U, 725626432U, 805319552U, 778058240U, 859843328U, 981479488U, 713043616U, 809513728U, 784350016U, 847260224U, 1006645312U, 704655040U, 813707840U, 784350336U, 838871488U, 1027616896U, 692072192U, 813707712U, 790642112U, 830482688U, 1048588480U, 679489344U, 817901888U, 790642496U, 826288192U, 671101184U, 671100672U, 12544U, 910176256U, 754986176U, 805320256U, 754988736U, 901786816U, 926953472U, 746597696U, 805320000U, 763377600U, 885009472U, 943730688U, 734014976U, 805319744U, 773863616U, 872426368U, 964702208U, 725626432U, 805319552U, 778058240U, 859843328U, 981479488U, 713043616U, 809513728U, 784350016U, 847260224U, 1006645312U, 704655040U, 813707840U, 784350336U, 838871488U, 1027616896U, 692072192U, 813707712U, 790642112U, 830482688U, 1048588480U, 679489344U, 817901888U, 790642496U, 826288192U, 671101184U, 671100672U, 12544U}; static struct color_conversion const ntsc_m_csc_composite = {818U, 301U, 2003U, 260U, 1843U, 1325U, 1479U, 3840U, 832U, 780U, 1744U, 3840U}; static struct video_levels const ntsc_m_levels_composite = {225, 267, 113}; static struct color_conversion const ntsc_m_csc_svideo = {818U, 301U, 2003U, 308U, 1898U, 1380U, 781U, 3840U, 890U, 829U, 1782U, 3840U}; static struct video_levels const ntsc_m_levels_svideo = {266, 316, 133}; static struct color_conversion const ntsc_j_csc_composite = {818U, 301U, 2003U, 281U, 1868U, 1350U, 1516U, 3840U, 858U, 802U, 1761U, 3840U}; static struct video_levels const ntsc_j_levels_composite = {225, 225, 113}; static struct color_conversion const ntsc_j_csc_svideo = {818U, 301U, 2003U, 332U, 1928U, 1409U, 802U, 3840U, 921U, 854U, 1802U, 3840U}; static struct video_levels const ntsc_j_levels_svideo = {266, 266, 133}; static struct color_conversion const pal_csc_composite = {818U, 301U, 2003U, 275U, 1861U, 1343U, 1505U, 3840U, 851U, 796U, 1756U, 3840U}; static struct video_levels const pal_levels_composite = {237, 237, 118}; static struct color_conversion const pal_csc_svideo = {818U, 301U, 2003U, 325U, 1920U, 1401U, 796U, 3840U, 912U, 847U, 1797U, 3840U}; static struct video_levels const pal_levels_svideo = {280, 280, 139}; static struct color_conversion const pal_m_csc_composite = {818U, 301U, 2003U, 260U, 1843U, 1325U, 1479U, 3840U, 832U, 780U, 1744U, 3840U}; static struct video_levels const pal_m_levels_composite = {225, 267, 113}; static struct color_conversion const pal_m_csc_svideo = {818U, 301U, 2003U, 308U, 1898U, 1380U, 781U, 3840U, 890U, 829U, 1782U, 3840U}; static struct video_levels const pal_m_levels_svideo = {266, 316, 133}; static struct color_conversion const pal_n_csc_composite = {818U, 301U, 2003U, 260U, 1843U, 1325U, 1479U, 3840U, 832U, 780U, 1744U, 3840U}; static struct video_levels const pal_n_levels_composite = {225, 267, 118}; static struct color_conversion const pal_n_csc_svideo = {818U, 301U, 2003U, 308U, 1898U, 1380U, 781U, 3840U, 890U, 829U, 1782U, 3840U}; static struct video_levels const pal_n_levels_svideo = {266, 316, 139}; static struct color_conversion const sdtv_csc_yprpb = {818U, 301U, 2003U, 326U, 1369U, 851U, 256U, 3840U, 256U, 941U, 1869U, 3840U}; static struct color_conversion const hdtv_csc_yprpb = {1459U, 366U, 1832U, 326U, 2005U, 907U, 256U, 3840U, 256U, 977U, 1724U, 3840U}; static struct video_levels const component_levels = {279, 279, 0}; static struct tv_mode const tv_modes[15U] = { {(char *)"NTSC-M", 107520, 29970, 786432U, 64, 836, 124, 857, 0, 0, 0, 6, 7, 6, 1, 0, 1, 18, 20, 21, 240, 1, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240, 20013, 0, 136, 7624, 0, 16777216U, 0, & ntsc_m_levels_composite, & ntsc_m_levels_svideo, & ntsc_m_csc_composite, & ntsc_m_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"NTSC-443", 107520, 29970, 786432U, 64, 836, 124, 857, 0, 0, 0, 6, 7, 6, 1, 0, 1, 18, 20, 21, 240, 1, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240, 20625, 0, 168, 18557, 0, 33554432U, 1, & ntsc_m_levels_composite, & ntsc_m_levels_svideo, & ntsc_m_csc_composite, & ntsc_m_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"NTSC-J", 107520, 29970, 786432U, 64, 836, 124, 857, 0, 0, 0, 6, 7, 6, 1, 0, 1, 18, 20, 21, 240, 1, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240, 20013, 0, 136, 7624, 0, 16777216U, 0, & ntsc_j_levels_composite, & ntsc_j_levels_svideo, & ntsc_j_csc_composite, & ntsc_j_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"PAL-M", 107520, 29970, 786432U, 64, 836, 124, 857, 0, 0, 0, 6, 7, 6, 1, 0, 1, 18, 20, 21, 240, 1, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240, 20013, 0, 136, 7624, 0, 16777216U, 0, & pal_m_levels_composite, & pal_m_levels_svideo, & pal_m_csc_composite, & pal_m_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"PAL-N", 107520, 25000, 786432U, 64, 844, 128, 863, 0, 0, 0, 6, 7, 6, 1, 0, 1, 18, 24, 25, 286, 1, 73, 34, 8, 285, 8, 286, 9, 286, 9, 285, 20625, 0, 168, 18557, 0, 33554432U, 1, & pal_n_levels_composite, & pal_n_levels_svideo, & pal_n_csc_composite, & pal_n_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"PAL", 107520, 25000, 786432U, 64, 844, 128, 863, 0, 0, 0, 5, 6, 5, 1, 0, 1, 15, 24, 25, 286, 1, 73, 32, 8, 285, 8, 286, 9, 286, 9, 285, 20625, 0, 168, 18557, 0, 33554432U, 1, & pal_levels_composite, & pal_levels_svideo, & pal_csc_composite, & pal_csc_svideo, (u32 const *)(& filter_table), 0}, {(char *)"480p@59.94Hz", 107520, 59940, 0U, 64, 842, 122, 857, 1, 0, 1, 12, 12, 12, 0, 0, 0, 0, 44, 44, 496, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"480p@60Hz", 107520, 60000, 0U, 64, 842, 122, 856, 1, 0, 1, 12, 12, 12, 0, 0, 0, 0, 44, 44, 496, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"576p", 107520, 50000, 0U, 64, 859, 139, 863, 1, 0, 1, 10, 10, 10, 0, 0, 0, 0, 48, 48, 575, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"720p@60Hz", 148800, 60000, 262144U, 80, 1580, 300, 1649, 1, 1, 1, 10, 10, 10, 0, 0, 0, 0, 29, 29, 719, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"720p@59.94Hz", 148800, 59940, 262144U, 80, 1580, 300, 1651, 1, 1, 1, 10, 10, 10, 0, 0, 0, 0, 29, 29, 719, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"720p@50Hz", 148800, 50000, 262144U, 80, 1580, 300, 1979, 1, 1, 1, 10, 10, 10, 0, 0, 0, 0, 29, 29, 719, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 800}, {(char *)"1080i@50Hz", 148800, 25000, 262144U, 88, 2155, 235, 2639, 0, 1, 1, 4, 5, 10, 1, 4, 4, 10, 21, 22, 539, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"1080i@60Hz", 148800, 30000, 262144U, 88, 2155, 235, 2199, 0, 1, 1, 4, 5, 10, 1, 4, 4, 10, 21, 22, 539, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}, {(char *)"1080i@59.94Hz", 148800, 29970, 262144U, 88, 2155, 235, 2200, 0, 1, 1, 4, 5, 10, 1, 4, 4, 10, 21, 22, 539, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, (u32 const *)(& filter_table), 0}}; static void intel_tv_dpms(struct drm_encoder *encoder , int mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; unsigned int tmp ; unsigned int tmp___0 ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; switch (mode) { case 0: tmp = readl((void const volatile *)dev_priv->regs + 425984U); writel(tmp | 2147483648U, (void volatile *)dev_priv->regs + 425984U); goto ldv_26132; case 1: ; case 2: ; case 3: tmp___0 = readl((void const volatile *)dev_priv->regs + 425984U); writel(tmp___0 & 2147483647U, (void volatile *)dev_priv->regs + 425984U); goto ldv_26132; } ldv_26132: ; return; } } static void intel_tv_save(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_tv_priv *tv_priv ; int i ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; tv_priv->save_TV_H_CTL_1 = readl((void const volatile *)dev_priv->regs + 426032U); tv_priv->save_TV_H_CTL_2 = readl((void const volatile *)dev_priv->regs + 426036U); tv_priv->save_TV_H_CTL_3 = readl((void const volatile *)dev_priv->regs + 426040U); tv_priv->save_TV_V_CTL_1 = readl((void const volatile *)dev_priv->regs + 426044U); tv_priv->save_TV_V_CTL_2 = readl((void const volatile *)dev_priv->regs + 426048U); tv_priv->save_TV_V_CTL_3 = readl((void const volatile *)dev_priv->regs + 426052U); tv_priv->save_TV_V_CTL_4 = readl((void const volatile *)dev_priv->regs + 426056U); tv_priv->save_TV_V_CTL_5 = readl((void const volatile *)dev_priv->regs + 426060U); tv_priv->save_TV_V_CTL_6 = readl((void const volatile *)dev_priv->regs + 426064U); tv_priv->save_TV_V_CTL_7 = readl((void const volatile *)dev_priv->regs + 426068U); tv_priv->save_TV_SC_CTL_1 = readl((void const volatile *)dev_priv->regs + 426080U); tv_priv->save_TV_SC_CTL_2 = readl((void const volatile *)dev_priv->regs + 426084U); tv_priv->save_TV_SC_CTL_3 = readl((void const volatile *)dev_priv->regs + 426088U); tv_priv->save_TV_CSC_Y = readl((void const volatile *)dev_priv->regs + 426000U); tv_priv->save_TV_CSC_Y2 = readl((void const volatile *)dev_priv->regs + 426004U); tv_priv->save_TV_CSC_U = readl((void const volatile *)dev_priv->regs + 426008U); tv_priv->save_TV_CSC_U2 = readl((void const volatile *)dev_priv->regs + 426012U); tv_priv->save_TV_CSC_V = readl((void const volatile *)dev_priv->regs + 426016U); tv_priv->save_TV_CSC_V2 = readl((void const volatile *)dev_priv->regs + 426020U); tv_priv->save_TV_CLR_KNOBS = readl((void const volatile *)dev_priv->regs + 426024U); tv_priv->save_TV_CLR_LEVEL = readl((void const volatile *)dev_priv->regs + 426028U); tv_priv->save_TV_WIN_POS = readl((void const volatile *)dev_priv->regs + 426096U); tv_priv->save_TV_WIN_SIZE = readl((void const volatile *)dev_priv->regs + 426100U); tv_priv->save_TV_FILTER_CTL_1 = readl((void const volatile *)dev_priv->regs + 426112U); tv_priv->save_TV_FILTER_CTL_2 = readl((void const volatile *)dev_priv->regs + 426116U); tv_priv->save_TV_FILTER_CTL_3 = readl((void const volatile *)dev_priv->regs + 426120U); i = 0; goto ldv_26147; ldv_26146: tv_priv->save_TV_H_LUMA[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426240)); i = i + 1; ldv_26147: ; if (i <= 59) { goto ldv_26146; } else { } i = 0; goto ldv_26150; ldv_26149: tv_priv->save_TV_H_CHROMA[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426496)); i = i + 1; ldv_26150: ; if (i <= 59) { goto ldv_26149; } else { } i = 0; goto ldv_26153; ldv_26152: tv_priv->save_TV_V_LUMA[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426752)); i = i + 1; ldv_26153: ; if (i <= 42) { goto ldv_26152; } else { } i = 0; goto ldv_26156; ldv_26155: tv_priv->save_TV_V_CHROMA[i] = readl((void const volatile *)dev_priv->regs + (unsigned long )((i << 2) + 427008)); i = i + 1; ldv_26156: ; if (i <= 42) { goto ldv_26155; } else { } tv_priv->save_TV_DAC = readl((void const volatile *)dev_priv->regs + 425988U); tv_priv->save_TV_CTL = readl((void const volatile *)dev_priv->regs + 425984U); return; } } static void intel_tv_restore(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_tv_priv *tv_priv ; struct drm_crtc *crtc ; struct intel_crtc *intel_crtc ; int i ; struct drm_crtc const *__mptr___0 ; int pipeconf_reg ; int dspcntr_reg ; int pipeconf ; unsigned int tmp ; int dspcntr ; unsigned int tmp___0 ; int dspbase_reg ; unsigned int tmp___1 ; unsigned int tmp___2 ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; crtc = (connector->encoder)->crtc; if ((unsigned long )crtc == (unsigned long )((struct drm_crtc *)0)) { return; } else { } __mptr___0 = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr___0; writel(tv_priv->save_TV_H_CTL_1, (void volatile *)dev_priv->regs + 426032U); writel(tv_priv->save_TV_H_CTL_2, (void volatile *)dev_priv->regs + 426036U); writel(tv_priv->save_TV_H_CTL_3, (void volatile *)dev_priv->regs + 426040U); writel(tv_priv->save_TV_V_CTL_1, (void volatile *)dev_priv->regs + 426044U); writel(tv_priv->save_TV_V_CTL_2, (void volatile *)dev_priv->regs + 426048U); writel(tv_priv->save_TV_V_CTL_3, (void volatile *)dev_priv->regs + 426052U); writel(tv_priv->save_TV_V_CTL_4, (void volatile *)dev_priv->regs + 426056U); writel(tv_priv->save_TV_V_CTL_5, (void volatile *)dev_priv->regs + 426060U); writel(tv_priv->save_TV_V_CTL_6, (void volatile *)dev_priv->regs + 426064U); writel(tv_priv->save_TV_V_CTL_7, (void volatile *)dev_priv->regs + 426068U); writel(tv_priv->save_TV_SC_CTL_1, (void volatile *)dev_priv->regs + 426080U); writel(tv_priv->save_TV_SC_CTL_2, (void volatile *)dev_priv->regs + 426084U); writel(tv_priv->save_TV_SC_CTL_3, (void volatile *)dev_priv->regs + 426088U); writel(tv_priv->save_TV_CSC_Y, (void volatile *)dev_priv->regs + 426000U); writel(tv_priv->save_TV_CSC_Y2, (void volatile *)dev_priv->regs + 426004U); writel(tv_priv->save_TV_CSC_U, (void volatile *)dev_priv->regs + 426008U); writel(tv_priv->save_TV_CSC_U2, (void volatile *)dev_priv->regs + 426012U); writel(tv_priv->save_TV_CSC_V, (void volatile *)dev_priv->regs + 426016U); writel(tv_priv->save_TV_CSC_V2, (void volatile *)dev_priv->regs + 426020U); writel(tv_priv->save_TV_CLR_KNOBS, (void volatile *)dev_priv->regs + 426024U); writel(tv_priv->save_TV_CLR_LEVEL, (void volatile *)dev_priv->regs + 426028U); pipeconf_reg = intel_crtc->pipe == 0 ? 458760 : 462856; dspcntr_reg = intel_crtc->plane == 0 ? 459136 : 463232; tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); pipeconf = (int )tmp; tmp___0 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); dspcntr = (int )tmp___0; dspbase_reg = intel_crtc->plane == 0 ? 459140 : 463236; writel((unsigned int )dspcntr & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp___1 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp___1, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); if ((((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706)) { intel_wait_for_vblank(dev); } else { } writel((unsigned int )pipeconf & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); intel_wait_for_vblank(dev); writel(tv_priv->save_TV_FILTER_CTL_1, (void volatile *)dev_priv->regs + 426112U); writel(tv_priv->save_TV_FILTER_CTL_2, (void volatile *)dev_priv->regs + 426116U); writel(tv_priv->save_TV_FILTER_CTL_3, (void volatile *)dev_priv->regs + 426120U); writel(tv_priv->save_TV_WIN_POS, (void volatile *)dev_priv->regs + 426096U); writel(tv_priv->save_TV_WIN_SIZE, (void volatile *)dev_priv->regs + 426100U); writel((unsigned int )pipeconf, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); writel((unsigned int )dspcntr, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp___2 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp___2, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); i = 0; goto ldv_26178; ldv_26177: writel(tv_priv->save_TV_H_LUMA[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426240)); i = i + 1; ldv_26178: ; if (i <= 59) { goto ldv_26177; } else { } i = 0; goto ldv_26181; ldv_26180: writel(tv_priv->save_TV_H_CHROMA[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426496)); i = i + 1; ldv_26181: ; if (i <= 59) { goto ldv_26180; } else { } i = 0; goto ldv_26184; ldv_26183: writel(tv_priv->save_TV_V_LUMA[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426752)); i = i + 1; ldv_26184: ; if (i <= 42) { goto ldv_26183; } else { } i = 0; goto ldv_26187; ldv_26186: writel(tv_priv->save_TV_V_CHROMA[i], (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 427008)); i = i + 1; ldv_26187: ; if (i <= 42) { goto ldv_26186; } else { } writel(tv_priv->save_TV_DAC, (void volatile *)dev_priv->regs + 425988U); writel(tv_priv->save_TV_CTL, (void volatile *)dev_priv->regs + 425984U); return; } } static struct tv_mode const *intel_tv_mode_lookup(char *tv_format ) { int i ; struct tv_mode const *tv_mode ; int tmp ; { i = 0; goto ldv_26195; ldv_26194: tv_mode = (struct tv_mode const *)(& tv_modes) + (unsigned long )i; tmp = strcmp((char const *)tv_format, (char const *)tv_mode->name); if (tmp == 0) { return (tv_mode); } else { } i = i + 1; ldv_26195: ; if ((unsigned int )i <= 14U) { goto ldv_26194; } else { } return (0); } } static struct tv_mode const *intel_tv_mode_find(struct intel_output *intel_output ) { struct intel_tv_priv *tv_priv ; struct tv_mode const *tmp ; { tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; tmp = intel_tv_mode_lookup(tv_priv->tv_format); return (tmp); } } static enum drm_mode_status intel_tv_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct tv_mode const *tv_mode ; struct tv_mode const *tmp ; int __x ; int tmp___0 ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tmp = intel_tv_mode_find(intel_output); tv_mode = tmp; if ((unsigned long )tv_mode != (unsigned long )((struct tv_mode const *)0)) { tmp___0 = drm_mode_vrefresh(mode); __x = (int )tv_mode->refresh - tmp___0; if ((__x < 0 ? - __x : __x) <= 0) { return (MODE_OK); } else { } } else { } return (MODE_CLOCK_RANGE); } } static bool intel_tv_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_mode_config *drm_config ; struct intel_output *intel_output ; struct drm_encoder const *__mptr ; struct tv_mode const *tv_mode ; struct tv_mode const *tmp ; struct drm_encoder *other_encoder ; struct list_head const *__mptr___0 ; struct list_head const *__mptr___1 ; { dev = encoder->dev; drm_config = & dev->mode_config; __mptr = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr + 0xfffffffffffffa38UL; tmp = intel_tv_mode_find(intel_output); tv_mode = tmp; if ((unsigned long )tv_mode == (unsigned long )((struct tv_mode const *)0)) { return (0); } else { } __mptr___0 = (struct list_head const *)drm_config->encoder_list.next; other_encoder = (struct drm_encoder *)__mptr___0 + 0xfffffffffffffff8UL; goto ldv_26228; ldv_26227: ; if ((unsigned long )other_encoder != (unsigned long )encoder && (unsigned long )other_encoder->crtc == (unsigned long )encoder->crtc) { return (0); } else { } __mptr___1 = (struct list_head const *)other_encoder->head.next; other_encoder = (struct drm_encoder *)__mptr___1 + 0xfffffffffffffff8UL; ldv_26228: __builtin_prefetch((void const *)other_encoder->head.next); if ((unsigned long )(& other_encoder->head) != (unsigned long )(& drm_config->encoder_list)) { goto ldv_26227; } else { } adjusted_mode->clock = tv_mode->clock; return (1); } } static void intel_tv_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct drm_crtc *crtc ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct intel_output *intel_output ; struct drm_encoder const *__mptr___0 ; struct intel_tv_priv *tv_priv ; struct tv_mode const *tv_mode ; struct tv_mode const *tmp ; u32 tv_ctl ; u32 hctl1 ; u32 hctl2 ; u32 hctl3 ; u32 vctl1 ; u32 vctl2 ; u32 vctl3 ; u32 vctl4 ; u32 vctl5 ; u32 vctl6 ; u32 vctl7 ; u32 scctl1 ; u32 scctl2 ; u32 scctl3 ; int i ; int j ; struct video_levels const *video_levels ; struct color_conversion const *color_conversion ; bool burst_ena ; int pipeconf_reg ; int dspcntr_reg ; int pipeconf ; unsigned int tmp___0 ; int dspcntr ; unsigned int tmp___1 ; int dspbase_reg ; int xpos ; int ypos ; unsigned int xsize ; unsigned int ysize ; unsigned int tmp___2 ; unsigned int tmp___3 ; int tmp___4 ; int tmp___5 ; int tmp___6 ; int tmp___7 ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; crtc = encoder->crtc; __mptr = (struct drm_crtc const *)crtc; intel_crtc = (struct intel_crtc *)__mptr; __mptr___0 = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr___0 + 0xfffffffffffffa38UL; tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; tmp = intel_tv_mode_find(intel_output); tv_mode = tmp; if ((unsigned long )tv_mode == (unsigned long )((struct tv_mode const *)0)) { return; } else { } tv_ctl = 0U; switch (tv_priv->type) { default: ; case 0: ; case 5: tv_ctl = tv_ctl; video_levels = tv_mode->composite_levels; color_conversion = tv_mode->composite_color; burst_ena = tv_mode->burst_ena; goto ldv_26268; case 8: tv_ctl = tv_ctl | 536870912U; video_levels = & component_levels; if ((int )tv_mode->burst_ena) { color_conversion = & sdtv_csc_yprpb; } else { color_conversion = & hdtv_csc_yprpb; } burst_ena = 0; goto ldv_26268; case 6: tv_ctl = tv_ctl | 268435456U; video_levels = tv_mode->svideo_levels; color_conversion = tv_mode->svideo_color; burst_ena = tv_mode->burst_ena; goto ldv_26268; } ldv_26268: hctl1 = (u32 )((int )(tv_mode->hsync_end << 16) | (int )tv_mode->htotal); hctl2 = (u32 )((int )(tv_mode->hburst_start << 16) | (int )tv_mode->hburst_len); if ((int )burst_ena) { hctl2 = hctl2 | 2147483648U; } else { } hctl3 = (u32 )((int )tv_mode->hblank_start | (int )(tv_mode->hblank_end << 16)); vctl1 = (u32 )(((int )(tv_mode->nbr_end << 16) | (int )(tv_mode->vi_end_f1 << 8)) | (int )tv_mode->vi_end_f2); vctl2 = (u32 )(((int )(tv_mode->vsync_len << 16) | (int )(tv_mode->vsync_start_f1 << 8)) | (int )tv_mode->vsync_start_f2); vctl3 = (u32 )(((int )(tv_mode->veq_len << 16) | (int )(tv_mode->veq_start_f1 << 8)) | (int )tv_mode->veq_start_f2); if ((int )tv_mode->veq_ena) { vctl3 = vctl3 | 2147483648U; } else { } vctl4 = (u32 )((int )(tv_mode->vburst_start_f1 << 16) | (int )tv_mode->vburst_end_f1); vctl5 = (u32 )((int )(tv_mode->vburst_start_f2 << 16) | (int )tv_mode->vburst_end_f2); vctl6 = (u32 )((int )(tv_mode->vburst_start_f3 << 16) | (int )tv_mode->vburst_end_f3); vctl7 = (u32 )((int )(tv_mode->vburst_start_f4 << 16) | (int )tv_mode->vburst_end_f4); if (intel_crtc->pipe == 1) { tv_ctl = tv_ctl | 1073741824U; } else { } tv_ctl = (u32 )tv_mode->oversample | tv_ctl; if ((int )tv_mode->progressive) { tv_ctl = tv_ctl | 131072U; } else { } if ((int )tv_mode->trilevel_sync) { tv_ctl = tv_ctl | 2097152U; } else { } if ((int )tv_mode->pal_burst) { tv_ctl = tv_ctl | 65536U; } else { } scctl1 = 0U; if ((int )tv_mode->dda1_inc != 0) { scctl1 = scctl1 | 2147483648U; scctl1 = (u32 )(video_levels->burst << 16) | scctl1; } else { } if ((int )tv_mode->dda2_inc != 0) { scctl1 = scctl1 | 1073741824U; } else { } if ((int )tv_mode->dda3_inc != 0) { scctl1 = scctl1 | 536870912U; } else { } scctl1 = (u32 )tv_mode->sc_reset | scctl1; scctl1 = (u32 )tv_mode->dda1_inc | scctl1; scctl2 = (u32 )((int )(tv_mode->dda2_size << 16) | (int )tv_mode->dda2_inc); scctl3 = (u32 )((int )(tv_mode->dda3_size << 16) | (int )tv_mode->dda3_inc); if (dev->pci_device <= 10097) { tv_ctl = tv_ctl | 3072U; } else { } writel(hctl1, (void volatile *)dev_priv->regs + 426032U); writel(hctl2, (void volatile *)dev_priv->regs + 426036U); writel(hctl3, (void volatile *)dev_priv->regs + 426040U); writel(vctl1, (void volatile *)dev_priv->regs + 426044U); writel(vctl2, (void volatile *)dev_priv->regs + 426048U); writel(vctl3, (void volatile *)dev_priv->regs + 426052U); writel(vctl4, (void volatile *)dev_priv->regs + 426056U); writel(vctl5, (void volatile *)dev_priv->regs + 426060U); writel(vctl6, (void volatile *)dev_priv->regs + 426064U); writel(vctl7, (void volatile *)dev_priv->regs + 426068U); writel(scctl1, (void volatile *)dev_priv->regs + 426080U); writel(scctl2, (void volatile *)dev_priv->regs + 426084U); writel(scctl3, (void volatile *)dev_priv->regs + 426088U); if ((unsigned long )color_conversion != (unsigned long )((struct color_conversion const *)0)) { writel((unsigned int )(((int )color_conversion->ry << 16) | (int )color_conversion->gy), (void volatile *)dev_priv->regs + 426000U); writel((unsigned int )(((int )color_conversion->by << 16) | (int )color_conversion->ay), (void volatile *)dev_priv->regs + 426004U); writel((unsigned int )(((int )color_conversion->ru << 16) | (int )color_conversion->gu), (void volatile *)dev_priv->regs + 426008U); writel((unsigned int )(((int )color_conversion->bu << 16) | (int )color_conversion->au), (void volatile *)dev_priv->regs + 426012U); writel((unsigned int )(((int )color_conversion->rv << 16) | (int )color_conversion->gv), (void volatile *)dev_priv->regs + 426016U); writel((unsigned int )(((int )color_conversion->bv << 16) | (int )color_conversion->av), (void volatile *)dev_priv->regs + 426020U); } else { } writel(6316032U, (void volatile *)dev_priv->regs + 426024U); if ((unsigned long )video_levels != (unsigned long )((struct video_levels const *)0)) { writel((unsigned int )((int )(video_levels->black << 16) | (int )video_levels->blank), (void volatile *)dev_priv->regs + 426028U); } else { } pipeconf_reg = intel_crtc->pipe == 0 ? 458760 : 462856; dspcntr_reg = intel_crtc->plane == 0 ? 459136 : 463232; tmp___0 = readl((void const volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); pipeconf = (int )tmp___0; tmp___1 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); dspcntr = (int )tmp___1; dspbase_reg = intel_crtc->plane == 0 ? 459140 : 463236; xpos = 0; ypos = 0; writel((unsigned int )dspcntr & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp___2 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp___2, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); if ((((((dev->pci_device != 9602 && dev->pci_device != 9610) && dev->pci_device != 9618) && dev->pci_device != 10098) && (dev->pci_device != 10146 && dev->pci_device != 10158)) && (((((((((dev->pci_device != 10610 && dev->pci_device != 10626) && dev->pci_device != 10642) && dev->pci_device != 10658) && dev->pci_device != 10754) && dev->pci_device != 10770) && dev->pci_device != 10818) && dev->pci_device != 11778) && dev->pci_device != 11794) && dev->pci_device != 11810)) && ((dev->pci_device != 10690 && dev->pci_device != 10674) && dev->pci_device != 10706)) { intel_wait_for_vblank(dev); } else { } writel((unsigned int )pipeconf & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); intel_wait_for_vblank(dev); writel(2147483648U, (void volatile *)dev_priv->regs + 426112U); xsize = (unsigned int )((int )tv_mode->hblank_start - (int )tv_mode->hblank_end); if ((int )tv_mode->progressive) { ysize = (unsigned int )((int )tv_mode->nbr_end + 1); } else { ysize = (unsigned int )((int )tv_mode->nbr_end * 2 + 1); } xpos = tv_priv->margin[0] + xpos; ypos = tv_priv->margin[1] + ypos; xsize = xsize - (unsigned int )(tv_priv->margin[0] + tv_priv->margin[2]); ysize = ysize - (unsigned int )(tv_priv->margin[1] + tv_priv->margin[3]); writel((unsigned int )((xpos << 16) | ypos), (void volatile *)dev_priv->regs + 426096U); writel((xsize << 16) | ysize, (void volatile *)dev_priv->regs + 426100U); writel((unsigned int )pipeconf, (void volatile *)dev_priv->regs + (unsigned long )pipeconf_reg); writel((unsigned int )dspcntr, (void volatile *)dev_priv->regs + (unsigned long )dspcntr_reg); tmp___3 = readl((void const volatile *)dev_priv->regs + (unsigned long )dspbase_reg); writel(tmp___3, (void volatile *)dev_priv->regs + (unsigned long )dspbase_reg); j = 0; i = 0; goto ldv_26281; ldv_26280: tmp___4 = j; j = j + 1; writel(*(tv_mode->filter_table + (unsigned long )tmp___4), (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426240)); i = i + 1; ldv_26281: ; if (i <= 59) { goto ldv_26280; } else { } i = 0; goto ldv_26284; ldv_26283: tmp___5 = j; j = j + 1; writel(*(tv_mode->filter_table + (unsigned long )tmp___5), (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426496)); i = i + 1; ldv_26284: ; if (i <= 59) { goto ldv_26283; } else { } i = 0; goto ldv_26287; ldv_26286: tmp___6 = j; j = j + 1; writel(*(tv_mode->filter_table + (unsigned long )tmp___6), (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 426752)); i = i + 1; ldv_26287: ; if (i <= 42) { goto ldv_26286; } else { } i = 0; goto ldv_26290; ldv_26289: tmp___7 = j; j = j + 1; writel(*(tv_mode->filter_table + (unsigned long )tmp___7), (void volatile *)dev_priv->regs + (unsigned long )((i << 2) + 427008)); i = i + 1; ldv_26290: ; if (i <= 42) { goto ldv_26289; } else { } writel(0U, (void volatile *)dev_priv->regs + 425988U); writel(tv_ctl, (void volatile *)dev_priv->regs + 425984U); return; } } static struct drm_display_mode const reported_modes[1U] = { {{0, 0}, {0U, 0U}, {'N', 'T', 'S', 'C', ' ', '4', '8', '0', 'i', '\000'}, 0, 0, 64, 107520, 1280, 1368, 1496, 1712, 0, 1024, 1027, 1034, 1104, 0, 0U, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0.f}}; static int intel_tv_detect_type(struct drm_crtc *crtc , struct intel_output *intel_output ) { struct drm_encoder *encoder ; struct drm_device *dev ; struct drm_i915_private *dev_priv ; u32 tv_ctl ; u32 save_tv_ctl ; u32 tv_dac ; u32 save_tv_dac ; int type ; { encoder = & intel_output->enc; dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; type = 0; tv_dac = readl((void const volatile *)dev_priv->regs + 425988U); ldv___ldv_spin_lock_651(& dev_priv->user_irq_lock); i915_disable_pipestat(dev_priv, 0, 67371008U); ldv___ldv_spin_unlock_652(& dev_priv->user_irq_lock); if ((int )intel_output->load_detect_temp) { save_tv_dac = tv_dac; tv_ctl = readl((void const volatile *)dev_priv->regs + 425984U); save_tv_ctl = tv_ctl; tv_ctl = tv_ctl & 2147483647U; tv_ctl = tv_ctl & 4294967288U; tv_ctl = tv_ctl | 7U; tv_dac = tv_dac & 2415919103U; tv_dac = tv_dac | 251658410U; writel(tv_ctl, (void volatile *)dev_priv->regs + 425984U); writel(tv_dac, (void volatile *)dev_priv->regs + 425988U); intel_wait_for_vblank(dev); tv_dac = readl((void const volatile *)dev_priv->regs + 425988U); writel(save_tv_dac, (void volatile *)dev_priv->regs + 425988U); writel(save_tv_ctl, (void volatile *)dev_priv->regs + 425984U); } else { } if ((tv_dac & 1879048192U) == 805306368U) { if (drm_debug != 0U) { printk("<7>[drm:%s] Detected Composite TV connection\n", "intel_tv_detect_type"); } else { } type = 5; } else if ((tv_dac & 1610612736U) == 1073741824U) { if (drm_debug != 0U) { printk("<7>[drm:%s] Detected S-Video TV connection\n", "intel_tv_detect_type"); } else { } type = 6; } else if ((tv_dac & 1879048192U) == 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] Detected Component TV connection\n", "intel_tv_detect_type"); } else { } type = 8; } else { if (drm_debug != 0U) { printk("<7>[drm:%s] No TV connection detected\n", "intel_tv_detect_type"); } else { } type = -1; } ldv___ldv_spin_lock_653(& dev_priv->user_irq_lock); i915_enable_pipestat(dev_priv, 0, 67371008U); ldv___ldv_spin_unlock_654(& dev_priv->user_irq_lock); return (type); } } static enum drm_connector_status intel_tv_detect(struct drm_connector *connector ) { struct drm_crtc *crtc ; struct drm_display_mode mode ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_tv_priv *tv_priv ; struct drm_encoder *encoder ; int dpms_mode ; int type ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; encoder = & intel_output->enc; type = tv_priv->type; mode = reported_modes[0]; drm_mode_set_crtcinfo(& mode, 1); if ((unsigned long )encoder->crtc != (unsigned long )((struct drm_crtc *)0)) { type = intel_tv_detect_type(encoder->crtc, intel_output); } else { crtc = intel_get_load_detect_pipe(intel_output, & mode, & dpms_mode); if ((unsigned long )crtc != (unsigned long )((struct drm_crtc *)0)) { type = intel_tv_detect_type(crtc, intel_output); intel_release_load_detect_pipe(intel_output, dpms_mode); } else { type = -1; } } if (type < 0) { return (connector_status_disconnected); } else { } return (connector_status_connected); } } static struct input_res input_res_table[7U] = { {(char *)"640x480", 640, 480}, {(char *)"800x600", 800, 600}, {(char *)"1024x768", 1024, 768}, {(char *)"1280x1024", 1280, 1024}, {(char *)"848x480", 848, 480}, {(char *)"1280x720", 1280, 720}, {(char *)"1920x1080", 1920, 1080}}; static int intel_tv_get_modes(struct drm_connector *connector ) { struct drm_display_mode *mode_ptr ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct tv_mode const *tv_mode ; struct tv_mode const *tmp ; int j ; struct input_res *input ; unsigned int hactive_s ; unsigned int vactive_s ; void *tmp___0 ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tmp = intel_tv_mode_find(intel_output); tv_mode = tmp; j = 0; goto ldv_26338; ldv_26337: input = (struct input_res *)(& input_res_table) + (unsigned long )j; hactive_s = (unsigned int )input->w; vactive_s = (unsigned int )input->h; if ((int )tv_mode->max_srcw != 0 && input->w > (int )tv_mode->max_srcw) { goto ldv_26336; } else { } if (input->w > 1024 && (! ((_Bool )tv_mode->progressive) && ! ((_Bool )tv_mode->component_only))) { goto ldv_26336; } else { } tmp___0 = drm_calloc(1UL, 224UL, 2); mode_ptr = (struct drm_display_mode *)tmp___0; strncpy((char *)(& mode_ptr->name), (char const *)input->name, 32UL); mode_ptr->hdisplay = (int )hactive_s; mode_ptr->hsync_start = (int )(hactive_s + 1U); mode_ptr->hsync_end = (int )(hactive_s + 64U); if (mode_ptr->hsync_end <= mode_ptr->hsync_start) { mode_ptr->hsync_end = mode_ptr->hsync_start + 1; } else { } mode_ptr->htotal = (int )(hactive_s + 96U); mode_ptr->vdisplay = (int )vactive_s; mode_ptr->vsync_start = (int )(vactive_s + 1U); mode_ptr->vsync_end = (int )(vactive_s + 32U); if (mode_ptr->vsync_end <= mode_ptr->vsync_start) { mode_ptr->vsync_end = mode_ptr->vsync_start + 1; } else { } mode_ptr->vtotal = (int )(vactive_s + 33U); mode_ptr->clock = (((int )tv_mode->refresh * mode_ptr->vtotal) * mode_ptr->htotal) / 1000000; mode_ptr->type = 64; drm_mode_probed_add(connector, mode_ptr); ldv_26336: j = j + 1; ldv_26338: ; if ((unsigned int )j <= 6U) { goto ldv_26337; } else { } return (0); } } static void intel_tv_destroy(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; drm_sysfs_connector_remove(connector); drm_connector_cleanup(connector); drm_free((void *)intel_output, 2560UL, 2); return; } } static int intel_tv_set_property(struct drm_connector *connector , struct drm_property *property , uint64_t val ) { struct drm_device *dev ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_tv_priv *tv_priv ; int ret ; { dev = connector->dev; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; tv_priv = (struct intel_tv_priv *)intel_output->dev_priv; ret = 0; ret = drm_connector_property_set_value(connector, property, val); if (ret < 0) { goto out; } else { } if ((unsigned long )dev->mode_config.tv_left_margin_property == (unsigned long )property) { tv_priv->margin[0] = (int )val; } else if ((unsigned long )dev->mode_config.tv_right_margin_property == (unsigned long )property) { tv_priv->margin[2] = (int )val; } else if ((unsigned long )dev->mode_config.tv_top_margin_property == (unsigned long )property) { tv_priv->margin[1] = (int )val; } else if ((unsigned long )dev->mode_config.tv_bottom_margin_property == (unsigned long )property) { tv_priv->margin[3] = (int )val; } else if ((unsigned long )dev->mode_config.tv_mode_property == (unsigned long )property) { if (val > 14ULL) { ret = -22; goto out; } else { } tv_priv->tv_format = tv_modes[val].name; intel_tv_mode_set(& intel_output->enc, 0, 0); } else { ret = -22; goto out; } intel_tv_mode_set(& intel_output->enc, 0, 0); out: ; return (ret); } } static struct drm_encoder_helper_funcs const intel_tv_helper_funcs = {& intel_tv_dpms, 0, 0, & intel_tv_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit, & intel_tv_mode_set, 0}; static struct drm_connector_funcs const intel_tv_connector_funcs = {0, & intel_tv_save, & intel_tv_restore, & intel_tv_detect, & drm_helper_probe_single_connector_modes, & intel_tv_set_property, & intel_tv_destroy}; static struct drm_connector_helper_funcs const intel_tv_connector_helper_funcs = {& intel_tv_get_modes, (int (*)(struct drm_connector * , struct drm_display_mode * ))(& intel_tv_mode_valid), & intel_best_encoder}; static void intel_tv_enc_destroy(struct drm_encoder *encoder ) { { drm_encoder_cleanup(encoder); return; } } static struct drm_encoder_funcs const intel_tv_enc_funcs = {& intel_tv_enc_destroy}; void intel_tv_init(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct drm_connector *connector ; struct intel_output *intel_output ; struct intel_tv_priv *tv_priv ; u32 tv_dac_on ; u32 tv_dac_off ; u32 save_tv_dac ; char **tv_format_names ; int i ; int initial_mode ; unsigned int tmp ; void *tmp___0 ; void *tmp___1 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; initial_mode = 0; tmp = readl((void const volatile *)dev_priv->regs + 425984U); if ((tmp & 48U) == 32U) { return; } else { } if ((unsigned int )*((unsigned char *)dev_priv + 520UL) == 0U) { return; } else { } save_tv_dac = readl((void const volatile *)dev_priv->regs + 425988U); writel(save_tv_dac | 134217728U, (void volatile *)dev_priv->regs + 425988U); tv_dac_on = readl((void const volatile *)dev_priv->regs + 425988U); writel(save_tv_dac & 4160749567U, (void volatile *)dev_priv->regs + 425988U); tv_dac_off = readl((void const volatile *)dev_priv->regs + 425988U); writel(save_tv_dac, (void volatile *)dev_priv->regs + 425988U); if ((tv_dac_on & 134217728U) == 0U || (tv_dac_off & 134217728U) != 0U) { return; } else { } tmp___0 = drm_calloc(1UL, 2560UL, 2); intel_output = (struct intel_output *)tmp___0; if ((unsigned long )intel_output == (unsigned long )((struct intel_output *)0)) { return; } else { } connector = & intel_output->base; drm_connector_init(dev, connector, & intel_tv_connector_funcs, 6); drm_encoder_init(dev, & intel_output->enc, & intel_tv_enc_funcs, 4); drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc); tv_priv = (struct intel_tv_priv *)intel_output + 1U; intel_output->type = 5; intel_output->enc.possible_crtcs = 3U; intel_output->enc.possible_clones = 32U; intel_output->dev_priv = (void *)tv_priv; tv_priv->type = 0; tv_priv->margin[0] = 54; tv_priv->margin[1] = 36; tv_priv->margin[2] = 46; tv_priv->margin[3] = 37; tv_priv->tv_format = kstrdup((char const *)tv_modes[initial_mode].name, 208U); drm_encoder_helper_add(& intel_output->enc, & intel_tv_helper_funcs); drm_connector_helper_add(connector, & intel_tv_connector_helper_funcs); connector->interlace_allowed = 0; connector->doublescan_allowed = 0; tmp___1 = drm_alloc(120UL, 2); tv_format_names = (char **)tmp___1; if ((unsigned long )tv_format_names == (unsigned long )((char **)0)) { goto out; } else { } i = 0; goto ldv_26380; ldv_26379: *(tv_format_names + (unsigned long )i) = tv_modes[i].name; i = i + 1; ldv_26380: ; if ((unsigned int )i <= 14U) { goto ldv_26379; } else { } drm_mode_create_tv_properties(dev, 15, tv_format_names); drm_connector_attach_property(connector, dev->mode_config.tv_mode_property, (uint64_t )initial_mode); drm_connector_attach_property(connector, dev->mode_config.tv_left_margin_property, (uint64_t )tv_priv->margin[0]); drm_connector_attach_property(connector, dev->mode_config.tv_top_margin_property, (uint64_t )tv_priv->margin[1]); drm_connector_attach_property(connector, dev->mode_config.tv_right_margin_property, (uint64_t )tv_priv->margin[2]); drm_connector_attach_property(connector, dev->mode_config.tv_bottom_margin_property, (uint64_t )tv_priv->margin[3]); out: drm_sysfs_connector_add(connector); return; } } void ldv_main17_sequence_infinite_withcheck_stateful(void) { struct drm_encoder *var_group1 ; int var_intel_tv_dpms_0_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_tv_mode_fixup_6_p2 ; struct drm_display_mode *var_intel_tv_mode_set_7_p2 ; struct drm_connector *var_group3 ; struct drm_property *var_group4 ; uint64_t var_intel_tv_set_property_12_p2 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26420; ldv_26419: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_tv_dpms(var_group1, var_intel_tv_dpms_0_p1); goto ldv_26407; case 1: ldv_handler_precall(); intel_tv_mode_fixup(var_group1, var_group2, var_intel_tv_mode_fixup_6_p2); goto ldv_26407; case 2: ldv_handler_precall(); intel_tv_mode_set(var_group1, var_group2, var_intel_tv_mode_set_7_p2); goto ldv_26407; case 3: ldv_handler_precall(); intel_tv_save(var_group3); goto ldv_26407; case 4: ldv_handler_precall(); intel_tv_restore(var_group3); goto ldv_26407; case 5: ldv_handler_precall(); intel_tv_detect(var_group3); goto ldv_26407; case 6: ldv_handler_precall(); intel_tv_destroy(var_group3); goto ldv_26407; case 7: ldv_handler_precall(); intel_tv_set_property(var_group3, var_group4, var_intel_tv_set_property_12_p2); goto ldv_26407; case 8: ldv_handler_precall(); intel_tv_mode_valid(var_group3, var_group2); goto ldv_26407; case 9: ldv_handler_precall(); intel_tv_get_modes(var_group3); goto ldv_26407; case 10: ldv_handler_precall(); intel_tv_enc_destroy(var_group1); goto ldv_26407; default: ; goto ldv_26407; } ldv_26407: ; ldv_26420: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26419; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_633(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_634(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_635(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_636(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_637(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_638(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_639(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_640(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_641(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_642(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_643(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_644(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_645(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_646(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_647(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_648(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_649(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_650(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_651(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_652(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_653(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_654(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_677(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_680(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_682(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_685(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_686(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_689(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_691(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_693(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_678(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_681(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_683(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_684(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_687(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_688(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_690(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_692(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_694(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_679(spinlock_t *ldv_func_arg1 ) ; struct intel_dvo_dev_ops sil164_ops ; struct intel_dvo_dev_ops ch7xxx_ops ; struct intel_dvo_dev_ops ivch_ops ; struct intel_dvo_dev_ops tfp410_ops ; struct intel_dvo_dev_ops ch7017_ops ; static struct intel_dvo_device intel_dvo_devices[5U] = { {(char *)"sil164", 2, 397664U, 0U, 56, 0, (struct intel_dvo_dev_ops const *)(& sil164_ops), 0, 0, (_Bool)0}, {(char *)"ch7xxx", 2, 397664U, 0U, 118, 0, (struct intel_dvo_dev_ops const *)(& ch7xxx_ops), 0, 0, (_Bool)0}, {(char *)"ivch", 1, 397600U, 0U, 2, 0, (struct intel_dvo_dev_ops const *)(& ivch_ops), 0, 0, (_Bool)0}, {(char *)"tfp410", 2, 397664U, 0U, 56, 0, (struct intel_dvo_dev_ops const *)(& tfp410_ops), 0, 0, (_Bool)0}, {(char *)"ch7017", 1, 397664U, 20512U, 117, 0, (struct intel_dvo_dev_ops const *)(& ch7017_ops), 0, 0, (_Bool)0}}; static void intel_dvo_dpms(struct drm_encoder *encoder , int mode ) { struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_encoder const *__mptr ; struct intel_dvo_device *dvo ; u32 dvo_reg ; u32 temp ; unsigned int tmp ; { dev_priv = (struct drm_i915_private *)(encoder->dev)->dev_private; __mptr = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr + 0xfffffffffffffa38UL; dvo = (struct intel_dvo_device *)intel_output->dev_priv; dvo_reg = dvo->dvo_reg; tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )dvo_reg); temp = tmp; if (mode == 0) { writel(temp | 2147483648U, (void volatile *)dev_priv->regs + (unsigned long )dvo_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dvo_reg); (*((dvo->dev_ops)->dpms))(dvo, mode); } else { (*((dvo->dev_ops)->dpms))(dvo, mode); writel(temp & 2147483647U, (void volatile *)dev_priv->regs + (unsigned long )dvo_reg); readl((void const volatile *)dev_priv->regs + (unsigned long )dvo_reg); } return; } } static void intel_dvo_save(struct drm_connector *connector ) { struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; { dev_priv = (struct drm_i915_private *)(connector->dev)->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; dev_priv->saveDVOA = readl((void const volatile *)dev_priv->regs + 397600U); dev_priv->saveDVOB = readl((void const volatile *)dev_priv->regs + 397632U); dev_priv->saveDVOC = readl((void const volatile *)dev_priv->regs + 397664U); (*((dvo->dev_ops)->save))(dvo); return; } } static void intel_dvo_restore(struct drm_connector *connector ) { struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; { dev_priv = (struct drm_i915_private *)(connector->dev)->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; (*((dvo->dev_ops)->restore))(dvo); writel(dev_priv->saveDVOA, (void volatile *)dev_priv->regs + 397600U); writel(dev_priv->saveDVOB, (void volatile *)dev_priv->regs + 397632U); writel(dev_priv->saveDVOC, (void volatile *)dev_priv->regs + 397664U); return; } } static int intel_dvo_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; int tmp ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; if ((mode->flags & 32U) != 0U) { return (8); } else { } if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { if (mode->hdisplay > (dvo->panel_fixed_mode)->hdisplay) { return (29); } else { } if (mode->vdisplay > (dvo->panel_fixed_mode)->vdisplay) { return (29); } else { } } else { } tmp = (*((dvo->dev_ops)->mode_valid))(dvo, mode); return (tmp); } } static bool intel_dvo_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct intel_output *intel_output ; struct drm_encoder const *__mptr ; struct intel_dvo_device *dvo ; bool tmp ; { __mptr = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr + 0xfffffffffffffa38UL; dvo = (struct intel_dvo_device *)intel_output->dev_priv; if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { adjusted_mode->hdisplay = (dvo->panel_fixed_mode)->hdisplay; adjusted_mode->hsync_start = (dvo->panel_fixed_mode)->hsync_start; adjusted_mode->hsync_end = (dvo->panel_fixed_mode)->hsync_end; adjusted_mode->htotal = (dvo->panel_fixed_mode)->htotal; adjusted_mode->vdisplay = (dvo->panel_fixed_mode)->vdisplay; adjusted_mode->vsync_start = (dvo->panel_fixed_mode)->vsync_start; adjusted_mode->vsync_end = (dvo->panel_fixed_mode)->vsync_end; adjusted_mode->vtotal = (dvo->panel_fixed_mode)->vtotal; adjusted_mode->clock = (dvo->panel_fixed_mode)->clock; drm_mode_set_crtcinfo(adjusted_mode, 1); } else { } if ((unsigned long )(dvo->dev_ops)->mode_fixup != (unsigned long )((bool (*/* const */)(struct intel_dvo_device * , struct drm_display_mode * , struct drm_display_mode * ))0)) { tmp = (*((dvo->dev_ops)->mode_fixup))(dvo, mode, adjusted_mode); return (tmp); } else { } return (1); } } static void intel_dvo_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_crtc *intel_crtc ; struct drm_crtc const *__mptr ; struct intel_output *intel_output ; struct drm_encoder const *__mptr___0 ; struct intel_dvo_device *dvo ; int pipe ; u32 dvo_val ; u32 dvo_reg ; u32 dvo_srcdim_reg ; int dpll_reg ; unsigned int tmp ; unsigned int tmp___0 ; { dev = encoder->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_crtc const *)encoder->crtc; intel_crtc = (struct intel_crtc *)__mptr; __mptr___0 = (struct drm_encoder const *)encoder; intel_output = (struct intel_output *)__mptr___0 + 0xfffffffffffffa38UL; dvo = (struct intel_dvo_device *)intel_output->dev_priv; pipe = intel_crtc->pipe; dvo_reg = dvo->dvo_reg; dpll_reg = pipe == 0 ? 24596 : 24600; switch (dvo_reg) { case (u32 )397600: ; default: dvo_srcdim_reg = 397604U; goto ldv_25976; case (u32 )397632: dvo_srcdim_reg = 397636U; goto ldv_25976; case (u32 )397664: dvo_srcdim_reg = 397668U; goto ldv_25976; } ldv_25976: (*((dvo->dev_ops)->mode_set))(dvo, mode, adjusted_mode); tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )dvo_reg); dvo_val = tmp & 117440576U; dvo_val = dvo_val | 16516U; if (pipe == 1) { dvo_val = dvo_val | 1073741824U; } else { } dvo_val = dvo_val | 268435456U; if ((int )adjusted_mode->flags & 1) { dvo_val = dvo_val | 8U; } else { } if ((adjusted_mode->flags & 4U) != 0U) { dvo_val = dvo_val | 16U; } else { } tmp___0 = readl((void const volatile *)dev_priv->regs + (unsigned long )dpll_reg); writel(tmp___0 | 1073741824U, (void volatile *)dev_priv->regs + (unsigned long )dpll_reg); writel((unsigned int )((adjusted_mode->hdisplay << 12) | adjusted_mode->vdisplay), (void volatile *)dev_priv->regs + (unsigned long )dvo_srcdim_reg); writel(dvo_val, (void volatile *)dev_priv->regs + (unsigned long )dvo_reg); return; } } static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; enum drm_connector_status tmp ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; tmp = (*((dvo->dev_ops)->detect))(dvo); return (tmp); } } static int intel_dvo_get_modes(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; int tmp ; struct drm_display_mode *mode ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; intel_ddc_get_modes(intel_output); tmp = list_empty((struct list_head const *)(& connector->probed_modes)); if (tmp == 0) { return (1); } else { } if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode); if ((unsigned long )mode != (unsigned long )((struct drm_display_mode *)0)) { drm_mode_probed_add(connector, mode); return (1); } else { } } else { } return (0); } } static void intel_dvo_destroy(struct drm_connector *connector ) { struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; { __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; if ((unsigned long )dvo != (unsigned long )((struct intel_dvo_device *)0)) { if ((unsigned long )(dvo->dev_ops)->destroy != (unsigned long )((void (*/* const */)(struct intel_dvo_device * ))0)) { (*((dvo->dev_ops)->destroy))(dvo); } else { } if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((struct drm_display_mode *)0)) { kfree((void const *)dvo->panel_fixed_mode); } else { } } else { } if ((unsigned long )intel_output->i2c_bus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(intel_output->i2c_bus); } else { } if ((unsigned long )intel_output->ddc_bus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(intel_output->ddc_bus); } else { } drm_sysfs_connector_remove(connector); drm_connector_cleanup(connector); kfree((void const *)intel_output); return; } } static struct drm_encoder_helper_funcs const intel_dvo_helper_funcs = {& intel_dvo_dpms, 0, 0, & intel_dvo_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit, & intel_dvo_mode_set, 0}; static struct drm_connector_funcs const intel_dvo_connector_funcs = {0, & intel_dvo_save, & intel_dvo_restore, & intel_dvo_detect, & drm_helper_probe_single_connector_modes, 0, & intel_dvo_destroy}; static struct drm_connector_helper_funcs const intel_dvo_connector_helper_funcs = {& intel_dvo_get_modes, & intel_dvo_mode_valid, & intel_best_encoder}; static void intel_dvo_enc_destroy(struct drm_encoder *encoder ) { { drm_encoder_cleanup(encoder); return; } } static struct drm_encoder_funcs const intel_dvo_enc_funcs = {& intel_dvo_enc_destroy}; static struct drm_display_mode *intel_dvo_get_current_mode(struct drm_connector *connector ) { struct drm_device *dev ; struct drm_i915_private *dev_priv ; struct intel_output *intel_output ; struct drm_connector const *__mptr ; struct intel_dvo_device *dvo ; uint32_t dvo_reg ; uint32_t dvo_val ; unsigned int tmp ; struct drm_display_mode *mode ; struct drm_crtc *crtc ; int pipe ; { dev = connector->dev; dev_priv = (struct drm_i915_private *)dev->dev_private; __mptr = (struct drm_connector const *)connector; intel_output = (struct intel_output *)__mptr; dvo = (struct intel_dvo_device *)intel_output->dev_priv; dvo_reg = dvo->dvo_reg; tmp = readl((void const volatile *)dev_priv->regs + (unsigned long )dvo_reg); dvo_val = tmp; mode = 0; if ((int )dvo_val < 0) { pipe = (dvo_val & 1073741824U) != 0U; crtc = intel_get_crtc_from_pipe(dev, pipe); if ((unsigned long )crtc != (unsigned long )((struct drm_crtc *)0)) { mode = intel_crtc_mode_get(dev, crtc); if ((unsigned long )mode != (unsigned long )((struct drm_display_mode *)0)) { mode->type = mode->type | 8; if ((dvo_val & 8U) != 0U) { mode->flags = mode->flags | 1U; } else { } if ((dvo_val & 16U) != 0U) { mode->flags = mode->flags | 4U; } else { } } else { } } else { } } else { } return (mode); } } void intel_dvo_init(struct drm_device *dev ) { struct intel_output *intel_output ; struct intel_dvo_device *dvo ; struct intel_i2c_chan *i2cbus ; int ret ; int i ; int gpio_inited ; int encoder_type ; void *tmp ; struct drm_connector *connector ; int gpio ; bool tmp___0 ; { i2cbus = 0; ret = 0; gpio_inited = 0; encoder_type = 0; tmp = kzalloc(1592UL, 208U); intel_output = (struct intel_output *)tmp; if ((unsigned long )intel_output == (unsigned long )((struct intel_output *)0)) { return; } else { } intel_output->ddc_bus = intel_i2c_create(dev, 20508U, "DVODDC_D"); if ((unsigned long )intel_output->ddc_bus == (unsigned long )((struct intel_i2c_chan *)0)) { goto free_intel; } else { } i = 0; goto ldv_26040; ldv_26039: connector = & intel_output->base; dvo = (struct intel_dvo_device *)(& intel_dvo_devices) + (unsigned long )i; if (dvo->gpio != 0U) { gpio = (int )dvo->gpio; } else if (dvo->type == 1) { gpio = 20500; } else { gpio = 20512; } if (gpio_inited != gpio) { if ((unsigned long )i2cbus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(i2cbus); } else { } i2cbus = intel_i2c_create(dev, (u32 const )gpio, gpio == 20500 ? "DVOI2C_B" : "DVOI2C_E"); if ((unsigned long )i2cbus == (unsigned long )((struct intel_i2c_chan *)0)) { goto ldv_26035; } else { } gpio_inited = gpio; } else { } if ((unsigned long )dvo->dev_ops != (unsigned long )((struct intel_dvo_dev_ops const *)0)) { tmp___0 = (*((dvo->dev_ops)->init))(dvo, i2cbus); ret = (int )tmp___0; } else { ret = 0; } if (ret == 0) { goto ldv_26035; } else { } intel_output->type = 2; switch (dvo->type) { case 2: drm_connector_init(dev, connector, & intel_dvo_connector_funcs, 2); encoder_type = 2; goto ldv_26037; case 1: drm_connector_init(dev, connector, & intel_dvo_connector_funcs, 7); encoder_type = 3; goto ldv_26037; } ldv_26037: drm_connector_helper_add(connector, & intel_dvo_connector_helper_funcs); connector->display_info.subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = 0; connector->doublescan_allowed = 0; intel_output->dev_priv = (void *)dvo; intel_output->i2c_bus = i2cbus; drm_encoder_init(dev, & intel_output->enc, & intel_dvo_enc_funcs, encoder_type); drm_encoder_helper_add(& intel_output->enc, & intel_dvo_helper_funcs); drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc); if (dvo->type == 1) { dvo->panel_fixed_mode = intel_dvo_get_current_mode(connector); dvo->panel_wants_dither = 1; } else { } drm_sysfs_connector_add(connector); return; ldv_26035: i = i + 1; ldv_26040: ; if ((unsigned int )i <= 4U) { goto ldv_26039; } else { } intel_i2c_destroy(intel_output->ddc_bus); if ((unsigned long )i2cbus != (unsigned long )((struct intel_i2c_chan *)0)) { intel_i2c_destroy(i2cbus); } else { } free_intel: kfree((void const *)intel_output); return; } } void ldv_main18_sequence_infinite_withcheck_stateful(void) { struct drm_encoder *var_group1 ; int var_intel_dvo_dpms_0_p1 ; struct drm_display_mode *var_group2 ; struct drm_display_mode *var_intel_dvo_mode_fixup_4_p2 ; struct drm_display_mode *var_intel_dvo_mode_set_5_p2 ; struct drm_connector *var_group3 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_26077; ldv_26076: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_dvo_dpms(var_group1, var_intel_dvo_dpms_0_p1); goto ldv_26065; case 1: ldv_handler_precall(); intel_dvo_mode_fixup(var_group1, var_group2, var_intel_dvo_mode_fixup_4_p2); goto ldv_26065; case 2: ldv_handler_precall(); intel_dvo_mode_set(var_group1, var_group2, var_intel_dvo_mode_set_5_p2); goto ldv_26065; case 3: ldv_handler_precall(); intel_dvo_save(var_group3); goto ldv_26065; case 4: ldv_handler_precall(); intel_dvo_restore(var_group3); goto ldv_26065; case 5: ldv_handler_precall(); intel_dvo_detect(var_group3); goto ldv_26065; case 6: ldv_handler_precall(); intel_dvo_destroy(var_group3); goto ldv_26065; case 7: ldv_handler_precall(); intel_dvo_mode_valid(var_group3, var_group2); goto ldv_26065; case 8: ldv_handler_precall(); intel_dvo_get_modes(var_group3); goto ldv_26065; case 9: ldv_handler_precall(); intel_dvo_enc_destroy(var_group1); goto ldv_26065; default: ; goto ldv_26065; } ldv_26065: ; ldv_26077: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_26076; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_677(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_678(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_679(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_680(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_681(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_682(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_683(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_684(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_685(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_686(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_687(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_688(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_689(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_690(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_691(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_692(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_693(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_694(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_713(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_716(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_718(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_721(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_722(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_725(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_727(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_729(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_714(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_717(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_719(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_720(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_723(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_724(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_726(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_728(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_730(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_715(spinlock_t *ldv_func_arg1 ) ; static struct ch7xxx_id_struct ch7xxx_ids[4U] = { {131U, (char *)"CH7011"}, {132U, (char *)"CH7009A"}, {133U, (char *)"CH7009B"}, {149U, (char *)"CH7301"}}; static void ch7xxx_save(struct intel_dvo_device *dvo ) ; static char *ch7xxx_get_id(uint8_t vid ) { int i ; { i = 0; goto ldv_24993; ldv_24992: ; if ((int )ch7xxx_ids[i].vid == (int )vid) { return (ch7xxx_ids[i].name); } else { } i = i + 1; ldv_24993: ; if ((unsigned int )i <= 3U) { goto ldv_24992; } else { } return (0); } } static bool ch7xxx_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch ) { struct ch7xxx_priv *ch7xxx ; struct intel_i2c_chan *i2cbus ; u8 out_buf[2U] ; u8 in_buf[2U] ; struct i2c_msg msgs[2U] ; int tmp ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msgs[0].addr = (unsigned short )i2cbus->slave_addr; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = (unsigned short )i2cbus->slave_addr; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& in_buf); out_buf[0] = (u8 )addr; out_buf[1] = 0U; tmp = i2c_transfer(& i2cbus->adapter, (struct i2c_msg *)(& msgs), 2); if (tmp == 2) { *ch = in_buf[0]; return (1); } else { } if (! ch7xxx->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "ch7xxx_readb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool ch7xxx_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch ) { struct ch7xxx_priv *ch7xxx ; struct intel_i2c_chan *i2cbus ; uint8_t out_buf[2U] ; struct i2c_msg msg ; int tmp ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msg.addr = (unsigned short )i2cbus->slave_addr; msg.flags = 0U; msg.len = 2U; msg.buf = (__u8 *)(& out_buf); out_buf[0] = (uint8_t )addr; out_buf[1] = ch; tmp = i2c_transfer(& i2cbus->adapter, & msg, 1); if (tmp == 1) { return (1); } else { } if (! ch7xxx->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "ch7xxx_writeb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool ch7xxx_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) { struct ch7xxx_priv *ch7xxx ; uint8_t vendor ; uint8_t device ; char *name ; void *tmp ; bool tmp___0 ; int tmp___1 ; bool tmp___2 ; int tmp___3 ; { tmp = kzalloc(161UL, 208U); ch7xxx = (struct ch7xxx_priv *)tmp; if ((unsigned long )ch7xxx == (unsigned long )((struct ch7xxx_priv *)0)) { return (0); } else { } dvo->i2c_bus = i2cbus; (dvo->i2c_bus)->slave_addr = (u8 )dvo->slave_addr; dvo->dev_priv = (void *)ch7xxx; ch7xxx->quiet = 1; tmp___0 = ch7xxx_readb(dvo, 74, & vendor); if (tmp___0) { tmp___1 = 0; } else { tmp___1 = 1; } if (tmp___1) { goto out; } else { } name = ch7xxx_get_id((int )vendor); if ((unsigned long )name == (unsigned long )((char *)0)) { if (drm_debug != 0U) { printk("<7>[drm:%s] ch7xxx not detected; got 0x%02x from %s slave %d.\n", "ch7xxx_init", (int )vendor, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } tmp___2 = ch7xxx_readb(dvo, 75, & device); if (tmp___2) { tmp___3 = 0; } else { tmp___3 = 1; } if (tmp___3) { goto out; } else { } if ((unsigned int )device != 23U) { if (drm_debug != 0U) { printk("<7>[drm:%s] ch7xxx not detected; got 0x%02x from %s slave %d.\n", "ch7xxx_init", (int )vendor, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } ch7xxx->quiet = 0; if (drm_debug != 0U) { printk("<7>[drm:%s] Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n", "ch7xxx_init", name, (int )vendor, (int )device); } else { } return (1); out: kfree((void const *)ch7xxx); return (0); } } static enum drm_connector_status ch7xxx_detect(struct intel_dvo_device *dvo ) { uint8_t cdet ; uint8_t orig_pm ; uint8_t pm ; { ch7xxx_readb(dvo, 73, & orig_pm); pm = orig_pm; pm = (unsigned int )pm & 254U; pm = (uint8_t )((unsigned int )pm | 192U); ch7xxx_writeb(dvo, 73, (int )pm); ch7xxx_readb(dvo, 32, & cdet); ch7xxx_writeb(dvo, 73, (int )orig_pm); if (((int )cdet & 32) != 0) { return (connector_status_connected); } else { } return (connector_status_disconnected); } } static enum drm_mode_status ch7xxx_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) { { if (mode->clock > 165000) { return (MODE_CLOCK_HIGH); } else { } return (MODE_OK); } } static void ch7xxx_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { uint8_t tvco ; uint8_t tpcp ; uint8_t tpd ; uint8_t tlpf ; uint8_t idf ; { if (mode->clock <= 65000) { tvco = 35U; tpcp = 8U; tpd = 22U; tlpf = 96U; } else { tvco = 45U; tpcp = 6U; tpd = 38U; tlpf = 160U; } ch7xxx_writeb(dvo, 49, 0); ch7xxx_writeb(dvo, 50, (int )tvco); ch7xxx_writeb(dvo, 51, (int )tpcp); ch7xxx_writeb(dvo, 52, (int )tpd); ch7xxx_writeb(dvo, 53, 48); ch7xxx_writeb(dvo, 54, (int )tlpf); ch7xxx_writeb(dvo, 55, 0); ch7xxx_readb(dvo, 31, & idf); idf = (unsigned int )idf & 231U; if ((int )mode->flags & 1) { idf = (uint8_t )((unsigned int )idf | 8U); } else { } if ((mode->flags & 4U) != 0U) { idf = (uint8_t )((unsigned int )idf | 8U); } else { } ch7xxx_writeb(dvo, 31, (int )idf); return; } } static void ch7xxx_dpms(struct intel_dvo_device *dvo , int mode ) { { if (mode == 0) { ch7xxx_writeb(dvo, 73, 192); } else { ch7xxx_writeb(dvo, 73, 1); } return; } } static void ch7xxx_dump_regs(struct intel_dvo_device *dvo ) { struct ch7xxx_priv *ch7xxx ; int i ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; i = 0; goto ldv_25057; ldv_25056: ; if (((unsigned int )i & 7U) == 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] \n %02X: ", "ch7xxx_dump_regs", i); } else { } } else { } if (drm_debug != 0U) { printk("<7>[drm:%s] %02X ", "ch7xxx_dump_regs", (int )ch7xxx->mode_reg.regs[i]); } else { } i = i + 1; ldv_25057: ; if (i <= 75) { goto ldv_25056; } else { } return; } } static void ch7xxx_save(struct intel_dvo_device *dvo ) { struct ch7xxx_priv *ch7xxx ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; ch7xxx_readb(dvo, 49, & ch7xxx->save_TCTL); ch7xxx_readb(dvo, 51, & ch7xxx->save_TPCP); ch7xxx_readb(dvo, 52, & ch7xxx->save_TPD); ch7xxx_readb(dvo, 53, & ch7xxx->save_TPVT); ch7xxx_readb(dvo, 54, & ch7xxx->save_TLPF); ch7xxx_readb(dvo, 73, & ch7xxx->save_PM); ch7xxx_readb(dvo, 31, & ch7xxx->save_IDF); return; } } static void ch7xxx_restore(struct intel_dvo_device *dvo ) { struct ch7xxx_priv *ch7xxx ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; ch7xxx_writeb(dvo, 49, (int )ch7xxx->save_TCTL); ch7xxx_writeb(dvo, 51, (int )ch7xxx->save_TPCP); ch7xxx_writeb(dvo, 52, (int )ch7xxx->save_TPD); ch7xxx_writeb(dvo, 53, (int )ch7xxx->save_TPVT); ch7xxx_writeb(dvo, 54, (int )ch7xxx->save_TLPF); ch7xxx_writeb(dvo, 31, (int )ch7xxx->save_IDF); ch7xxx_writeb(dvo, 73, (int )ch7xxx->save_PM); return; } } static void ch7xxx_destroy(struct intel_dvo_device *dvo ) { struct ch7xxx_priv *ch7xxx ; { ch7xxx = (struct ch7xxx_priv *)dvo->dev_priv; if ((unsigned long )ch7xxx != (unsigned long )((struct ch7xxx_priv *)0)) { kfree((void const *)ch7xxx); dvo->dev_priv = 0; } else { } return; } } struct intel_dvo_dev_ops ch7xxx_ops = {& ch7xxx_init, 0, & ch7xxx_dpms, & ch7xxx_save, & ch7xxx_restore, (int (*)(struct intel_dvo_device * , struct drm_display_mode * ))(& ch7xxx_mode_valid), 0, 0, 0, & ch7xxx_mode_set, & ch7xxx_detect, 0, & ch7xxx_destroy, & ch7xxx_dump_regs}; void ldv_main19_sequence_infinite_withcheck_stateful(void) { struct intel_dvo_device *var_group1 ; struct intel_i2c_chan *var_group2 ; struct drm_display_mode *var_group3 ; struct drm_display_mode *var_ch7xxx_mode_set_6_p2 ; int var_ch7xxx_dpms_7_p1 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25105; ldv_25104: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); ch7xxx_init(var_group1, var_group2); goto ldv_25094; case 1: ldv_handler_precall(); ch7xxx_detect(var_group1); goto ldv_25094; case 2: ldv_handler_precall(); ch7xxx_mode_valid(var_group1, var_group3); goto ldv_25094; case 3: ldv_handler_precall(); ch7xxx_mode_set(var_group1, var_group3, var_ch7xxx_mode_set_6_p2); goto ldv_25094; case 4: ldv_handler_precall(); ch7xxx_dpms(var_group1, var_ch7xxx_dpms_7_p1); goto ldv_25094; case 5: ldv_handler_precall(); ch7xxx_dump_regs(var_group1); goto ldv_25094; case 6: ldv_handler_precall(); ch7xxx_save(var_group1); goto ldv_25094; case 7: ldv_handler_precall(); ch7xxx_restore(var_group1); goto ldv_25094; case 8: ldv_handler_precall(); ch7xxx_destroy(var_group1); goto ldv_25094; default: ; goto ldv_25094; } ldv_25094: ; ldv_25105: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25104; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_713(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_714(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_715(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_716(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_717(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_718(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_719(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_720(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_721(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_722(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_723(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_724(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_725(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_726(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_727(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_728(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_729(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_730(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_749(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_752(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_754(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_757(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_758(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_761(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_763(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_765(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_750(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_753(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_755(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_756(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_759(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_760(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_762(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_764(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_766(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_751(spinlock_t *ldv_func_arg1 ) ; static void ch7017_dump_regs(struct intel_dvo_device *dvo ) ; static void ch7017_dpms(struct intel_dvo_device *dvo , int mode ) ; static bool ch7017_read(struct intel_dvo_device *dvo , int addr , uint8_t *val ) { struct intel_i2c_chan *i2cbus ; u8 out_buf[2U] ; u8 in_buf[2U] ; struct i2c_msg msgs[2U] ; int tmp ; { i2cbus = dvo->i2c_bus; msgs[0].addr = (unsigned short )i2cbus->slave_addr; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = (unsigned short )i2cbus->slave_addr; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& in_buf); out_buf[0] = (u8 )addr; out_buf[1] = 0U; tmp = i2c_transfer(& i2cbus->adapter, (struct i2c_msg *)(& msgs), 2); if (tmp == 2) { *val = in_buf[0]; return (1); } else { } return (0); } } static bool ch7017_write(struct intel_dvo_device *dvo , int addr , uint8_t val ) { struct intel_i2c_chan *i2cbus ; uint8_t out_buf[2U] ; struct i2c_msg msg ; int tmp ; { i2cbus = dvo->i2c_bus; msg.addr = (unsigned short )i2cbus->slave_addr; msg.flags = 0U; msg.len = 2U; msg.buf = (__u8 *)(& out_buf); out_buf[0] = (uint8_t )addr; out_buf[1] = val; tmp = i2c_transfer(& i2cbus->adapter, & msg, 1); if (tmp == 1) { return (1); } else { } return (0); } } static bool ch7017_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) { struct ch7017_priv *priv ; uint8_t val ; void *tmp ; bool tmp___0 ; int tmp___1 ; { tmp = kzalloc(10UL, 208U); priv = (struct ch7017_priv *)tmp; if ((unsigned long )priv == (unsigned long )((struct ch7017_priv *)0)) { return (0); } else { } dvo->i2c_bus = i2cbus; (dvo->i2c_bus)->slave_addr = (u8 )dvo->slave_addr; dvo->dev_priv = (void *)priv; tmp___0 = ch7017_read(dvo, 75, & val); if (tmp___0) { tmp___1 = 0; } else { tmp___1 = 1; } if (tmp___1) { goto fail; } else { } if (((unsigned int )val != 27U && (unsigned int )val != 26U) && (unsigned int )val != 25U) { if (drm_debug != 0U) { printk("<7>[drm:%s] ch701x not detected, got %d: from %s Slave %d.\n", "ch7017_init", (int )val, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto fail; } else { } return (1); fail: kfree((void const *)priv); return (0); } } static enum drm_connector_status ch7017_detect(struct intel_dvo_device *dvo ) { { return (connector_status_unknown); } } static enum drm_mode_status ch7017_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) { { if (mode->clock > 160000) { return (MODE_CLOCK_HIGH); } else { } return (MODE_OK); } } static void ch7017_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { uint8_t lvds_pll_feedback_div ; uint8_t lvds_pll_vco_control ; uint8_t outputs_enable ; uint8_t lvds_control_2 ; uint8_t lvds_power_down ; uint8_t horizontal_active_pixel_input ; uint8_t horizontal_active_pixel_output ; uint8_t vertical_active_line_output ; uint8_t active_input_line_output ; { if (drm_debug != 0U) { printk("<7>[drm:%s] Registers before mode setting\n", "ch7017_mode_set"); } else { } ch7017_dump_regs(dvo); if (mode->clock <= 99999) { outputs_enable = 8U; lvds_pll_feedback_div = 173U; lvds_pll_vco_control = 163U; lvds_control_2 = 32U; } else { outputs_enable = 11U; lvds_pll_feedback_div = 163U; lvds_pll_feedback_div = 35U; lvds_control_2 = 96U; outputs_enable = (uint8_t )((unsigned int )outputs_enable | 16U); lvds_pll_vco_control = 173U; } horizontal_active_pixel_input = (uint8_t )mode->hdisplay; vertical_active_line_output = (uint8_t )mode->vdisplay; horizontal_active_pixel_output = (uint8_t )mode->hdisplay; active_input_line_output = (uint8_t )((int )((signed char )((mode->hdisplay & 1792) >> 8)) | (int )((signed char )(((mode->vdisplay & 1792) >> 8) << 3))); lvds_power_down = (uint8_t )((int )((signed char )((mode->hdisplay & 1792) >> 8)) | 8); ch7017_dpms(dvo, 3); ch7017_write(dvo, 95, (int )horizontal_active_pixel_input); ch7017_write(dvo, 98, (int )horizontal_active_pixel_output); ch7017_write(dvo, 97, (int )vertical_active_line_output); ch7017_write(dvo, 96, (int )active_input_line_output); ch7017_write(dvo, 114, (int )lvds_pll_vco_control); ch7017_write(dvo, 113, (int )lvds_pll_feedback_div); ch7017_write(dvo, 120, (int )lvds_control_2); ch7017_write(dvo, 115, (int )outputs_enable); ch7017_write(dvo, 99, (int )lvds_power_down); if (drm_debug != 0U) { printk("<7>[drm:%s] Registers after mode setting\n", "ch7017_mode_set"); } else { } ch7017_dump_regs(dvo); return; } } static void ch7017_dpms(struct intel_dvo_device *dvo , int mode ) { uint8_t val ; { ch7017_read(dvo, 99, & val); ch7017_write(dvo, 73, 62); if (mode == 0) { ch7017_write(dvo, 99, (int )val & 191); } else { ch7017_write(dvo, 99, (int )((unsigned int )val | 64U)); } __const_udelay(85900000UL); return; } } static void ch7017_dump_regs(struct intel_dvo_device *dvo ) { uint8_t val ; { ch7017_read(dvo, 95, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 98, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 97, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_VERTICAL_ACTIVE_LINE_OUTPUT: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 96, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_ACTIVE_INPUT_LINE_OUTPUT: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 114, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_LVDS_PLL_VCO_CONTROL: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 113, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_LVDS_PLL_FEEDBACK_DIV: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 120, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_LVDS_CONTROL_2: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 115, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_OUTPUTS_ENABLE: %02x\n", "ch7017_dump_regs", (int )val); } else { } ch7017_read(dvo, 99, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] CH7017_LVDS_POWER_DOWN: %02x\n", "ch7017_dump_regs", (int )val); } else { } return; } } static void ch7017_save(struct intel_dvo_device *dvo ) { struct ch7017_priv *priv ; { priv = (struct ch7017_priv *)dvo->dev_priv; ch7017_read(dvo, 95, & priv->save_hapi); ch7017_read(dvo, 97, & priv->save_valo); ch7017_read(dvo, 96, & priv->save_ailo); ch7017_read(dvo, 114, & priv->save_lvds_pll_vco); ch7017_read(dvo, 113, & priv->save_feedback_div); ch7017_read(dvo, 120, & priv->save_lvds_control_2); ch7017_read(dvo, 115, & priv->save_outputs_enable); ch7017_read(dvo, 99, & priv->save_lvds_power_down); ch7017_read(dvo, 73, & priv->save_power_management); return; } } static void ch7017_restore(struct intel_dvo_device *dvo ) { struct ch7017_priv *priv ; { priv = (struct ch7017_priv *)dvo->dev_priv; ch7017_dpms(dvo, 3); ch7017_write(dvo, 95, (int )priv->save_hapi); ch7017_write(dvo, 97, (int )priv->save_valo); ch7017_write(dvo, 96, (int )priv->save_ailo); ch7017_write(dvo, 114, (int )priv->save_lvds_pll_vco); ch7017_write(dvo, 113, (int )priv->save_feedback_div); ch7017_write(dvo, 120, (int )priv->save_lvds_control_2); ch7017_write(dvo, 115, (int )priv->save_outputs_enable); ch7017_write(dvo, 99, (int )priv->save_lvds_power_down); ch7017_write(dvo, 73, (int )priv->save_power_management); return; } } static void ch7017_destroy(struct intel_dvo_device *dvo ) { struct ch7017_priv *priv ; { priv = (struct ch7017_priv *)dvo->dev_priv; if ((unsigned long )priv != (unsigned long )((struct ch7017_priv *)0)) { kfree((void const *)priv); dvo->dev_priv = 0; } else { } return; } } struct intel_dvo_dev_ops ch7017_ops = {& ch7017_init, 0, & ch7017_dpms, & ch7017_save, & ch7017_restore, (int (*)(struct intel_dvo_device * , struct drm_display_mode * ))(& ch7017_mode_valid), 0, 0, 0, & ch7017_mode_set, & ch7017_detect, 0, & ch7017_destroy, & ch7017_dump_regs}; void ldv_main20_sequence_infinite_withcheck_stateful(void) { struct intel_dvo_device *var_group1 ; struct intel_i2c_chan *var_group2 ; struct drm_display_mode *var_group3 ; struct drm_display_mode *var_ch7017_mode_set_5_p2 ; int var_ch7017_dpms_6_p1 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25087; ldv_25086: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); ch7017_init(var_group1, var_group2); goto ldv_25076; case 1: ldv_handler_precall(); ch7017_detect(var_group1); goto ldv_25076; case 2: ldv_handler_precall(); ch7017_mode_valid(var_group1, var_group3); goto ldv_25076; case 3: ldv_handler_precall(); ch7017_mode_set(var_group1, var_group3, var_ch7017_mode_set_5_p2); goto ldv_25076; case 4: ldv_handler_precall(); ch7017_dpms(var_group1, var_ch7017_dpms_6_p1); goto ldv_25076; case 5: ldv_handler_precall(); ch7017_dump_regs(var_group1); goto ldv_25076; case 6: ldv_handler_precall(); ch7017_save(var_group1); goto ldv_25076; case 7: ldv_handler_precall(); ch7017_restore(var_group1); goto ldv_25076; case 8: ldv_handler_precall(); ch7017_destroy(var_group1); goto ldv_25076; default: ; goto ldv_25076; } ldv_25076: ; ldv_25087: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25086; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_749(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_750(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_751(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_752(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_753(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_754(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_755(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_756(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_757(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_758(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_759(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_760(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_761(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_762(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_763(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_764(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_765(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_766(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_785(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_788(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_790(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_793(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_794(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_797(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_799(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_801(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_786(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_789(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_791(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_792(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_795(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_796(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_798(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_800(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_802(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_787(spinlock_t *ldv_func_arg1 ) ; static void ivch_dump_regs(struct intel_dvo_device *dvo ) ; static bool ivch_read(struct intel_dvo_device *dvo , int addr , uint16_t *data ) { struct ivch_priv *priv ; struct intel_i2c_chan *i2cbus ; u8 out_buf[1U] ; u8 in_buf[2U] ; struct i2c_msg msgs[3U] ; int tmp ; { priv = (struct ivch_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msgs[0].addr = (unsigned short )i2cbus->slave_addr; msgs[0].flags = 1U; msgs[0].len = 0U; msgs[0].buf = 0; msgs[1].addr = 0U; msgs[1].flags = 16384U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& out_buf); msgs[2].addr = (unsigned short )i2cbus->slave_addr; msgs[2].flags = 16385U; msgs[2].len = 2U; msgs[2].buf = (__u8 *)(& in_buf); out_buf[0] = (u8 )addr; tmp = i2c_transfer(& i2cbus->adapter, (struct i2c_msg *)(& msgs), 3); if (tmp == 3) { *data = (uint16_t )((int )((short )((int )in_buf[1] << 8)) | (int )((short )in_buf[0])); return (1); } else { } if (! priv->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "ivch_read", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool ivch_write(struct intel_dvo_device *dvo , int addr , uint16_t data ) { struct ivch_priv *priv ; struct intel_i2c_chan *i2cbus ; u8 out_buf[3U] ; struct i2c_msg msg ; int tmp ; { priv = (struct ivch_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msg.addr = (unsigned short )i2cbus->slave_addr; msg.flags = 0U; msg.len = 3U; msg.buf = (__u8 *)(& out_buf); out_buf[0] = (u8 )addr; out_buf[1] = (u8 )data; out_buf[2] = (u8 )((int )data >> 8); tmp = i2c_transfer(& i2cbus->adapter, & msg, 1); if (tmp == 1) { return (1); } else { } if (! priv->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "ivch_write", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool ivch_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) { struct ivch_priv *priv ; uint16_t temp ; void *tmp ; bool tmp___0 ; int tmp___1 ; { tmp = kzalloc(10UL, 208U); priv = (struct ivch_priv *)tmp; if ((unsigned long )priv == (unsigned long )((struct ivch_priv *)0)) { return (0); } else { } dvo->i2c_bus = i2cbus; (dvo->i2c_bus)->slave_addr = (u8 )dvo->slave_addr; dvo->dev_priv = (void *)priv; priv->quiet = 1; tmp___0 = ivch_read(dvo, 0, & temp); if (tmp___0) { tmp___1 = 0; } else { tmp___1 = 1; } if (tmp___1) { goto out; } else { } priv->quiet = 0; if (((int )temp & 127) != dvo->slave_addr) { if (drm_debug != 0U) { printk("<7>[drm:%s] ivch detect failed due to address mismatch (%d vs %d)\n", "ivch_init", (int )temp & 127, dvo->slave_addr); } else { } goto out; } else { } ivch_read(dvo, 32, & priv->width); ivch_read(dvo, 32, & priv->height); return (1); out: kfree((void const *)priv); return (0); } } static enum drm_connector_status ivch_detect(struct intel_dvo_device *dvo ) { { return (connector_status_connected); } } static enum drm_mode_status ivch_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) { { if (mode->clock > 112000) { return (MODE_CLOCK_HIGH); } else { } return (MODE_OK); } } static void ivch_dpms(struct intel_dvo_device *dvo , int mode ) { int i ; uint16_t vr01 ; uint16_t vr30 ; uint16_t backlight ; bool tmp ; int tmp___0 ; bool tmp___1 ; int tmp___2 ; { tmp = ivch_read(dvo, 1, & vr01); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } if (mode == 0) { backlight = 1U; } else { backlight = 0U; } ivch_write(dvo, 128, (int )backlight); if (mode == 0) { vr01 = (uint16_t )((unsigned int )vr01 | 5U); } else { vr01 = (unsigned int )vr01 & 65530U; } ivch_write(dvo, 1, (int )vr01); i = 0; goto ldv_25022; ldv_25021: tmp___1 = ivch_read(dvo, 48, & vr30); if (tmp___1) { tmp___2 = 0; } else { tmp___2 = 1; } if (tmp___2) { goto ldv_25020; } else { } if (((int )((short )vr30) >= 0) ^ (mode == 0)) { goto ldv_25020; } else { } __const_udelay(4295000UL); i = i + 1; ldv_25022: ; if (i <= 99) { goto ldv_25021; } else { } ldv_25020: __const_udelay(68720000UL); return; } } static void ivch_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { uint16_t vr40 ; uint16_t vr01 ; uint16_t x_ratio ; uint16_t y_ratio ; { vr40 = 0U; vr01 = 0U; vr40 = 13312U; if (mode->hdisplay != adjusted_mode->hdisplay || mode->vdisplay != adjusted_mode->vdisplay) { vr01 = (uint16_t )((unsigned int )vr01 | 8U); vr40 = (uint16_t )((unsigned int )vr40 | 256U); x_ratio = (uint16_t )(((mode->hdisplay + -1) << 16) / (adjusted_mode->hdisplay + -1) >> 2); y_ratio = (uint16_t )(((mode->vdisplay + -1) << 16) / (adjusted_mode->vdisplay + -1) >> 2); ivch_write(dvo, 66, (int )x_ratio); ivch_write(dvo, 65, (int )y_ratio); } else { vr01 = (unsigned int )vr01 & 65527U; vr40 = (unsigned int )vr40 & 65279U; } vr40 = (unsigned int )vr40 & 65023U; ivch_write(dvo, 1, (int )vr01); ivch_write(dvo, 64, (int )vr40); ivch_dump_regs(dvo); return; } } static void ivch_dump_regs(struct intel_dvo_device *dvo ) { uint16_t val ; { ivch_read(dvo, 0, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR00: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 1, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR01: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 48, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR30: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 64, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR40: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 128, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR80: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 129, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR81: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 130, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR82: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 131, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR83: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 132, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR84: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 133, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR85: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 134, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR86: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 135, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR87: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 136, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR88: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 142, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR8E: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } ivch_read(dvo, 143, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] VR8F: 0x%04x\n", "ivch_dump_regs", (int )val); } else { } return; } } static void ivch_save(struct intel_dvo_device *dvo ) { struct ivch_priv *priv ; { priv = (struct ivch_priv *)dvo->dev_priv; ivch_read(dvo, 1, & priv->save_VR01); ivch_read(dvo, 64, & priv->save_VR40); return; } } static void ivch_restore(struct intel_dvo_device *dvo ) { struct ivch_priv *priv ; { priv = (struct ivch_priv *)dvo->dev_priv; ivch_write(dvo, 1, (int )priv->save_VR01); ivch_write(dvo, 64, (int )priv->save_VR40); return; } } static void ivch_destroy(struct intel_dvo_device *dvo ) { struct ivch_priv *priv ; { priv = (struct ivch_priv *)dvo->dev_priv; if ((unsigned long )priv != (unsigned long )((struct ivch_priv *)0)) { kfree((void const *)priv); dvo->dev_priv = 0; } else { } return; } } struct intel_dvo_dev_ops ivch_ops = {& ivch_init, 0, & ivch_dpms, & ivch_save, & ivch_restore, (int (*)(struct intel_dvo_device * , struct drm_display_mode * ))(& ivch_mode_valid), 0, 0, 0, & ivch_mode_set, & ivch_detect, 0, & ivch_destroy, & ivch_dump_regs}; void ldv_main21_sequence_infinite_withcheck_stateful(void) { int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25069; ldv_25068: tmp = nondet_int(); switch (tmp) { default: ; goto ldv_25067; } ldv_25067: ; ldv_25069: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25068; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_785(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_786(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_787(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_788(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_789(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_790(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_791(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_792(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_793(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_794(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_795(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_796(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_797(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_798(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_799(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_800(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_801(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_802(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_821(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_824(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_826(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_829(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_830(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_833(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_835(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_837(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_822(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_825(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_827(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_828(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_831(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_832(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_834(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_836(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_838(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_823(spinlock_t *ldv_func_arg1 ) ; static bool tfp410_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch ) { struct tfp410_priv *tfp ; struct intel_i2c_chan *i2cbus ; u8 out_buf[2U] ; u8 in_buf[2U] ; struct i2c_msg msgs[2U] ; int tmp ; { tfp = (struct tfp410_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msgs[0].addr = (unsigned short )i2cbus->slave_addr; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = (unsigned short )i2cbus->slave_addr; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& in_buf); out_buf[0] = (u8 )addr; out_buf[1] = 0U; tmp = i2c_transfer(& i2cbus->adapter, (struct i2c_msg *)(& msgs), 2); if (tmp == 2) { *ch = in_buf[0]; return (1); } else { } if (! tfp->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "tfp410_readb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool tfp410_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch ) { struct tfp410_priv *tfp ; struct intel_i2c_chan *i2cbus ; uint8_t out_buf[2U] ; struct i2c_msg msg ; int tmp ; { tfp = (struct tfp410_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msg.addr = (unsigned short )i2cbus->slave_addr; msg.flags = 0U; msg.len = 2U; msg.buf = (__u8 *)(& out_buf); out_buf[0] = (uint8_t )addr; out_buf[1] = ch; tmp = i2c_transfer(& i2cbus->adapter, & msg, 1); if (tmp == 1) { return (1); } else { } if (! tfp->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "tfp410_writeb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static int tfp410_getid(struct intel_dvo_device *dvo , int addr ) { uint8_t ch1 ; uint8_t ch2 ; bool tmp ; bool tmp___0 ; { tmp = tfp410_readb(dvo, addr, & ch1); if ((int )tmp) { tmp___0 = tfp410_readb(dvo, addr + 1, & ch2); if ((int )tmp___0) { return ((((int )ch2 << 8) & 65535) | (int )ch1); } else { } } else { } return (-1); } } static bool tfp410_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) { struct tfp410_priv *tfp ; int id ; void *tmp ; { tmp = kzalloc(5UL, 208U); tfp = (struct tfp410_priv *)tmp; if ((unsigned long )tfp == (unsigned long )((struct tfp410_priv *)0)) { return (0); } else { } dvo->i2c_bus = i2cbus; (dvo->i2c_bus)->slave_addr = (u8 )dvo->slave_addr; dvo->dev_priv = (void *)tfp; tfp->quiet = 1; id = tfp410_getid(dvo, 0); if (id != 332) { if (drm_debug != 0U) { printk("<7>[drm:%s] tfp410 not detected got VID %X: from %s Slave %d.\n", "tfp410_init", id, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } id = tfp410_getid(dvo, 2); if (id != 1040) { if (drm_debug != 0U) { printk("<7>[drm:%s] tfp410 not detected got DID %X: from %s Slave %d.\n", "tfp410_init", id, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } tfp->quiet = 0; return (1); out: kfree((void const *)tfp); return (0); } } static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo ) { enum drm_connector_status ret ; uint8_t ctl2 ; bool tmp ; { ret = connector_status_disconnected; tmp = tfp410_readb(dvo, 9, & ctl2); if ((int )tmp) { if (((int )ctl2 & 2) != 0) { ret = connector_status_connected; } else { ret = connector_status_disconnected; } } else { } return (ret); } } static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) { { return (MODE_OK); } } static void tfp410_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { { return; } } static void tfp410_dpms(struct intel_dvo_device *dvo , int mode ) { uint8_t ctl1 ; bool tmp ; int tmp___0 ; { tmp = tfp410_readb(dvo, 8, & ctl1); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } if (mode == 0) { ctl1 = (uint8_t )((unsigned int )ctl1 | 1U); } else { ctl1 = (unsigned int )ctl1 & 254U; } tfp410_writeb(dvo, 8, (int )ctl1); return; } } static void tfp410_dump_regs(struct intel_dvo_device *dvo ) { uint8_t val ; uint8_t val2 ; { tfp410_readb(dvo, 4, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_REV: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 8, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_CTL1: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 9, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_CTL2: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 10, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_CTL3: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 11, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_USERCFG: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 50, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_DE_DLY: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 51, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_DE_CTL: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 52, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_DE_TOP: 0x%02X\n", "tfp410_dump_regs", (int )val); } else { } tfp410_readb(dvo, 54, & val); tfp410_readb(dvo, 55, & val2); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_DE_CNT: 0x%02X%02X\n", "tfp410_dump_regs", (int )val2, (int )val); } else { } tfp410_readb(dvo, 56, & val); tfp410_readb(dvo, 57, & val2); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_DE_LIN: 0x%02X%02X\n", "tfp410_dump_regs", (int )val2, (int )val); } else { } tfp410_readb(dvo, 58, & val); tfp410_readb(dvo, 59, & val2); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_H_RES: 0x%02X%02X\n", "tfp410_dump_regs", (int )val2, (int )val); } else { } tfp410_readb(dvo, 60, & val); tfp410_readb(dvo, 61, & val2); if (drm_debug != 0U) { printk("<7>[drm:%s] TFP410_V_RES: 0x%02X%02X\n", "tfp410_dump_regs", (int )val2, (int )val); } else { } return; } } static void tfp410_save(struct intel_dvo_device *dvo ) { struct tfp410_priv *tfp ; bool tmp ; int tmp___0 ; bool tmp___1 ; int tmp___2 ; { tfp = (struct tfp410_priv *)dvo->dev_priv; tmp = tfp410_readb(dvo, 8, & tfp->saved_reg.ctl1); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } tmp___1 = tfp410_readb(dvo, 9, & tfp->saved_reg.ctl2); if (tmp___1) { tmp___2 = 0; } else { tmp___2 = 1; } if (tmp___2) { return; } else { } return; } } static void tfp410_restore(struct intel_dvo_device *dvo ) { struct tfp410_priv *tfp ; { tfp = (struct tfp410_priv *)dvo->dev_priv; tfp410_writeb(dvo, 8, (int )tfp->saved_reg.ctl1 & 254); tfp410_writeb(dvo, 9, (int )tfp->saved_reg.ctl2); tfp410_writeb(dvo, 8, (int )tfp->saved_reg.ctl1); return; } } static void tfp410_destroy(struct intel_dvo_device *dvo ) { struct tfp410_priv *tfp ; { tfp = (struct tfp410_priv *)dvo->dev_priv; if ((unsigned long )tfp != (unsigned long )((struct tfp410_priv *)0)) { kfree((void const *)tfp); dvo->dev_priv = 0; } else { } return; } } struct intel_dvo_dev_ops tfp410_ops = {& tfp410_init, 0, & tfp410_dpms, & tfp410_save, & tfp410_restore, (int (*)(struct intel_dvo_device * , struct drm_display_mode * ))(& tfp410_mode_valid), 0, 0, 0, & tfp410_mode_set, & tfp410_detect, 0, & tfp410_destroy, & tfp410_dump_regs}; void ldv_main22_sequence_infinite_withcheck_stateful(void) { struct intel_dvo_device *var_group1 ; struct intel_i2c_chan *var_group2 ; struct drm_display_mode *var_group3 ; struct drm_display_mode *var_tfp410_mode_set_6_p2 ; int var_tfp410_dpms_7_p1 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25081; ldv_25080: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); tfp410_init(var_group1, var_group2); goto ldv_25070; case 1: ldv_handler_precall(); tfp410_detect(var_group1); goto ldv_25070; case 2: ldv_handler_precall(); tfp410_mode_valid(var_group1, var_group3); goto ldv_25070; case 3: ldv_handler_precall(); tfp410_mode_set(var_group1, var_group3, var_tfp410_mode_set_6_p2); goto ldv_25070; case 4: ldv_handler_precall(); tfp410_dpms(var_group1, var_tfp410_dpms_7_p1); goto ldv_25070; case 5: ldv_handler_precall(); tfp410_dump_regs(var_group1); goto ldv_25070; case 6: ldv_handler_precall(); tfp410_save(var_group1); goto ldv_25070; case 7: ldv_handler_precall(); tfp410_restore(var_group1); goto ldv_25070; case 8: ldv_handler_precall(); tfp410_destroy(var_group1); goto ldv_25070; default: ; goto ldv_25070; } ldv_25070: ; ldv_25081: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25080; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_821(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_822(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_823(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_824(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_825(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_826(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_827(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_828(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_829(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_830(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_831(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_832(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_833(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_834(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_835(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_836(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_837(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_838(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_857(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_860(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_862(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_865(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_866(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_869(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_871(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_873(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_858(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_861(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_863(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_864(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_867(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_868(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_870(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_872(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_874(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_859(spinlock_t *ldv_func_arg1 ) ; static bool sil164_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch ) { struct sil164_priv *sil ; struct intel_i2c_chan *i2cbus ; u8 out_buf[2U] ; u8 in_buf[2U] ; struct i2c_msg msgs[2U] ; int tmp ; { sil = (struct sil164_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msgs[0].addr = (unsigned short )i2cbus->slave_addr; msgs[0].flags = 0U; msgs[0].len = 1U; msgs[0].buf = (__u8 *)(& out_buf); msgs[1].addr = (unsigned short )i2cbus->slave_addr; msgs[1].flags = 1U; msgs[1].len = 1U; msgs[1].buf = (__u8 *)(& in_buf); out_buf[0] = (u8 )addr; out_buf[1] = 0U; tmp = i2c_transfer(& i2cbus->adapter, (struct i2c_msg *)(& msgs), 2); if (tmp == 2) { *ch = in_buf[0]; return (1); } else { } if (! sil->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "sil164_readb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool sil164_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch ) { struct sil164_priv *sil ; struct intel_i2c_chan *i2cbus ; uint8_t out_buf[2U] ; struct i2c_msg msg ; int tmp ; { sil = (struct sil164_priv *)dvo->dev_priv; i2cbus = dvo->i2c_bus; msg.addr = (unsigned short )i2cbus->slave_addr; msg.flags = 0U; msg.len = 2U; msg.buf = (__u8 *)(& out_buf); out_buf[0] = (uint8_t )addr; out_buf[1] = ch; tmp = i2c_transfer(& i2cbus->adapter, & msg, 1); if (tmp == 1) { return (1); } else { } if (! sil->quiet) { if (drm_debug != 0U) { printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "sil164_writeb", addr, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } } else { } return (0); } } static bool sil164_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) { struct sil164_priv *sil ; unsigned char ch ; void *tmp ; bool tmp___0 ; int tmp___1 ; bool tmp___2 ; int tmp___3 ; { tmp = kzalloc(7UL, 208U); sil = (struct sil164_priv *)tmp; if ((unsigned long )sil == (unsigned long )((struct sil164_priv *)0)) { return (0); } else { } dvo->i2c_bus = i2cbus; (dvo->i2c_bus)->slave_addr = (u8 )dvo->slave_addr; dvo->dev_priv = (void *)sil; sil->quiet = 1; tmp___0 = sil164_readb(dvo, 0, & ch); if (tmp___0) { tmp___1 = 0; } else { tmp___1 = 1; } if (tmp___1) { goto out; } else { } if ((unsigned int )ch != 1U) { if (drm_debug != 0U) { printk("<7>[drm:%s] sil164 not detected got %d: from %s Slave %d.\n", "sil164_init", (int )ch, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } tmp___2 = sil164_readb(dvo, 2, & ch); if (tmp___2) { tmp___3 = 0; } else { tmp___3 = 1; } if (tmp___3) { goto out; } else { } if ((unsigned int )ch != 6U) { if (drm_debug != 0U) { printk("<7>[drm:%s] sil164 not detected got %d: from %s Slave %d.\n", "sil164_init", (int )ch, (char *)(& i2cbus->adapter.name), (int )i2cbus->slave_addr); } else { } goto out; } else { } sil->quiet = 0; if (drm_debug != 0U) { printk("<7>[drm:%s] init sil164 dvo controller successfully!\n", "sil164_init"); } else { } return (1); out: kfree((void const *)sil); return (0); } } static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo ) { uint8_t reg9 ; { sil164_readb(dvo, 9, & reg9); if (((int )reg9 & 2) != 0) { return (connector_status_connected); } else { return (connector_status_disconnected); } } } static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) { { return (MODE_OK); } } static void sil164_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) { { return; } } static void sil164_dpms(struct intel_dvo_device *dvo , int mode ) { int ret ; unsigned char ch ; bool tmp ; { tmp = sil164_readb(dvo, 8, & ch); ret = (int )tmp; if (ret == 0) { return; } else { } if (mode == 0) { ch = (unsigned int )ch | 1U; } else { ch = (unsigned int )ch & 254U; } sil164_writeb(dvo, 8, (int )ch); return; } } static void sil164_dump_regs(struct intel_dvo_device *dvo ) { uint8_t val ; { sil164_readb(dvo, 6, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] SIL164_FREQ_LO: 0x%02x\n", "sil164_dump_regs", (int )val); } else { } sil164_readb(dvo, 7, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] SIL164_FREQ_HI: 0x%02x\n", "sil164_dump_regs", (int )val); } else { } sil164_readb(dvo, 8, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] SIL164_REG8: 0x%02x\n", "sil164_dump_regs", (int )val); } else { } sil164_readb(dvo, 9, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] SIL164_REG9: 0x%02x\n", "sil164_dump_regs", (int )val); } else { } sil164_readb(dvo, 12, & val); if (drm_debug != 0U) { printk("<7>[drm:%s] SIL164_REGC: 0x%02x\n", "sil164_dump_regs", (int )val); } else { } return; } } static void sil164_save(struct intel_dvo_device *dvo ) { struct sil164_priv *sil ; bool tmp ; int tmp___0 ; bool tmp___1 ; int tmp___2 ; bool tmp___3 ; int tmp___4 ; { sil = (struct sil164_priv *)dvo->dev_priv; tmp = sil164_readb(dvo, 8, & sil->save_regs.reg8); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } if (tmp___0) { return; } else { } tmp___1 = sil164_readb(dvo, 9, & sil->save_regs.reg9); if (tmp___1) { tmp___2 = 0; } else { tmp___2 = 1; } if (tmp___2) { return; } else { } tmp___3 = sil164_readb(dvo, 12, & sil->save_regs.regc); if (tmp___3) { tmp___4 = 0; } else { tmp___4 = 1; } if (tmp___4) { return; } else { } return; } } static void sil164_restore(struct intel_dvo_device *dvo ) { struct sil164_priv *sil ; { sil = (struct sil164_priv *)dvo->dev_priv; sil164_writeb(dvo, 8, (int )sil->save_regs.reg8 & 254); sil164_writeb(dvo, 9, (int )sil->save_regs.reg9); sil164_writeb(dvo, 12, (int )sil->save_regs.regc); sil164_writeb(dvo, 8, (int )sil->save_regs.reg8); return; } } static void sil164_destroy(struct intel_dvo_device *dvo ) { struct sil164_priv *sil ; { sil = (struct sil164_priv *)dvo->dev_priv; if ((unsigned long )sil != (unsigned long )((struct sil164_priv *)0)) { kfree((void const *)sil); dvo->dev_priv = 0; } else { } return; } } struct intel_dvo_dev_ops sil164_ops = {& sil164_init, 0, & sil164_dpms, & sil164_save, & sil164_restore, (int (*)(struct intel_dvo_device * , struct drm_display_mode * ))(& sil164_mode_valid), 0, 0, 0, & sil164_mode_set, & sil164_detect, 0, & sil164_destroy, & sil164_dump_regs}; void ldv_main23_sequence_infinite_withcheck_stateful(void) { struct intel_dvo_device *var_group1 ; struct intel_i2c_chan *var_group2 ; struct drm_display_mode *var_group3 ; struct drm_display_mode *var_sil164_mode_set_5_p2 ; int var_sil164_dpms_6_p1 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_25075; ldv_25074: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); sil164_init(var_group1, var_group2); goto ldv_25064; case 1: ldv_handler_precall(); sil164_detect(var_group1); goto ldv_25064; case 2: ldv_handler_precall(); sil164_mode_valid(var_group1, var_group3); goto ldv_25064; case 3: ldv_handler_precall(); sil164_mode_set(var_group1, var_group3, var_sil164_mode_set_5_p2); goto ldv_25064; case 4: ldv_handler_precall(); sil164_dpms(var_group1, var_sil164_dpms_6_p1); goto ldv_25064; case 5: ldv_handler_precall(); sil164_dump_regs(var_group1); goto ldv_25064; case 6: ldv_handler_precall(); sil164_save(var_group1); goto ldv_25064; case 7: ldv_handler_precall(); sil164_restore(var_group1); goto ldv_25064; case 8: ldv_handler_precall(); sil164_destroy(var_group1); goto ldv_25064; default: ; goto ldv_25064; } ldv_25064: ; ldv_25075: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_25074; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_857(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_858(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_859(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_860(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_861(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_862(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_863(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_864(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_865(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_866(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_867(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_868(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_869(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_870(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_871(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_872(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_873(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_874(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_893(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_896(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_898(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_901(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_902(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_905(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_907(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_909(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_911(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_894(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_897(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_899(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_900(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_903(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_904(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_906(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_908(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_910(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_912(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_895(spinlock_t *ldv_func_arg1 ) ; extern int register_acpi_notifier(struct notifier_block * ) ; extern int unregister_acpi_notifier(struct notifier_block * ) ; extern int pci_bus_read_config_dword(struct pci_bus * , unsigned int , int , u32 * ) ; extern int pci_bus_write_config_dword(struct pci_bus * , unsigned int , int , u32 ) ; __inline static int pci_read_config_dword(struct pci_dev *dev , int where , u32 *val ) { int tmp ; { tmp = pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); return (tmp); } } __inline static int pci_write_config_dword(struct pci_dev *dev , int where , u32 val ) { int tmp ; { tmp = pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); return (tmp); } } static u32 asle_set_backlight(struct drm_device *dev , u32 bclp ) { struct drm_i915_private *dev_priv ; struct opregion_asle *asle ; u32 blc_pwm_ctl ; u32 blc_pwm_ctl2 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; asle = dev_priv->opregion.asle; if ((int )bclp >= 0) { return (8192U); } else { } bclp = bclp & 2147483647U; if (bclp > 255U) { return (8192U); } else { } blc_pwm_ctl = readl((void const volatile *)dev_priv->regs + 397908U); blc_pwm_ctl = blc_pwm_ctl & 4294901760U; blc_pwm_ctl2 = readl((void const volatile *)dev_priv->regs + 397904U); if ((blc_pwm_ctl2 & 1073741824U) != 0U) { pci_write_config_dword(dev->pdev, 244, bclp); } else { writel((bclp * 257U - 1U) | blc_pwm_ctl, (void volatile *)dev_priv->regs + 397908U); } asle->cblv = (bclp * 100U) / 255U | 2147483648U; return (0U); } } static u32 asle_set_als_illum(struct drm_device *dev , u32 alsi ) { { return (0U); } } static u32 asle_set_pwm_freq(struct drm_device *dev , u32 pfmb ) { struct drm_i915_private *dev_priv ; u32 blc_pwm_ctl ; unsigned int tmp ; u32 pwm ; { dev_priv = (struct drm_i915_private *)dev->dev_private; if ((int )pfmb < 0) { tmp = readl((void const volatile *)dev_priv->regs + 397908U); blc_pwm_ctl = tmp; pwm = pfmb & 2147483136U; blc_pwm_ctl = blc_pwm_ctl & 65535U; pwm = pwm >> 9; } else { } return (0U); } } static u32 asle_set_pfit(struct drm_device *dev , u32 pfit ) { { if ((int )pfit >= 0) { return (32768U); } else { } return (0U); } } void opregion_asle_intr(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct opregion_asle *asle ; u32 asle_stat ; u32 asle_req ; u32 tmp ; u32 tmp___0 ; u32 tmp___1 ; u32 tmp___2 ; { dev_priv = (struct drm_i915_private *)dev->dev_private; asle = dev_priv->opregion.asle; asle_stat = 0U; if ((unsigned long )asle == (unsigned long )((struct opregion_asle *)0)) { return; } else { } asle_req = asle->aslc & 15U; if (asle_req == 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] non asle set request??\n", "opregion_asle_intr"); } else { } return; } else { } if ((int )asle_req & 1) { tmp = asle_set_als_illum(dev, asle->alsi); asle_stat = tmp | asle_stat; } else { } if ((asle_req & 2U) != 0U) { tmp___0 = asle_set_backlight(dev, asle->bclp); asle_stat = tmp___0 | asle_stat; } else { } if ((asle_req & 4U) != 0U) { tmp___1 = asle_set_pfit(dev, asle->pfit); asle_stat = tmp___1 | asle_stat; } else { } if ((asle_req & 8U) != 0U) { tmp___2 = asle_set_pwm_freq(dev, asle->pfmb); asle_stat = tmp___2 | asle_stat; } else { } asle->aslc = asle_stat; return; } } void opregion_enable_asle(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct opregion_asle *asle ; { dev_priv = (struct drm_i915_private *)dev->dev_private; asle = dev_priv->opregion.asle; if ((unsigned long )asle != (unsigned long )((struct opregion_asle *)0)) { if (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) { ldv___ldv_spin_lock_911(& dev_priv->user_irq_lock); i915_enable_pipestat(dev_priv, 1, 4194304U); ldv___ldv_spin_unlock_912(& dev_priv->user_irq_lock); } else { } asle->tche = 15U; asle->ardy = 1U; } else { } return; } } static struct intel_opregion *system_opregion ; static int intel_opregion_video_event(struct notifier_block *nb , unsigned long val , void *data ) { struct opregion_acpi *acpi ; { if ((unsigned long )system_opregion == (unsigned long )((struct intel_opregion *)0)) { return (0); } else { } acpi = system_opregion->acpi; acpi->csts = 0U; return (1); } } static struct notifier_block intel_opregion_notifier = {& intel_opregion_video_event, 0, 0}; int intel_opregion_init(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct intel_opregion *opregion ; void *base ; u32 asls ; u32 mboxes ; int err ; int tmp ; { dev_priv = (struct drm_i915_private *)dev->dev_private; opregion = & dev_priv->opregion; err = 0; pci_read_config_dword(dev->pdev, 252, & asls); if (drm_debug != 0U) { printk("<7>[drm:%s] graphic opregion physical addr: 0x%x\n", "intel_opregion_init", asls); } else { } if (asls == 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] ACPI OpRegion not supported!\n", "intel_opregion_init"); } else { } return (-524); } else { } base = ioremap((resource_size_t )asls, 8192UL); if ((unsigned long )base == (unsigned long )((void *)0)) { return (-12); } else { } opregion->header = (struct opregion_header *)base; tmp = memcmp((void const *)(& (opregion->header)->signature), (void const *)"IntelGraphicsMem", 16UL); if (tmp != 0) { if (drm_debug != 0U) { printk("<7>[drm:%s] opregion signature mismatch\n", "intel_opregion_init"); } else { } err = -22; goto err_out; } else { } mboxes = (opregion->header)->mboxes; if ((int )mboxes & 1) { if (drm_debug != 0U) { printk("<7>[drm:%s] Public ACPI methods supported\n", "intel_opregion_init"); } else { } opregion->acpi = (struct opregion_acpi *)base + 256U; } else { if (drm_debug != 0U) { printk("<7>[drm:%s] Public ACPI methods not supported\n", "intel_opregion_init"); } else { } err = -524; goto err_out; } opregion->enabled = 1; if ((mboxes & 2U) != 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] SWSCI supported\n", "intel_opregion_init"); } else { } opregion->swsci = (struct opregion_swsci *)base + 512U; } else { } if ((mboxes & 4U) != 0U) { if (drm_debug != 0U) { printk("<7>[drm:%s] ASLE supported\n", "intel_opregion_init"); } else { } opregion->asle = (struct opregion_asle *)base + 768U; } else { } (opregion->acpi)->csts = 0U; (opregion->acpi)->drdy = 1U; system_opregion = opregion; register_acpi_notifier(& intel_opregion_notifier); return (0); err_out: iounmap((void volatile *)opregion->header); opregion->header = 0; return (err); } } void intel_opregion_free(struct drm_device *dev ) { struct drm_i915_private *dev_priv ; struct intel_opregion *opregion ; { dev_priv = (struct drm_i915_private *)dev->dev_private; opregion = & dev_priv->opregion; if (opregion->enabled == 0) { return; } else { } (opregion->acpi)->drdy = 0U; system_opregion = 0; unregister_acpi_notifier(& intel_opregion_notifier); iounmap((void volatile *)opregion->header); opregion->header = 0; opregion->acpi = 0; opregion->swsci = 0; opregion->asle = 0; opregion->enabled = 0; return; } } void ldv_main24_sequence_infinite_withcheck_stateful(void) { struct notifier_block *var_group1 ; unsigned long var_intel_opregion_video_event_6_p1 ; void *var_intel_opregion_video_event_6_p2 ; int tmp ; int tmp___0 ; { LDV_IN_INTERRUPT = 1; ldv_initialize(); goto ldv_29235; ldv_29234: tmp = nondet_int(); switch (tmp) { case 0: ldv_handler_precall(); intel_opregion_video_event(var_group1, var_intel_opregion_video_event_6_p1, var_intel_opregion_video_event_6_p2); goto ldv_29232; default: ; goto ldv_29232; } ldv_29232: ; ldv_29235: tmp___0 = nondet_int(); if (tmp___0 != 0) { goto ldv_29234; } else { } ldv_check_final_state(); return; } } void ldv___ldv_spin_lock_893(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_894(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_895(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_896(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_897(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_898(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_899(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_900(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_901(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_902(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_903(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_904(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_905(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_906(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_907(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_908(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_909(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_910(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_911(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_user_irq_lock_of_drm_i915_private(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_912(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_user_irq_lock_of_drm_i915_private(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_933(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_936(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_938(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_941(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_942(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_945(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_947(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_lock_949(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_934(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_937(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_939(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_940(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_943(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_944(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_946(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_948(spinlock_t *ldv_func_arg1 ) ; void ldv___ldv_spin_unlock_950(spinlock_t *ldv_func_arg1 ) ; int ldv___ldv_spin_trylock_935(spinlock_t *ldv_func_arg1 ) ; __inline static void *compat_alloc_user_space(long len ) { struct pt_regs *regs ; struct task_struct *tmp ; { tmp = get_current(); regs = (struct pt_regs *)(tmp->thread.sp0 + 0xffffffffffffffffUL); return ((void *)(regs->sp - (unsigned long )len)); } } extern void lock_kernel(void) ; extern void unlock_kernel(void) ; extern void __put_user_bad(void) ; extern long drm_compat_ioctl(struct file * , unsigned int , unsigned long ) ; static int compat_i915_batchbuffer(struct file *file , unsigned int cmd , unsigned long arg ) { drm_i915_batchbuffer32_t batchbuffer32 ; drm_i915_batchbuffer_t *batchbuffer ; unsigned long tmp ; void *tmp___0 ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp___1 ; long tmp___2 ; long __pu_err ; long __pu_err___0 ; long __pu_err___1 ; long __pu_err___2 ; long __pu_err___3 ; long __pu_err___4 ; int tmp___3 ; { tmp = copy_from_user((void *)(& batchbuffer32), (void const *)arg, 24U); if (tmp != 0UL) { return (-14); } else { } tmp___0 = compat_alloc_user_space(32L); batchbuffer = (drm_i915_batchbuffer_t *)tmp___0; tmp___1 = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batchbuffer), "g" (32L), "rm" (tmp___1->addr_limit.seg)); tmp___2 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___2 == 0L) { return (-14); } else { __pu_err = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "iq" (batchbuffer32.start), "m" (*((struct __large_struct *)(& batchbuffer->start))), "i" (-14), "0" (__pu_err)); goto ldv_24941; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start), "m" (*((struct __large_struct *)(& batchbuffer->start))), "i" (-14), "0" (__pu_err)); goto ldv_24941; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start), "m" (*((struct __large_struct *)(& batchbuffer->start))), "i" (-14), "0" (__pu_err)); goto ldv_24941; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "Zr" (batchbuffer32.start), "m" (*((struct __large_struct *)(& batchbuffer->start))), "i" (-14), "0" (__pu_err)); goto ldv_24941; default: __put_user_bad(); } ldv_24941: ; if (__pu_err != 0L) { return (-14); } else { __pu_err___0 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "iq" (batchbuffer32.used), "m" (*((struct __large_struct *)(& batchbuffer->used))), "i" (-14), "0" (__pu_err___0)); goto ldv_24949; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used), "m" (*((struct __large_struct *)(& batchbuffer->used))), "i" (-14), "0" (__pu_err___0)); goto ldv_24949; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used), "m" (*((struct __large_struct *)(& batchbuffer->used))), "i" (-14), "0" (__pu_err___0)); goto ldv_24949; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "Zr" (batchbuffer32.used), "m" (*((struct __large_struct *)(& batchbuffer->used))), "i" (-14), "0" (__pu_err___0)); goto ldv_24949; default: __put_user_bad(); } ldv_24949: ; if (__pu_err___0 != 0L) { return (-14); } else { __pu_err___1 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "iq" (batchbuffer32.DR1), "m" (*((struct __large_struct *)(& batchbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_24957; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1), "m" (*((struct __large_struct *)(& batchbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_24957; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1), "m" (*((struct __large_struct *)(& batchbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_24957; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "Zr" (batchbuffer32.DR1), "m" (*((struct __large_struct *)(& batchbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_24957; default: __put_user_bad(); } ldv_24957: ; if (__pu_err___1 != 0L) { return (-14); } else { __pu_err___2 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "iq" (batchbuffer32.DR4), "m" (*((struct __large_struct *)(& batchbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_24965; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4), "m" (*((struct __large_struct *)(& batchbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_24965; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4), "m" (*((struct __large_struct *)(& batchbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_24965; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "Zr" (batchbuffer32.DR4), "m" (*((struct __large_struct *)(& batchbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_24965; default: __put_user_bad(); } ldv_24965: ; if (__pu_err___2 != 0L) { return (-14); } else { __pu_err___3 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "iq" (batchbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_24973; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_24973; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_24973; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "Zr" (batchbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_24973; default: __put_user_bad(); } ldv_24973: ; if (__pu_err___3 != 0L) { return (-14); } else { __pu_err___4 = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((unsigned long )batchbuffer32.cliprects)), "m" (*((struct __large_struct *)(& batchbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_24981; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((unsigned long )batchbuffer32.cliprects)), "m" (*((struct __large_struct *)(& batchbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_24981; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((unsigned long )batchbuffer32.cliprects)), "m" (*((struct __large_struct *)(& batchbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_24981; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((unsigned long )batchbuffer32.cliprects)), "m" (*((struct __large_struct *)(& batchbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_24981; default: __put_user_bad(); } ldv_24981: ; if (__pu_err___4 != 0L) { return (-14); } else { } } } } } } } tmp___3 = drm_ioctl((file->f_path.dentry)->d_inode, file, 1075864643U, (unsigned long )batchbuffer); return (tmp___3); } } static int compat_i915_cmdbuffer(struct file *file , unsigned int cmd , unsigned long arg ) { drm_i915_cmdbuffer32_t cmdbuffer32 ; drm_i915_cmdbuffer_t *cmdbuffer ; unsigned long tmp ; void *tmp___0 ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp___1 ; long tmp___2 ; long __pu_err ; long __pu_err___0 ; long __pu_err___1 ; long __pu_err___2 ; long __pu_err___3 ; long __pu_err___4 ; int tmp___3 ; { tmp = copy_from_user((void *)(& cmdbuffer32), (void const *)arg, 24U); if (tmp != 0UL) { return (-14); } else { } tmp___0 = compat_alloc_user_space(32L); cmdbuffer = (drm_i915_cmdbuffer_t *)tmp___0; tmp___1 = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuffer), "g" (32L), "rm" (tmp___1->addr_limit.seg)); tmp___2 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___2 == 0L) { return (-14); } else { __pu_err = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "iq" ((char *)((unsigned long )cmdbuffer32.buf)), "m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14), "0" (__pu_err)); goto ldv_25007; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" ((char *)((unsigned long )cmdbuffer32.buf)), "m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14), "0" (__pu_err)); goto ldv_25007; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" ((char *)((unsigned long )cmdbuffer32.buf)), "m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14), "0" (__pu_err)); goto ldv_25007; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "Zr" ((char *)((unsigned long )cmdbuffer32.buf)), "m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14), "0" (__pu_err)); goto ldv_25007; default: __put_user_bad(); } ldv_25007: ; if (__pu_err != 0L) { return (-14); } else { __pu_err___0 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "iq" (cmdbuffer32.sz), "m" (*((struct __large_struct *)(& cmdbuffer->sz))), "i" (-14), "0" (__pu_err___0)); goto ldv_25015; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz), "m" (*((struct __large_struct *)(& cmdbuffer->sz))), "i" (-14), "0" (__pu_err___0)); goto ldv_25015; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz), "m" (*((struct __large_struct *)(& cmdbuffer->sz))), "i" (-14), "0" (__pu_err___0)); goto ldv_25015; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "Zr" (cmdbuffer32.sz), "m" (*((struct __large_struct *)(& cmdbuffer->sz))), "i" (-14), "0" (__pu_err___0)); goto ldv_25015; default: __put_user_bad(); } ldv_25015: ; if (__pu_err___0 != 0L) { return (-14); } else { __pu_err___1 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "iq" (cmdbuffer32.DR1), "m" (*((struct __large_struct *)(& cmdbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_25023; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1), "m" (*((struct __large_struct *)(& cmdbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_25023; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1), "m" (*((struct __large_struct *)(& cmdbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_25023; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "Zr" (cmdbuffer32.DR1), "m" (*((struct __large_struct *)(& cmdbuffer->DR1))), "i" (-14), "0" (__pu_err___1)); goto ldv_25023; default: __put_user_bad(); } ldv_25023: ; if (__pu_err___1 != 0L) { return (-14); } else { __pu_err___2 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "iq" (cmdbuffer32.DR4), "m" (*((struct __large_struct *)(& cmdbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_25031; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4), "m" (*((struct __large_struct *)(& cmdbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_25031; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4), "m" (*((struct __large_struct *)(& cmdbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_25031; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "Zr" (cmdbuffer32.DR4), "m" (*((struct __large_struct *)(& cmdbuffer->DR4))), "i" (-14), "0" (__pu_err___2)); goto ldv_25031; default: __put_user_bad(); } ldv_25031: ; if (__pu_err___2 != 0L) { return (-14); } else { __pu_err___3 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "iq" (cmdbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_25039; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_25039; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_25039; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___3): "Zr" (cmdbuffer32.num_cliprects), "m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))), "i" (-14), "0" (__pu_err___3)); goto ldv_25039; default: __put_user_bad(); } ldv_25039: ; if (__pu_err___3 != 0L) { return (-14); } else { __pu_err___4 = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((unsigned long )cmdbuffer32.cliprects)), "m" (*((struct __large_struct *)(& cmdbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_25047; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((unsigned long )cmdbuffer32.cliprects)), "m" (*((struct __large_struct *)(& cmdbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_25047; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((unsigned long )cmdbuffer32.cliprects)), "m" (*((struct __large_struct *)(& cmdbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_25047; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((unsigned long )cmdbuffer32.cliprects)), "m" (*((struct __large_struct *)(& cmdbuffer->cliprects))), "i" (-14), "0" (__pu_err___4)); goto ldv_25047; default: __put_user_bad(); } ldv_25047: ; if (__pu_err___4 != 0L) { return (-14); } else { } } } } } } } tmp___3 = drm_ioctl((file->f_path.dentry)->d_inode, file, 1075864651U, (unsigned long )cmdbuffer); return (tmp___3); } } static int compat_i915_irq_emit(struct file *file , unsigned int cmd , unsigned long arg ) { drm_i915_irq_emit32_t req32 ; drm_i915_irq_emit_t *request ; unsigned long tmp ; void *tmp___0 ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp___1 ; long tmp___2 ; long __pu_err ; int tmp___3 ; { tmp = copy_from_user((void *)(& req32), (void const *)arg, 4U); if (tmp != 0UL) { return (-14); } else { } tmp___0 = compat_alloc_user_space(8L); request = (drm_i915_irq_emit_t *)tmp___0; tmp___1 = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request), "g" (8L), "rm" (tmp___1->addr_limit.seg)); tmp___2 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___2 == 0L) { return (-14); } else { __pu_err = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "iq" ((int *)((unsigned long )req32.irq_seq)), "m" (*((struct __large_struct *)(& request->irq_seq))), "i" (-14), "0" (__pu_err)); goto ldv_25068; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)), "m" (*((struct __large_struct *)(& request->irq_seq))), "i" (-14), "0" (__pu_err)); goto ldv_25068; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)), "m" (*((struct __large_struct *)(& request->irq_seq))), "i" (-14), "0" (__pu_err)); goto ldv_25068; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "Zr" ((int *)((unsigned long )req32.irq_seq)), "m" (*((struct __large_struct *)(& request->irq_seq))), "i" (-14), "0" (__pu_err)); goto ldv_25068; default: __put_user_bad(); } ldv_25068: ; if (__pu_err != 0L) { return (-14); } else { } } tmp___3 = drm_ioctl((file->f_path.dentry)->d_inode, file, 3221775428U, (unsigned long )request); return (tmp___3); } } static int compat_i915_getparam(struct file *file , unsigned int cmd , unsigned long arg ) { drm_i915_getparam32_t req32 ; drm_i915_getparam_t *request ; unsigned long tmp ; void *tmp___0 ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp___1 ; long tmp___2 ; long __pu_err ; long __pu_err___0 ; int tmp___3 ; { tmp = copy_from_user((void *)(& req32), (void const *)arg, 8U); if (tmp != 0UL) { return (-14); } else { } tmp___0 = compat_alloc_user_space(16L); request = (drm_i915_getparam_t *)tmp___0; tmp___1 = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request), "g" (16L), "rm" (tmp___1->addr_limit.seg)); tmp___2 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___2 == 0L) { return (-14); } else { __pu_err = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "iq" (req32.param), "m" (*((struct __large_struct *)(& request->param))), "i" (-14), "0" (__pu_err)); goto ldv_25090; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))), "i" (-14), "0" (__pu_err)); goto ldv_25090; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))), "i" (-14), "0" (__pu_err)); goto ldv_25090; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "Zr" (req32.param), "m" (*((struct __large_struct *)(& request->param))), "i" (-14), "0" (__pu_err)); goto ldv_25090; default: __put_user_bad(); } ldv_25090: ; if (__pu_err != 0L) { return (-14); } else { __pu_err___0 = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "iq" ((int *)((unsigned long )req32.value)), "m" (*((struct __large_struct *)(& request->value))), "i" (-14), "0" (__pu_err___0)); goto ldv_25098; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" ((int *)((unsigned long )req32.value)), "m" (*((struct __large_struct *)(& request->value))), "i" (-14), "0" (__pu_err___0)); goto ldv_25098; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" ((int *)((unsigned long )req32.value)), "m" (*((struct __large_struct *)(& request->value))), "i" (-14), "0" (__pu_err___0)); goto ldv_25098; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "Zr" ((int *)((unsigned long )req32.value)), "m" (*((struct __large_struct *)(& request->value))), "i" (-14), "0" (__pu_err___0)); goto ldv_25098; default: __put_user_bad(); } ldv_25098: ; if (__pu_err___0 != 0L) { return (-14); } else { } } } tmp___3 = drm_ioctl((file->f_path.dentry)->d_inode, file, 3222299718U, (unsigned long )request); return (tmp___3); } } static int compat_i915_alloc(struct file *file , unsigned int cmd , unsigned long arg ) { drm_i915_mem_alloc32_t req32 ; drm_i915_mem_alloc_t *request ; unsigned long tmp ; void *tmp___0 ; unsigned long flag ; unsigned long roksum ; struct thread_info *tmp___1 ; long tmp___2 ; long __pu_err ; long __pu_err___0 ; long __pu_err___1 ; long __pu_err___2 ; int tmp___3 ; { tmp = copy_from_user((void *)(& req32), (void const *)arg, 16U); if (tmp != 0UL) { return (-14); } else { } tmp___0 = compat_alloc_user_space(24L); request = (drm_i915_mem_alloc_t *)tmp___0; tmp___1 = current_thread_info(); __asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request), "g" (24L), "rm" (tmp___1->addr_limit.seg)); tmp___2 = ldv__builtin_expect(flag == 0UL, 1L); if (tmp___2 == 0L) { return (-14); } else { __pu_err = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "iq" (req32.region), "m" (*((struct __large_struct *)(& request->region))), "i" (-14), "0" (__pu_err)); goto ldv_25122; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))), "i" (-14), "0" (__pu_err)); goto ldv_25122; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))), "i" (-14), "0" (__pu_err)); goto ldv_25122; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err): "Zr" (req32.region), "m" (*((struct __large_struct *)(& request->region))), "i" (-14), "0" (__pu_err)); goto ldv_25122; default: __put_user_bad(); } ldv_25122: ; if (__pu_err != 0L) { return (-14); } else { __pu_err___0 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "iq" (req32.alignment), "m" (*((struct __large_struct *)(& request->alignment))), "i" (-14), "0" (__pu_err___0)); goto ldv_25130; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment), "m" (*((struct __large_struct *)(& request->alignment))), "i" (-14), "0" (__pu_err___0)); goto ldv_25130; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment), "m" (*((struct __large_struct *)(& request->alignment))), "i" (-14), "0" (__pu_err___0)); goto ldv_25130; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___0): "Zr" (req32.alignment), "m" (*((struct __large_struct *)(& request->alignment))), "i" (-14), "0" (__pu_err___0)); goto ldv_25130; default: __put_user_bad(); } ldv_25130: ; if (__pu_err___0 != 0L) { return (-14); } else { __pu_err___1 = 0L; switch (4UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "iq" (req32.size), "m" (*((struct __large_struct *)(& request->size))), "i" (-14), "0" (__pu_err___1)); goto ldv_25138; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (req32.size), "m" (*((struct __large_struct *)(& request->size))), "i" (-14), "0" (__pu_err___1)); goto ldv_25138; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "ir" (req32.size), "m" (*((struct __large_struct *)(& request->size))), "i" (-14), "0" (__pu_err___1)); goto ldv_25138; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___1): "Zr" (req32.size), "m" (*((struct __large_struct *)(& request->size))), "i" (-14), "0" (__pu_err___1)); goto ldv_25138; default: __put_user_bad(); } ldv_25138: ; if (__pu_err___1 != 0L) { return (-14); } else { __pu_err___2 = 0L; switch (8UL) { case 1UL: __asm__ volatile ("1:\tmovb %b1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "iq" ((int *)((unsigned long )req32.region_offset)), "m" (*((struct __large_struct *)(& request->region_offset))), "i" (-14), "0" (__pu_err___2)); goto ldv_25146; case 2UL: __asm__ volatile ("1:\tmovw %w1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" ((int *)((unsigned long )req32.region_offset)), "m" (*((struct __large_struct *)(& request->region_offset))), "i" (-14), "0" (__pu_err___2)); goto ldv_25146; case 4UL: __asm__ volatile ("1:\tmovl %k1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "ir" ((int *)((unsigned long )req32.region_offset)), "m" (*((struct __large_struct *)(& request->region_offset))), "i" (-14), "0" (__pu_err___2)); goto ldv_25146; case 8UL: __asm__ volatile ("1:\tmovq %1,%2\n2:\n.section .fixup,\"ax\"\n3:\tmov %3,%0\n\tjmp 2b\n.previous\n .section __ex_table,\"a\"\n .balign 8 \n .quad 1b,3b\n .previous\n": "=r" (__pu_err___2): "Zr" ((int *)((unsigned long )req32.region_offset)), "m" (*((struct __large_struct *)(& request->region_offset))), "i" (-14), "0" (__pu_err___2)); goto ldv_25146; default: __put_user_bad(); } ldv_25146: ; if (__pu_err___2 != 0L) { return (-14); } else { } } } } } tmp___3 = drm_ioctl((file->f_path.dentry)->d_inode, file, 3222824008U, (unsigned long )request); return (tmp___3); } } drm_ioctl_compat_t *i915_compat_ioctls[12U] = { 0, 0, 0, & compat_i915_batchbuffer, & compat_i915_irq_emit, 0, & compat_i915_getparam, 0, & compat_i915_alloc, 0, 0, & compat_i915_cmdbuffer}; long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) { unsigned int nr ; drm_ioctl_compat_t *fn ; int ret ; long tmp ; { nr = cmd & 255U; fn = 0; if (nr <= 63U) { tmp = drm_compat_ioctl(filp, cmd, arg); return (tmp); } else { } if (nr <= 75U) { fn = i915_compat_ioctls[nr - 64U]; } else { } lock_kernel(); if ((unsigned long )fn != (unsigned long )((drm_ioctl_compat_t *)0)) { ret = (*fn)(filp, cmd, arg); } else { ret = drm_ioctl((filp->f_path.dentry)->d_inode, filp, cmd, arg); } unlock_kernel(); return ((long )ret); } } void ldv___ldv_spin_lock_933(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_lock_of_NOT_ARG_SIGN(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_934(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_lock_of_NOT_ARG_SIGN(); __ldv_spin_unlock(ldv_func_arg1); return; } } int ldv___ldv_spin_trylock_935(spinlock_t *ldv_func_arg1 ) { ldv_func_ret_type___1 ldv_func_res ; int tmp ; int tmp___0 ; { tmp = __ldv_spin_trylock(ldv_func_arg1); ldv_func_res = tmp; tmp___0 = ldv_spin_trylock_lock_of_NOT_ARG_SIGN(); return (tmp___0); return (ldv_func_res); } } void ldv___ldv_spin_lock_936(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_siglock_of_sighand_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_937(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_938(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_alloc_lock_of_task_struct(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_939(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_alloc_lock_of_task_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_940(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_siglock_of_sighand_struct(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_941(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_dcache_lock(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_942(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_943(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_944(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_dcache_lock(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_945(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_946(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_947(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_i_lock_of_inode(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_948(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_i_lock_of_inode(); __ldv_spin_unlock(ldv_func_arg1); return; } } void ldv___ldv_spin_lock_949(spinlock_t *ldv_func_arg1 ) { { ldv_spin_lock_d_lock_of_dentry(); __ldv_spin_lock(ldv_func_arg1); return; } } void ldv___ldv_spin_unlock_950(spinlock_t *ldv_func_arg1 ) { { ldv_spin_unlock_d_lock_of_dentry(); __ldv_spin_unlock(ldv_func_arg1); return; } } __inline static void ldv_error(void) { { LDV_ERROR: {reach_error();abort();} } } extern int ldv_undef_int(void) ; long ldv__builtin_expect(long exp , long c ) { { return (exp); } } static int ldv_spin_alloc_lock_of_task_struct ; void ldv_spin_lock_alloc_lock_of_task_struct(void) { { if (ldv_spin_alloc_lock_of_task_struct == 1) { } else { ldv_error(); } ldv_spin_alloc_lock_of_task_struct = 2; return; } } void ldv_spin_unlock_alloc_lock_of_task_struct(void) { { if (ldv_spin_alloc_lock_of_task_struct == 2) { } else { ldv_error(); } ldv_spin_alloc_lock_of_task_struct = 1; return; } } int ldv_spin_trylock_alloc_lock_of_task_struct(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_alloc_lock_of_task_struct == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_alloc_lock_of_task_struct = 2; return (1); } } } void ldv_spin_unlock_wait_alloc_lock_of_task_struct(void) { { if (ldv_spin_alloc_lock_of_task_struct == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_alloc_lock_of_task_struct(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_alloc_lock_of_task_struct == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_alloc_lock_of_task_struct(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_alloc_lock_of_task_struct(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_alloc_lock_of_task_struct(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_alloc_lock_of_task_struct(void) { int atomic_value_after_dec ; { if (ldv_spin_alloc_lock_of_task_struct == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_alloc_lock_of_task_struct = 2; return (1); } else { } return (0); } } static int ldv_spin_d_lock_of_dentry ; void ldv_spin_lock_d_lock_of_dentry(void) { { if (ldv_spin_d_lock_of_dentry == 1) { } else { ldv_error(); } ldv_spin_d_lock_of_dentry = 2; return; } } void ldv_spin_unlock_d_lock_of_dentry(void) { { if (ldv_spin_d_lock_of_dentry == 2) { } else { ldv_error(); } ldv_spin_d_lock_of_dentry = 1; return; } } int ldv_spin_trylock_d_lock_of_dentry(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_d_lock_of_dentry == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_d_lock_of_dentry = 2; return (1); } } } void ldv_spin_unlock_wait_d_lock_of_dentry(void) { { if (ldv_spin_d_lock_of_dentry == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_d_lock_of_dentry(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_d_lock_of_dentry == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_d_lock_of_dentry(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_d_lock_of_dentry(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_d_lock_of_dentry(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_d_lock_of_dentry(void) { int atomic_value_after_dec ; { if (ldv_spin_d_lock_of_dentry == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_d_lock_of_dentry = 2; return (1); } else { } return (0); } } static int ldv_spin_dcache_lock ; void ldv_spin_lock_dcache_lock(void) { { if (ldv_spin_dcache_lock == 1) { } else { ldv_error(); } ldv_spin_dcache_lock = 2; return; } } void ldv_spin_unlock_dcache_lock(void) { { if (ldv_spin_dcache_lock == 2) { } else { ldv_error(); } ldv_spin_dcache_lock = 1; return; } } int ldv_spin_trylock_dcache_lock(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_dcache_lock == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_dcache_lock = 2; return (1); } } } void ldv_spin_unlock_wait_dcache_lock(void) { { if (ldv_spin_dcache_lock == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_dcache_lock(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_dcache_lock == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_dcache_lock(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_dcache_lock(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_dcache_lock(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_dcache_lock(void) { int atomic_value_after_dec ; { if (ldv_spin_dcache_lock == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_dcache_lock = 2; return (1); } else { } return (0); } } static int ldv_spin_i_lock_of_inode ; void ldv_spin_lock_i_lock_of_inode(void) { { if (ldv_spin_i_lock_of_inode == 1) { } else { ldv_error(); } ldv_spin_i_lock_of_inode = 2; return; } } void ldv_spin_unlock_i_lock_of_inode(void) { { if (ldv_spin_i_lock_of_inode == 2) { } else { ldv_error(); } ldv_spin_i_lock_of_inode = 1; return; } } int ldv_spin_trylock_i_lock_of_inode(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_i_lock_of_inode == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_i_lock_of_inode = 2; return (1); } } } void ldv_spin_unlock_wait_i_lock_of_inode(void) { { if (ldv_spin_i_lock_of_inode == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_i_lock_of_inode(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_i_lock_of_inode == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_i_lock_of_inode(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_i_lock_of_inode(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_i_lock_of_inode(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_i_lock_of_inode(void) { int atomic_value_after_dec ; { if (ldv_spin_i_lock_of_inode == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_i_lock_of_inode = 2; return (1); } else { } return (0); } } static int ldv_spin_lock_of_NOT_ARG_SIGN ; void ldv_spin_lock_lock_of_NOT_ARG_SIGN(void) { { if (ldv_spin_lock_of_NOT_ARG_SIGN == 1) { } else { ldv_error(); } ldv_spin_lock_of_NOT_ARG_SIGN = 2; return; } } void ldv_spin_unlock_lock_of_NOT_ARG_SIGN(void) { { if (ldv_spin_lock_of_NOT_ARG_SIGN == 2) { } else { ldv_error(); } ldv_spin_lock_of_NOT_ARG_SIGN = 1; return; } } int ldv_spin_trylock_lock_of_NOT_ARG_SIGN(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_lock_of_NOT_ARG_SIGN == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_lock_of_NOT_ARG_SIGN = 2; return (1); } } } void ldv_spin_unlock_wait_lock_of_NOT_ARG_SIGN(void) { { if (ldv_spin_lock_of_NOT_ARG_SIGN == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_lock_of_NOT_ARG_SIGN(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_lock_of_NOT_ARG_SIGN == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_lock_of_NOT_ARG_SIGN(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_lock_of_NOT_ARG_SIGN(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_lock_of_NOT_ARG_SIGN(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_lock_of_NOT_ARG_SIGN(void) { int atomic_value_after_dec ; { if (ldv_spin_lock_of_NOT_ARG_SIGN == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_lock_of_NOT_ARG_SIGN = 2; return (1); } else { } return (0); } } static int ldv_spin_siglock_of_sighand_struct ; void ldv_spin_lock_siglock_of_sighand_struct(void) { { if (ldv_spin_siglock_of_sighand_struct == 1) { } else { ldv_error(); } ldv_spin_siglock_of_sighand_struct = 2; return; } } void ldv_spin_unlock_siglock_of_sighand_struct(void) { { if (ldv_spin_siglock_of_sighand_struct == 2) { } else { ldv_error(); } ldv_spin_siglock_of_sighand_struct = 1; return; } } int ldv_spin_trylock_siglock_of_sighand_struct(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_siglock_of_sighand_struct == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_siglock_of_sighand_struct = 2; return (1); } } } void ldv_spin_unlock_wait_siglock_of_sighand_struct(void) { { if (ldv_spin_siglock_of_sighand_struct == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_siglock_of_sighand_struct(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_siglock_of_sighand_struct == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_siglock_of_sighand_struct(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_siglock_of_sighand_struct(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_siglock_of_sighand_struct(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_siglock_of_sighand_struct(void) { int atomic_value_after_dec ; { if (ldv_spin_siglock_of_sighand_struct == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_siglock_of_sighand_struct = 2; return (1); } else { } return (0); } } static int ldv_spin_user_irq_lock_of_drm_i915_private ; void ldv_spin_lock_user_irq_lock_of_drm_i915_private(void) { { if (ldv_spin_user_irq_lock_of_drm_i915_private == 1) { } else { ldv_error(); } ldv_spin_user_irq_lock_of_drm_i915_private = 2; return; } } void ldv_spin_unlock_user_irq_lock_of_drm_i915_private(void) { { if (ldv_spin_user_irq_lock_of_drm_i915_private == 2) { } else { ldv_error(); } ldv_spin_user_irq_lock_of_drm_i915_private = 1; return; } } int ldv_spin_trylock_user_irq_lock_of_drm_i915_private(void) { int is_spin_held_by_another_thread ; { if (ldv_spin_user_irq_lock_of_drm_i915_private == 1) { } else { ldv_error(); } is_spin_held_by_another_thread = ldv_undef_int(); if (is_spin_held_by_another_thread) { return (0); } else { ldv_spin_user_irq_lock_of_drm_i915_private = 2; return (1); } } } void ldv_spin_unlock_wait_user_irq_lock_of_drm_i915_private(void) { { if (ldv_spin_user_irq_lock_of_drm_i915_private == 1) { } else { ldv_error(); } return; } } int ldv_spin_is_locked_user_irq_lock_of_drm_i915_private(void) { int is_spin_held_by_another_thread ; { is_spin_held_by_another_thread = ldv_undef_int(); if (ldv_spin_user_irq_lock_of_drm_i915_private == 1 && ! is_spin_held_by_another_thread) { return (0); } else { return (1); } } } int ldv_spin_can_lock_user_irq_lock_of_drm_i915_private(void) { int tmp ; int tmp___0 ; { tmp = ldv_spin_is_locked_user_irq_lock_of_drm_i915_private(); if (tmp) { tmp___0 = 0; } else { tmp___0 = 1; } return (tmp___0); } } int ldv_spin_is_contended_user_irq_lock_of_drm_i915_private(void) { int is_spin_contended ; { is_spin_contended = ldv_undef_int(); if (is_spin_contended) { return (0); } else { return (1); } } } int ldv_atomic_dec_and_lock_user_irq_lock_of_drm_i915_private(void) { int atomic_value_after_dec ; { if (ldv_spin_user_irq_lock_of_drm_i915_private == 1) { } else { ldv_error(); } atomic_value_after_dec = ldv_undef_int(); if (atomic_value_after_dec == 0) { ldv_spin_user_irq_lock_of_drm_i915_private = 2; return (1); } else { } return (0); } } void ldv_initialize(void) { { ldv_spin_alloc_lock_of_task_struct = 1; ldv_spin_d_lock_of_dentry = 1; ldv_spin_dcache_lock = 1; ldv_spin_i_lock_of_inode = 1; ldv_spin_lock_of_NOT_ARG_SIGN = 1; ldv_spin_siglock_of_sighand_struct = 1; ldv_spin_user_irq_lock_of_drm_i915_private = 1; return; } } void ldv_check_final_state(void) { { if (ldv_spin_alloc_lock_of_task_struct == 1) { } else { ldv_error(); } if (ldv_spin_d_lock_of_dentry == 1) { } else { ldv_error(); } if (ldv_spin_dcache_lock == 1) { } else { ldv_error(); } if (ldv_spin_i_lock_of_inode == 1) { } else { ldv_error(); } if (ldv_spin_lock_of_NOT_ARG_SIGN == 1) { } else { ldv_error(); } if (ldv_spin_siglock_of_sighand_struct == 1) { } else { ldv_error(); } if (ldv_spin_user_irq_lock_of_drm_i915_private == 1) { } else { ldv_error(); } return; } }